JPH03112093A - Lighting device for discharge lamp - Google Patents

Abstract

PURPOSE:To prevent afterglow by providing a preset control circuit, and immediately stopping the superimposition of a DC current based on an off-signal in a lighting device superimposing the DC power to maintain discharging in superimposition over the lighting by the high-frequency power. CONSTITUTION:The discharging of a discharge lamp 1 is maintained by the DC power obtained Via a diode D7 or the like in superimposition over the lighting by the high-frequency power oscillated via transistors Q1 and Q2. A transistor Q3 is provided on a discharging main circuit and operated via a voltage detecting circuit 7. When a switch SW is opened to turn off the discharge lamp 1, a control power source VC4 is reduced, a diode ZD2 is de-excited, and the transistor 03 is turned off. The superimposed DC current is immediately stopped by the off-signal of the discharge lamp 1. The afterglow when the discharge lamp 1 is turned off is prevented.

Description

[Detailed Description of the Invention] [Field of Industrial Application] The present invention relates to a discharge lamp lighting device that lights a discharge lamp using high-frequency power and maintains discharge during low luminous flux by superimposing DC power. be.

[Prior Art] Figure 8 shows a conventional discharge lamp dimming lighting device (Patent Application No. 1-755).
72) is a block diagram. This lighting device includes a low-pressure mercury discharge lamp 1, a high-frequency power source 2 that supplies high-frequency power to the discharge lamp 1, and a dimming control section 3 that dims the discharge lamp 1 from an arc discharge region to a glow discharge region. DC power superimposing means 4 that superimposes DC power at a level that can maintain discharge during low luminous flux dimming on the high frequency power and applies it to the discharge lamp 1;
This allows dimming down to a low luminous flux range (deep dimming level). In FIG. 8, the control signal from the dimming controller 3 that controls the dimming of the discharge lamp 1 is input to the high frequency power source 2, the impedance elements Z1, Z2, and the DC power source 5, all of which receive the control signal. For example, a control signal is input only to the high-frequency power supply 2, the frequency of the high-frequency output obtained from the high-frequency power supply 2 is changed, and the power supplied to the discharge lamp 1 is controlled and dimmed. When doing so, the impedance element 2. ．． 22 and the input of a control signal to the DC power supply 5 are not necessarily required.
If it is desired to obtain the optimum DC component by changing the DC component from the DC power superimposing means 4 according to the dimming degree, a control signal may be input from the dimming control unit 3 to the DC power source 5. Furthermore, as an example of inputting a control signal to the impedance element Z1, the impedance element Z1 is set as a saturable inductance, and dimming is possible by controlling the value of this saturable inductance. Further, as an example of inputting a control signal to the impedance element Z2, the impedance element Z2 is made up of a resistor element and a switch element, and if this switch element is controlled on and off according to the control signal, direct current to the discharge lamp 1 can be controlled. It becomes possible to control the amount of superimposed power. As described above, control signals may be supplied from the dimming control section 3 to each section as necessary.

FIG. 9 shows a conventional example in which the configuration shown in the block diagram in FIG. 8 is realized by a concrete circuit. The commercial AC power supply AC is connected via a power switch SW to the AC input end of a full-wave rectifier made up of diodes D1 to D4, and a smoothing capacitor C1 is connected to the DC output end of this full-wave rectifier. . The DC voltage obtained at the capacitor C3 is applied to a series circuit of MOS transistors Q, , Q2. M.O.S.
) across the transistors Q, , Q2 are diodes D6, . D, are connected in antiparallel. These diodes Ds, Ds are MOS) - transistors Q, , Q2
The primary winding of a preheating transformer T1 is connected to both ends of one MOS transistor Q, which may be replaced by a parasitic reverse diode between the drain and source of the transistor Q, via a capacitor C2. A parallel circuit of a discharge lamp 1 and a capacitor C1 is connected via an inductor L in parallel with the primary winding of the transformer T1. The secondary winding of the preheating transformer T1 is connected to the filament of the discharge lamp 1.

One end of the discharge lamp 1 is connected to the negative electrode of a capacitor C1 via a resistor R1.

On the other hand, the high-voltage side winding of the step-down transformer T2 is connected to the AC input terminal of the full-wave rectifier made up of diodes D1 to D, and the diodes D, to D, are connected to the low-voltage side winding of the step-down transformer T2. The AC input terminal of a full wave rectifier consisting of is connected. A parallel circuit of a capacitor C1 and a Zener diode ZD is connected to the DC output end of this full-wave rectifier. The DC low voltage obtained across the capacitor C1 serves as an operating power source for the control circuit 6.

The control circuit 6 generates control signals for the MOS transistors Q, . . . Q2, and turns the MOS transistors Q, . . . Q2 on and off alternately. When MOS) transistor Q is off and MOS) transistor Q2 is on, the voltage from capacitor C3 to capacitor C2 to inductor 1. A current flows through the discharge lamp 1, the capacitor C, and the MOS transistor Q2, and returns to the capacitor C1. Also, M.O.
When the S transistor Q is on and the MOS transistor Q2 is off, the capacitor C2 becomes a power source, and current flows from the capacitor C2 through the transistor Q3, the discharge lamp 1, the capacitor C1, and the inductor L1, and returns to the capacitor C2. However, MOS transistor Q,...
Immediately after Q2 turns off, each diode D s
, D s through which the regenerative current flows. In this way, a resonant current flows through the load circuit including the inductor, capacitor C3, and discharge lamp 1, and the discharge lamp 1 is lit by the voltage generated across the capacitor C5 due to the resonance effect.

As described above, an inverter type lighting device is configured.

The control circuit 6 can change the switching frequency. The switching frequency of the MOS transistors Q, Q2 is set higher than the resonant frequency of the load circuit. When the switching frequency is lowered to approach the resonant frequency, the resonance effect becomes stronger, so the resonant current increases, the lamp current flowing through the discharge lamp 1 becomes larger, and the light output increases.

On the other hand, when the switching frequency is increased and moved away from the resonant frequency, the resonance effect becomes weaker, the resonant current decreases, the lamp current flowing through the discharge lamp 1 becomes smaller, and the light output decreases. Thereby, dimming control of the discharge lamp 1 becomes possible. If the dimming range of the discharge lamp 1 is widened from the arc discharge region to the glow discharge region, it becomes difficult to keep the discharge lamp 1 lit in the low luminous flux region, but in the circuit shown in FIG. Since a direct current flows from the capacitor C3 to the discharge lamp 1 via the capacitor C3, it is possible to stably maintain lighting even in a low luminous flux region.

[Problems to be Solved by the Invention] By the way, in the discharge lamp lighting device shown in FIG.
When opened, the voltage Vc4 of the capacitor C4, which is the operating power supply of the control circuit 6, decreases, but as shown in FIG. 10(a), the voltage VM at which the circuit elements of the control circuit 6 can operate
, N or less, the control signal is output from the control circuit 6. In addition, capacitor C, which is the main power supply of the inverter,
The voltage of lamp 3 also decreases, but since discharge lamp 1 remains lit in the low luminous flux region, its power consumption is small, as shown in Figure 10(b).
As shown, the voltage c1 of the capacitor C2 gradually decreases. Furthermore, since the capacitor C1 supplies the discharge lamp 1 with a direct current for maintaining lighting through the resistor R, it is easy to keep the discharge lamp 1 lit even if the power switch SW is opened. Assuming that the discharge lamp 1 is kept lit until the voltage c1 of the capacitor C becomes equal to or less than a predetermined voltage Vo,
Even if the control circuit 6 stops operating and the oscillation of the inverter stops at time t2, the discharge lamp 1 will continue to be lit until time t2.

On the other hand, when the power switch SW is opened with all lights on, the power consumption of the inverter is large, as shown in Fig. 10(e).
As shown in , the voltage vo of the capacitor C1 quickly decreases. However, as shown in FIG. 10(d), when the voltage Vc1 of the capacitor C1 is not lower than the predetermined voltage Vo at time t when the control circuit 6 stops operating and the oscillation of the inverter stops. After that, the voltage VC3 of the capacitor C1 gradually decreases, so the discharge lamp 1 is kept lit until time t3.

The present invention has been made in view of these points, and its purpose is to supply high-frequency power to a discharge lamp, and to superimpose and apply DC power for maintaining lighting during low luminous flux. An object of the present invention is to prevent afterglow when the lamp is turned off in a discharge lamp lighting device.

[Means for Solving the Problems] In the present invention, in order to solve the above problems, the first
As shown in the figure, a low-pressure mercury discharge lamp 1, a high-frequency power source 2 that supplies high-frequency power to the discharge lamp 1, and a control unit 3 that controls lighting of the discharge lamp 1 can maintain discharge during low-luminous lighting. In the discharge lamp lighting device, the discharge lamp lighting device includes a DC power superimposing means 4 that superimposes a level of DC power on the high-frequency power and applies it to the discharge lamp 1, the superposition of the DC power is immediately performed by the extinguishing signal S of the discharge lamp 1. The invention is characterized in that it is equipped with means for stopping the vehicle.

[Function] In this way, in the present invention, when the discharge lamp 1 is turned off, the superimposition of DC power at a level that can maintain the discharge during low luminous flux lighting is immediately stopped, so that the discharge lamp 1 is turned off. This can prevent afterglow from persisting after the operation.

"Embodiment 1" FIG. 2 is a circuit diagram of the main circuit in the first embodiment of the present invention.This circuit differs from the conventional example shown in FIG. 9 by inserting a MOS transistor Q3 in series with the resistor R2. At the same time, the arrangement of the capacitor C2 and the inductor L1 is changed.By turning off the transistor Q3 (MOS), the DC current flowing to the discharge lamp 1 via the resistor R1 is reduced to 3.
1! ! You can cut it off. In addition, a series circuit of capacitor C2 and inductor 1 is connected to a MOS) transistor Q2.
Since it is arranged so that one end is connected to the connection point of Q2, when the MOS transistor Q is turned on, there is no element that interferes with the direct current flowing from the capacitor C1 to the discharge lamp 1 and through the resistor R1, which is necessary to maintain lighting. DC current can be obtained reliably. The other configurations are the same as the conventional example shown in FIG.

Next, FIG. 3 is a circuit diagram of a control circuit for supplying control signals to the main circuit shown in FIG. 2. This control circuit consists of a MOS transistor Q1 in the main circuit. Q2 drive circuits and an oscillation circuit IC for giving drive signals to these drive circuits, and when the discharge lamp 1 is turned off, the M
OS) transistor Q.

A voltage detection circuit 7 is provided to turn off the circuits, and the control power source ■c obtained from the capacitor C1 in the main circuit is supplied as the operating power source for these circuits.

First, the drive circuit for the MOS transistor Q1 consists of a pulse transformer T3, resistors R6, R7, and diodes D,...
, 3. The center tap of the primary winding of the pulse transformer T3 is connected to the control power source ■c4, one end of the primary winding is grounded via a drive transistor Q4 (described later), and the other end of the primary winding is It is grounded via diode D,1. One end of the secondary winding of the pulse transformer T3 is connected to the source of the MOS transistor Q1 via a terminal, and the other end is connected to the original bias resistor R6 and the reverse bias diode D1. and is connected to the gate of a MOS transistor Q through a terminal a. A resistor R7 is connected in parallel between the gate and source of the MOS transistor Q.

Now, when the driving MO3) transistor Q is turned on and one end of the primary winding of the pulse transformer T is grounded, the control power supply ■ is applied to the center tap of the primary winding of the pulse transformer T. A current flows through the primary winding due to c, and resistors Rs and R connected to the secondary winding of the pulse transformer T,
A current flows through the series circuit of t, and the voltage generated across the resistor R7 forward biases the gate and source of the MOS transistor Q, turning on the MoS transistor Q1.

Next, when the driving MO3) transistor Q4 is turned off and the current flowing to the primary winding of the pulse transformer T is cut off, the control power source (2) is passed through the diode DI+ in order to continue flowing this current. A regenerative current flows through . At this time, a back electromotive force is generated in the secondary winding of the pulse transformer T, and the current flowing through the resistor R9 through the diode DI3 causes a voltage between the gate and source of the transistor Q to be connected across the resistor R7. A reverse bias voltage is generated, the charges accumulated in the gate-source dark capacitance are rapidly discharged, and the MOS transistor Q is quickly turned off.

The drive circuit for MOS transistor Q2 also has a similar configuration and performs similar operations. In other words, MOS transistor Q2
A pulse transformer T4 and a resistor R, which constitute the drive circuit of
R5 and diode D, 2. D is a pulse transformer T that constitutes a drive circuit for the above-mentioned MOS transistor Q;
and resistors R6, R7 and diodes D, , D, 3, respectively. Therefore, redundant explanations regarding these will be omitted.

The oscillation circuit I C+ consists of a control IC for a switching regulator (μPC494C manufactured by NEC Corporation). As is well known, this control IC is connected to a power supply terminal (12
Control power supply ■ between the No. 7 bottle) and the ground terminal (No. 7 bottle).

4 is applied and used, the capacitor terminal (No. 5 bottle)
capacitor C5 connected between the and ground terminal, and a resistor (R,
, +VR). The first oscillation output is obtained by alternating between a short-circuited state and an open state between the first oven collector terminal (pin 8) and the first oven emitter terminal (pin 9). , the second oscillation output is obtained by alternating the short-circuited and open states between the second oven collector terminal (pin 11) and the second oven emitter terminal (pin 10). . Here, connect the output control terminal (bin 13) to the reference voltage output terminal (
When set to the level of the reference voltage Vref obtained from the 14th bin), push-pull operation for two stones is performed, and the first oscillation output and the second oscillation output are in opposite states after a predetermined dead-off time. I take the. This dead-off time is determined by dividing the reference voltage Vref by resistors R2 and R3.
It can be set by inputting to the dead-off time control terminal (pin 4). Note that the non-inverting input terminals (bin 1, bin 16) and inverting input terminals (pin 2, bin 15) are the input terminals of the built-in comparator for pulse width control, and do not perform pulse width control. In this case, the latter should be pulled up to the level of the reference voltage ■'er.Furthermore, the feedback terminal (bin 3) is a feedback input terminal for pulse width control, and should be left open when not in use. It is something to keep.

In this embodiment, the output control terminal (
The oven emitter terminals (pins 9 and 10) are grounded, and the oven collector terminals (bins 8 and 11) are pulled up to the reference voltage Vref level for push-pull operation. ) transistor Q5. It is used as the input signal of Q.

In other words, when a short circuit occurs between the first oven collector terminal (bin No. 8) and the oven emitter terminal (bin No. 9), the gate of the MOS transistor Q5 is
When it becomes L OwI+ level, and conversely, it becomes an open state, the gate of MOS) transistor Q becomes ")-(high" level due to pull-up resistor R6.Similarly, the second oven collector terminal (No. 11) and the oven emitter terminal (No. 10) are short-circuited, the gate of MOS transistor Q becomes "'Lo...° level," and conversely, when it is open, the MOS transistor The gate of transistor Q4 is °'Hi
gh°° level. Each MO3) transistor (L, Qs is connected to one end of the pulse transformer T3, T4 in each drive circuit of the MOS transistor Q, Q2 which constitutes an inverter circuit as described above, and the MOS transistor Q, , Q2.

The oscillation frequency of the oscillation circuit IC is determined by the time constants of the capacitor C4, fixed resistor Ro, and variable resistor VR. Therefore, by adjusting the value of the variable resistor VR, it is possible to control the oscillation frequency of the oscillation circuit IC.

Also, the dead-off time of the oscillation output is the reference voltage Vre
It is determined according to the level obtained by dividing the level of f by resistors R2 and R3.

Next, the voltage detection circuit 7 for controlling the MOS transistor Q to turn off when the discharge lamp 1 is turned off will be described. In this voltage detection circuit 7, the control power supply ■ is obtained from the capacitor C1. , the voltage of resistance R+ o + R+ +
The voltage obtained at the connection point r of the resistors R, , R, , is divided by the resistor R13 through the Zener diode ZD2.
is applied to. The voltage generated across resistor R13 is applied between the base and emitter of transistor Q6. The collector of transistor Q6 is connected to the control power supply V through resistor Rl2. 4 and the resistor R1? PNP) - connected to the base of transistor Q7. The emitter of the PNP transistor Q7 is connected to the control power supply Vc.
4, and its collector is grounded via a resistor R14. A series circuit of resistors RIS and R+6 is connected in parallel to both ends of resistor R7, and a connection point d of resistors R,9 and R,6 is connected in parallel to each other.
The voltage becomes the gate drive voltage of the MOS transistor Q in the main circuit.

FIG. 4 is an operational waveform diagram of the voltage detection circuit 7.

The figure (a) shows the control power supply V. 4 voltage changes are shown.

It's time. Previously, the power switch SW was turned on,
A predetermined DC low voltage determined by the Zener voltage of the Zener diode ZD is generated across the capacitor C4. The Zener voltage of Zener diode ZD2 is set so that the voltage at point f obtained by dividing this predetermined DC low voltage with resistors R, o, R, , is higher than the Zener voltage of Zener diode ZD2. has been done. Therefore, before time t0, the Zener diode ZD2 is conductive and a voltage is generated across the resistor R13, so the transistor Q6 is in the on state, and the voltage ve at its collector (point e in the figure) is as shown in FIG. 4(b). As shown in FIG.
As shown in FIG. 4(c), the potential at the connection point d of 3, R, . For this reason,
A direct current flows through the discharge lamp 1 via a resistor R9.

Next, when the power switch SW is opened at time 0, the control power supply vc4 decreases as shown in FIG. 4(a). Then, at time t4, the voltage at point f changes to Zener diode Z.
When the Zener voltage becomes lower than the Zener voltage of D2, the Zener diode ZD2 becomes non-conductive.

Therefore, the transistor Q6 is turned off, and the voltage Ve at its collector becomes equal to the control power supply V as shown in FIG. 4(b). , is the same as . Therefore, the PNP transistor Q, is in the off state, and the resistance R + s + R, + a
The potential at the connection point d of the fourth Iffi becomes ``Low level'' as shown in (C), and the MOS transistor Q of the main circuit
3 is in the off state. As a result, the direct current flowing to the discharge lamp 1 via the resistor R5 is interrupted. Then, at time t1, when the operation of the oscillation circuit C1 stops, the oscillation of the inverter stops, and therefore the discharge of the discharge lamp 1 stops. At this time, since no direct current for maintaining lighting is flowing through the discharge lamp 1, afterglow does not persist.

In this embodiment, the control power supply ■. Although the turn-off signal for the discharge lamp 1 is obtained by detecting the voltage drop of 4, it is also possible to detect the voltage drop of the capacitor CI, which is the input power source of the inverter.
The extinguishing signal for the discharge lamp 1 may be obtained using another switch that works in conjunction with the power switch SW.

[Embodiment 2] FIG. 5 is a block diagram showing a schematic configuration of a second embodiment of the present invention. The present embodiment includes a dimming control section 3, which controls the light output of the discharge lamp 1 to 100 in accordance with the dimming signal Vs.
Dimming control is possible in the range from % on to 0% on (off). Conventionally, when fading out from a dimmed lighting state to a 0% lighting (lights off) state, the input power to the inverter was cut off or the inverter's oscillation was stopped, but this would cause the inverter to restart (re-ignition). When this occurs, an inrush current flows through the circuit, increasing stress on the circuit elements. Therefore, in this embodiment, the fade-out is performed by cutting off the DC power for keeping the discharge lamp 1 lit.

FIG. 6 is an explanatory diagram of the operation. The horizontal axis is the dimming signal Vs, and the vertical axis is the dimming ratio. When the dimming signal Vs is reduced, the dimming ratio also decreases and the light output becomes smaller. Then, when the dimming signal Vs reaches a predetermined value, the DC power for maintaining the lighting of the discharge lamp 1 is cut off, the dimming ratio becomes zero, and there is no light output.

FIG. 7 shows a circuit for controlling the fade-out described above. This circuit consists of the main circuit and the third circuit shown in Figure 2.
Used with the control circuit shown in the figure. Points d and g in Figure 7
are connected to point d1g in FIG. 3, respectively. Further, the series circuit of resistor R8 and variable resistor Vr shown in FIG. 3 may be replaced with only resistor R8. Dimming control is performed by dimming signal Vs.

This dimming signal Vs is input to the inverting input terminal of the operational amplifier C2 via the input resistor R16. Operational amplifier■
The non-inverting input terminal of C2 is connected to the control power supply VC and the resistor R+.
A reference voltage divided by s and R2(, A reference voltage obtained by dividing the control power supply Vc4 by resistors R2□ and R2:l is applied to the non-inverting input terminal of the operational amplifier IC3.
The output terminal of C, is connected to the inverting input terminal via the feedback resistor R25, and is also connected to the resistor terminal (6) of the oscillation circuit IC3.
number bin). As a result, the dimming signal Vs
is inputted to the resistor terminal (bin 6) of the oscillation circuit ■cl via operational amplifiers IC2 and IC3, and dimming control is realized. This embodiment is designed so that the higher the dimming signal Vs, the greater the light output of the discharge lamp 1.

Further, the dimming signal Vs is input to the inverting input terminal of the comparator IC4 via the resistor R2g.

The non-inverting input terminal of the comparator IC has a control power supply ■
Is c4 resistor R2? , R28 apply a divided reference voltage. The output terminal of the comparator IC is a resistor R
29 to the base of transistor Q. This transistor Q8 is connected in parallel to both ends of the resistor R16. As shown in FIG. 6, the dimming signal Vs is at a predetermined value V. When it is larger than 4・R27/(R27 + R28), the output terminal of comparator ■C4 becomes 'Loa+
However, when the dimming signal Vs becomes less than the predetermined value, the output terminal of the comparator IC becomes ``High'' level, and the transistor Q8 is turned on. Therefore, the MOS transistor Q3 in the main circuit of FIG. 2 is forcibly turned off, and the DC current for maintaining discharge supplied to the discharge lamp 1 via the resistor R is cut off. At this time, since the discharge lamp 1 is in the low luminous flux dimming region as shown in FIG. 6, the discharge cannot be maintained and the lamp goes out.

In this way, in order to turn off the discharge lamp 1, in order to turn off the discharge lamp 1, instead of cutting off the input power to the inverter or stopping the oscillation of the inverter, the oscillation output of the inverter is reduced and the discharge lamp 1 is turned off. Since the maintenance DC current is cut off, the discharge lamp 1 can be turned off while the inverter continues to oscillate. Therefore, when restarting the discharge lamp 1, excessive stress is not applied to the circuit elements.

Note that the configuration of the inverter device is not limited to the series resonant inverter as exemplified in the main circuit of FIG. 2, and a half-bridge circuit, full-bridge circuit, single-stone inverter circuit, etc. may also be used.

Further, although an example is shown in which a variable DC voltage is used as the dimming signal Vs, the present invention is not limited to this, and for example, a variable duty rectangular wave voltage or the like may be used.

[Effects of the Invention] According to the present invention, in a discharge lamp lighting device that supplies high-frequency power to a discharge lamp and superimposes DC power for maintaining lighting during low luminous flux, Since the superimposition of DC power is immediately stopped by a signal, it is effective in preventing afterglow when the discharge lamp is turned off.

[Brief explanation of drawings]

FIG. 1 is a block diagram showing the basic configuration of the present invention, FIGS. 2 and 3 are circuit diagrams of the main circuit and control circuit of the first embodiment of the present invention, respectively, and FIG. 4 is an operation waveform diagram of the same as above. FIG. 5 is a block diagram showing the schematic configuration of the second embodiment of the present invention, and FIG.
The figure is an explanatory diagram of the same operation as above, Fig. 7 is a circuit diagram of the same main part as above, Fig. 8 is a block diagram of a conventional example, Fig. 9 is a specific circuit diagram of -F, and Fig. 10 is an operation waveform diagram of same as above. It is. 1 is a discharge lamp, 2 is a high frequency power supply, 3 is a control unit, 4 is a DC power superimposing means, 5 is a DC power supply, and Sl is a discharge lamp extinguishing signal.

Claims (1)

[Claims] (1) A low-pressure mercury discharge lamp, a high-frequency power source that supplies high-frequency power to the discharge lamp, a control unit that controls lighting of the discharge lamp, and a DC power that supplies the high-frequency power to a level that can maintain discharge during low luminous flux lighting. A discharge lamp lighting device comprising means for superimposing direct current power to the discharge lamp in a superimposed manner to the discharge lamp, characterized in that the discharge lamp lighting device includes means for immediately stopping superimposition of the direct current power in response to a turn-off signal for the discharge lamp. Electric light lighting device.