JPH03111560U - - Google Patents

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Publication number
JPH03111560U
JPH03111560U JP2084590U JP2084590U JPH03111560U JP H03111560 U JPH03111560 U JP H03111560U JP 2084590 U JP2084590 U JP 2084590U JP 2084590 U JP2084590 U JP 2084590U JP H03111560 U JPH03111560 U JP H03111560U
Authority
JP
Japan
Prior art keywords
signal
input
converter
subtracter
signal input
Prior art date
Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
Pending
Application number
JP2084590U
Other languages
Japanese (ja)
Priority date (The priority date is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the date listed.)
Filing date
Publication date
Application filed filed Critical
Priority to JP2084590U priority Critical patent/JPH03111560U/ja
Publication of JPH03111560U publication Critical patent/JPH03111560U/ja
Pending legal-status Critical Current

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Description

【図面の簡単な説明】[Brief explanation of drawings]

図面は、この考案の実施例および従来例を示す
ものであつて第1図は回路図、第2図は概略図、
第3図は回路図である。 図面において、19……減算器、21……A/
D変換器、22……D/A変換器、23……オフ
セツトスイツチである。
The drawings show an embodiment of this invention and a conventional example, in which FIG. 1 is a circuit diagram, FIG. 2 is a schematic diagram,
FIG. 3 is a circuit diagram. In the drawings, 19...subtractor, 21...A/
D converter, 22...D/A converter, 23...offset switch.

Claims (1)

【実用新案登録請求の範囲】[Scope of utility model registration request] 入力信号を減算器の第1信号入力に接続し、オ
フセツトスイツチ信号を制御入力に接続してなる
A/D変換器の信号入力に、前記入力信号の一部
を接続し、このA/D変換器の信号出力をD/A
変換器の信号入力に接続し、このD/A変換器の
信号出力を前記減算器の第2信号入力に接続して
なる自動オフセツト回路。
A portion of the input signal is connected to a signal input of an A/D converter, the input signal being connected to a first signal input of a subtracter, and an offset switch signal being connected to a control input; D/A converter signal output
an automatic offset circuit connected to a signal input of a converter and a signal output of the D/A converter connected to a second signal input of the subtracter;
JP2084590U 1990-02-28 1990-02-28 Pending JPH03111560U (en)

Priority Applications (1)

Application Number Priority Date Filing Date Title
JP2084590U JPH03111560U (en) 1990-02-28 1990-02-28

Applications Claiming Priority (1)

Application Number Priority Date Filing Date Title
JP2084590U JPH03111560U (en) 1990-02-28 1990-02-28

Publications (1)

Publication Number Publication Date
JPH03111560U true JPH03111560U (en) 1991-11-14

Family

ID=31523928

Family Applications (1)

Application Number Title Priority Date Filing Date
JP2084590U Pending JPH03111560U (en) 1990-02-28 1990-02-28

Country Status (1)

Country Link
JP (1) JPH03111560U (en)

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