JPH03109350U - - Google Patents

Info

Publication number
JPH03109350U
JPH03109350U JP1623790U JP1623790U JPH03109350U JP H03109350 U JPH03109350 U JP H03109350U JP 1623790 U JP1623790 U JP 1623790U JP 1623790 U JP1623790 U JP 1623790U JP H03109350 U JPH03109350 U JP H03109350U
Authority
JP
Japan
Prior art keywords
integrated circuit
circuit chip
mounting
mounting structure
mounting board
Prior art date
Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
Pending
Application number
JP1623790U
Other languages
English (en)
Japanese (ja)
Priority date (The priority date is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the date listed.)
Filing date
Publication date
Application filed filed Critical
Priority to JP1623790U priority Critical patent/JPH03109350U/ja
Publication of JPH03109350U publication Critical patent/JPH03109350U/ja
Pending legal-status Critical Current

Links

Landscapes

  • Wire Bonding (AREA)
JP1623790U 1990-02-22 1990-02-22 Pending JPH03109350U (enrdf_load_stackoverflow)

Priority Applications (1)

Application Number Priority Date Filing Date Title
JP1623790U JPH03109350U (enrdf_load_stackoverflow) 1990-02-22 1990-02-22

Applications Claiming Priority (1)

Application Number Priority Date Filing Date Title
JP1623790U JPH03109350U (enrdf_load_stackoverflow) 1990-02-22 1990-02-22

Publications (1)

Publication Number Publication Date
JPH03109350U true JPH03109350U (enrdf_load_stackoverflow) 1991-11-11

Family

ID=31519517

Family Applications (1)

Application Number Title Priority Date Filing Date
JP1623790U Pending JPH03109350U (enrdf_load_stackoverflow) 1990-02-22 1990-02-22

Country Status (1)

Country Link
JP (1) JPH03109350U (enrdf_load_stackoverflow)

Citations (2)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
JPS62293750A (ja) * 1986-06-13 1987-12-21 Nippon Telegr & Teleph Corp <Ntt> 配線板およびその製造方法
JPH02181465A (ja) * 1989-01-06 1990-07-16 Matsushita Electric Ind Co Ltd 半導体チップ実装方法

Patent Citations (2)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
JPS62293750A (ja) * 1986-06-13 1987-12-21 Nippon Telegr & Teleph Corp <Ntt> 配線板およびその製造方法
JPH02181465A (ja) * 1989-01-06 1990-07-16 Matsushita Electric Ind Co Ltd 半導体チップ実装方法

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