JPH03107844U - - Google Patents
Info
- Publication number
- JPH03107844U JPH03107844U JP1604090U JP1604090U JPH03107844U JP H03107844 U JPH03107844 U JP H03107844U JP 1604090 U JP1604090 U JP 1604090U JP 1604090 U JP1604090 U JP 1604090U JP H03107844 U JPH03107844 U JP H03107844U
- Authority
- JP
- Japan
- Prior art keywords
- data
- electronic device
- communication function
- diagram showing
- detection means
- Prior art date
- Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
- Pending
Links
- 238000004891 communication Methods 0.000 claims description 4
- 238000001514 detection method Methods 0.000 claims 3
- 230000006870 function Effects 0.000 claims 2
- 238000010586 diagram Methods 0.000 description 6
- 230000005540 biological transmission Effects 0.000 description 2
- 239000004973 liquid crystal related substance Substances 0.000 description 2
- 239000013078 crystal Substances 0.000 description 1
- 239000011521 glass Substances 0.000 description 1
- 230000010355 oscillation Effects 0.000 description 1
- 238000012856 packing Methods 0.000 description 1
- 230000002265 prevention Effects 0.000 description 1
Landscapes
- Calculators And Similar Devices (AREA)
- Communication Control (AREA)
- Electric Clocks (AREA)
- Power Sources (AREA)
Description
図面はこの考案の一実施例を示すもので、第1
図は外観構成を示す平面図、第2図は同側面図、
第3図は外部接続される電子手帳の外観を示す斜
視図、第4図はコネクタ部の具体構造を示す断面
図、第5図は電子回路の構成を示すブロツク図、
第6図は第5図のRAMの詳細な構成を示す図、
第7図はデータ通信で送受されるデータブロツク
の基本フオーマツトを示す図、第8図Aはモード
データのデータフオーマツトを示す図、第8図B
は実データのデータフオーマツトを示す図、第8
図Cは終了データのデータフオーマツトを示す図
、第9図はデータ処理全体の内容を示すフローチ
ヤート、第10図は第9図の送信処理の内容を示
すフローチヤート、第11図は第9図のキー処理
の内容を示すフローチヤート、第12図は他の回
路構成例を示すブロツク図である。
11……腕時計ケース、12……時計ガラス、
13……液晶デイスプレイ、14……コネクタ部
、15……キー入力群、15a……セツト(SE
T)キー、16……長孔、17……ピン、21…
…電子手帳、22……液晶表示部、23……数値
/四則演算キー、24……文字キー、25,27
……ケーブル、26……インターフエイス、31
……パイプ、32……ばね、33,38……防水
パツキン、34……ピン抜け防止部材、35……
端子、36……ジヤツク、37……裏蓋、41…
…水晶発振部、42,53,62……分周回路、
43……制御部、44,50……アンド回路、4
5……キー入力部、46……ROM、47……R
AM、47a……レジスタエリア、47b……電
話番号メモリ、47c……スケジユールメモリ、
47d……フリーデータメモリ、47e……ワー
クエリア、48……通信回路部、49……表示制
御部、51……フリツプフロツプ(F/F)、5
2,61……CR発振部、54……インバータ、
55……オア回路、56……表示部、57……外
部機器、58……電池。
The drawing shows one embodiment of this invention.
The figure is a plan view showing the external configuration, Figure 2 is a side view of the same,
FIG. 3 is a perspective view showing the external appearance of the electronic notebook connected to the outside, FIG. 4 is a sectional view showing the specific structure of the connector section, and FIG. 5 is a block diagram showing the configuration of the electronic circuit.
FIG. 6 is a diagram showing the detailed configuration of the RAM in FIG. 5,
Fig. 7 is a diagram showing the basic format of data blocks sent and received in data communication, Fig. 8A is a diagram showing the data format of mode data, and Fig. 8B
Figure 8 shows the data format of actual data.
Figure C is a diagram showing the data format of the end data, Figure 9 is a flowchart showing the contents of the entire data processing, Figure 10 is a flowchart showing the contents of the transmission process in Figure 9, and Figure 11 is a flowchart showing the contents of the transmission process in Figure 9. FIG. 12 is a flowchart showing the contents of the key processing shown in the figure, and FIG. 12 is a block diagram showing another example of the circuit configuration. 11...watch case, 12...watch glass,
13...Liquid crystal display, 14...Connector part, 15...Key input group, 15a...Set (SE
T) Key, 16... Long hole, 17... Pin, 21...
...Electronic notebook, 22...Liquid crystal display, 23...Numeric/arithmetic operation keys, 24...Character keys, 25, 27
...Cable, 26 ...Interface, 31
... Pipe, 32 ... Spring, 33, 38 ... Waterproof packing, 34 ... Pin removal prevention member, 35 ...
Terminal, 36...Jack, 37...Back cover, 41...
...Crystal oscillator, 42, 53, 62... Frequency dividing circuit,
43...Control unit, 44, 50...AND circuit, 4
5...Key input section, 46...ROM, 47...R
AM, 47a...Register area, 47b...Telephone number memory, 47c...Schedule memory,
47d...Free data memory, 47e...Work area, 48...Communication circuit section, 49...Display control section, 51...Flip-flop (F/F), 5
2, 61...CR oscillation section, 54...Inverter,
55...OR circuit, 56...display section, 57...external device, 58...battery.
Claims (1)
メモリに記憶可能な通信機能付電子機器において
、 電源電池の電圧値の低下を検出する検出手段と
、 この検出手段の検出結果に応じて上記データメ
モリへのデータ記録時のデータ転送速度を切換制
御する受信制御手段と を具備したことを特徴とする通信機能付電子機器
。[Scope of Claim for Utility Model Registration] In an electronic device with a communication function capable of storing received data sent from an external device in a data memory, a detection means for detecting a drop in the voltage value of a power supply battery, and detection by the detection means 1. An electronic device with a communication function, comprising: reception control means for switching and controlling a data transfer rate when recording data to the data memory according to the result.
Priority Applications (1)
Application Number | Priority Date | Filing Date | Title |
---|---|---|---|
JP1604090U JPH03107844U (en) | 1990-02-20 | 1990-02-20 |
Applications Claiming Priority (1)
Application Number | Priority Date | Filing Date | Title |
---|---|---|---|
JP1604090U JPH03107844U (en) | 1990-02-20 | 1990-02-20 |
Publications (1)
Publication Number | Publication Date |
---|---|
JPH03107844U true JPH03107844U (en) | 1991-11-06 |
Family
ID=31519327
Family Applications (1)
Application Number | Title | Priority Date | Filing Date |
---|---|---|---|
JP1604090U Pending JPH03107844U (en) | 1990-02-20 | 1990-02-20 |
Country Status (1)
Country | Link |
---|---|
JP (1) | JPH03107844U (en) |
-
1990
- 1990-02-20 JP JP1604090U patent/JPH03107844U/ja active Pending
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