JPH0310575A - Recording and reproducing device - Google Patents

Recording and reproducing device

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Publication number
JPH0310575A
JPH0310575A JP1145624A JP14562489A JPH0310575A JP H0310575 A JPH0310575 A JP H0310575A JP 1145624 A JP1145624 A JP 1145624A JP 14562489 A JP14562489 A JP 14562489A JP H0310575 A JPH0310575 A JP H0310575A
Authority
JP
Japan
Prior art keywords
recording
output
delay
delay circuit
circuit
Prior art date
Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
Pending
Application number
JP1145624A
Other languages
Japanese (ja)
Inventor
Mikito Ishii
石井 幹十
Current Assignee (The listed assignees may be inaccurate. Google has not performed a legal analysis and makes no representation or warranty as to the accuracy of the list.)
Victor Company of Japan Ltd
Original Assignee
Victor Company of Japan Ltd
Priority date (The priority date is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the date listed.)
Filing date
Publication date
Application filed by Victor Company of Japan Ltd filed Critical Victor Company of Japan Ltd
Priority to JP1145624A priority Critical patent/JPH0310575A/en
Publication of JPH0310575A publication Critical patent/JPH0310575A/en
Pending legal-status Critical Current

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  • Picture Signal Circuits (AREA)

Abstract

PURPOSE:To reduce cost and the number of components by using a delay circuit used for a color noise reduction circuit of a reproducing system so as to select it by a switch and using the delay circuit of the 2nd stag of a 3-line comb-line filter of a recording system in common. CONSTITUTION:An output of a 1H delay circuit 12 at recording is given to a noninverting output of a subtractor 26 via an LPF 14, a recording terminal of a switch SW and an input of other BPF 16. Three inputs of comb-line filter arithmetic section 24 respond to each output of BPFs 22, 16 and an output of a time matching delay compensation circuit 34 and its outputs is a color signal output. On the other hand, a reproduced color reproduced and separated from a video tape is subjected to frequency conversion and given to a CNR IC 30 and the 1H delay circuit input connection terminal 30a is connected to other terminal of the switch SW. An input terminal of a CNR 1H delay circuit 32 is connected to an output terminal of the switch SW and an output of the CNR IC 30 is used as a color signal output.

Description

【発明の詳細な説明】 [産業上の利用分野] 本発明はビデオ信号の記録再生装置に関し、特に記録系
にロジカルコムフィルタを用い、再生系にカラーノイズ
低減回路を有する記録再生装置の改良に関する。
[Detailed Description of the Invention] [Industrial Application Field] The present invention relates to a video signal recording and reproducing device, and particularly relates to an improvement of a recording and reproducing device that uses a logical comb filter in the recording system and has a color noise reduction circuit in the reproducing system. .

[従来の技術] ビデオ信号を記録する記録再生装置であるVTRでは記
録系に輝度信号と色信号分離のために3ライン型ロジカ
ルコム(クシ型)フィルタを用いたものがあり、又再生
系にはカラーノイズ低減回路を有しているものがある。
[Prior Art] Some VTRs, which are recording and reproducing devices that record video signals, use a 3-line logical comb filter in the recording system to separate luminance signals and color signals, and in the reproducing system. Some have a color noise reduction circuit.

第2図はかかる従来のVTRの記録系と再生系の要部を
抽出して示したブロック図である。記録系のロジカルコ
ムフィルタIOは入力コンボジットビデオ信号をIH(
1水平期間)遅延するCCD遅延回路12と、その出力
を更にIH遅延するCCD遅延回路18を有しており、
遅延しない入力コンポジット信号とそのIHH延信号と
2H遅遅延骨を用いて色信号Cを分離するコムフィルタ
演算部24とIHH延信号から色信号Cを減算して輝度
信号Yを送出する減算器26を有している。CCD遅延
回路18の代りにガラス遅延線を用いているものもある
FIG. 2 is a block diagram showing the main parts of the recording system and reproduction system of such a conventional VTR. The recording system's logical comb filter IO converts the input composite video signal into IH (
1 horizontal period), and a CCD delay circuit 18 that further delays the output by IH.
A comb filter operation unit 24 that separates the color signal C using the non-delayed input composite signal, its IHH extended signal, and the 2H delayed delay bone, and a subtracter 26 that subtracts the color signal C from the IHH extended signal and sends out a luminance signal Y. have. Some devices use a glass delay line instead of the CCD delay circuit 18.

一方再生系のカラーノイズ低減回路(CNR)28はC
NR用IC30とガラス遅延線よりなるIH遅延回路3
2を有している。
On the other hand, the color noise reduction circuit (CNR) 28 of the reproduction system is C
IH delay circuit 3 consisting of NR IC30 and glass delay line
It has 2.

[発明が解決しようとする課題] かかる従来の記録再生装置では遅延素子として比較的安
価なガラス遅延線からなる遅延回路1個の他に比較的高
価なCCD遅延回路を2個、あるいはガラス遅延線から
なる遅延回路2個とCCD遅延回路1個を必要とし、全
部で3個の遅延回路が必要なため全体の回路構成が複雑
であると共にコスト高となるという問題点があった。
[Problems to be Solved by the Invention] In such a conventional recording and reproducing device, in addition to one delay circuit made of a relatively inexpensive glass delay line as a delay element, two relatively expensive CCD delay circuits or a glass delay line are used. This requires two delay circuits consisting of a CCD delay circuit and one CCD delay circuit, making a total of three delay circuits, resulting in a problem that the overall circuit configuration is complicated and the cost is high.

従って本発明は比較的高価なCCD遅延回路の個数を削
減して低コスト化を図ると共に簡単な回路構成の記録再
生装置を提供することを目的とする。
Therefore, an object of the present invention is to reduce the number of relatively expensive CCD delay circuits to reduce costs, and to provide a recording/reproducing apparatus having a simple circuit configuration.

[課題を解決するための手段] 上記目的を達成するため本発明では、ロジカルコムフィ
ルタにおける後段の遅延素子としてCNR用の安価なガ
ラス遅延素子を共用する構成としている。
[Means for Solving the Problems] In order to achieve the above object, the present invention adopts a configuration in which an inexpensive glass delay element for CNR is commonly used as a subsequent delay element in a logical comb filter.

すなわち本発明によれば入力ビデオ信号を1水平期間の
整数倍遅延する第1遅延手段と前記第1遅延手段の出力
信号を更に1水平期間の整数倍遅延する第2遅延手段と
を有する3ライン型Y/C分離フィルタを記録系に有し
、再生系には、再生カラー信号のライン相関を利用した
カラーノイズ低減回路であって第3遅延手段を備えたも
のを有する記録再生装置において、前記第2及び第3遅
延手段を単一の遅延手段とし、この単一の遅延手段の入
力として記録時には前記第1遅延手段の出力信号を、再
生時には前記カラーノイズ低減回路の所定部分の信号を
与える切換手段を設けたことを特徴とする記録再生装置
が提供される。
That is, according to the present invention, there are three lines including a first delay means for delaying an input video signal by an integral number of one horizontal period, and a second delay means for further delaying the output signal of the first delay means by an integral number of one horizontal period. A recording/reproducing apparatus having a type Y/C separation filter in the recording system and having a color noise reduction circuit using line correlation of reproduced color signals in the reproduction system and equipped with a third delay means, The second and third delay means are a single delay means, and the output signal of the first delay means is given as an input to the single delay means during recording, and the signal of a predetermined portion of the color noise reduction circuit is given during playback. A recording/reproducing device is provided which is characterized by being provided with a switching means.

[作用] 本発明の記録再生装置では記録時には上記切換手段によ
り第1遅延手段の出力信号が共用の単一の遅延手段に与
えられて更に遅延された後コムフィルタ演算部に与えら
れ色信号が作られる。一方再生時には上記切換手段によ
り上記共用の単一遅延手段の入力端子はCNR用ICの
所定端子に接続されてカラーノイズ低減作用が行われる
[Function] In the recording/reproducing apparatus of the present invention, during recording, the switching means applies the output signal of the first delay means to the shared single delay means, and after further delaying, the output signal is applied to the comb filter operation section, so that the color signal is Made. On the other hand, during reproduction, the switching means connects the input terminal of the shared single delay means to a predetermined terminal of the CNR IC, thereby performing a color noise reduction effect.

[実施例] 以下図面と共に本発明の実施例について説明する。[Example] Embodiments of the present invention will be described below with reference to the drawings.

第1図は本発明の実施例としての記録再生装置の記録系
と再生系の要部を示すブロック図である。
FIG. 1 is a block diagram showing the main parts of a recording system and a reproducing system of a recording/reproducing apparatus as an embodiment of the present invention.

本実施例では、従来の再生系のCNR回路に用いられて
いたガラス遅延線よりなる1)(遅延回路32を記録系
の2段目の遅延回路として兼用している。
In this embodiment, the delay circuit 32 made of a glass delay line used in the conventional CNR circuit of the reproduction system is also used as the second stage delay circuit of the recording system.

すなわち、記録時と再生時に所定の制御信号によって切
り換る切換手段としてのスイッチSWによりこの遅延回
路32の入力信号を切り換えている。
That is, the input signal of the delay circuit 32 is switched by a switch SW, which is a switching means that is switched by a predetermined control signal during recording and reproduction.

図中従来例を示す第2図と同一部分は同一番号で示され
ている。
In the figure, the same parts as in FIG. 2 showing the conventional example are designated by the same numbers.

入力コンポジット信号はIH遅延回路12とBPF22
に与えられている。IH遅延回路12の出力はLPF1
4を介して減算器26の十出力と、スイッチSWの記録
側端子と他のB P F 16の入力に与えられている
。コムフィルタ演算部24の3つの入力はBPF22.
16の各出力と後述する時間合わせ用遅延補償回路34
の出力に応答し、その出力は色信号出力となると共に減
算器26の一人力に与えられている。減算器25の出力
は輝度信号出力となっている。これらの輝度信号出力と
色信号出力は公知の処理回路を経て図示しない記録アン
プを介してヘッドに与えられてビデオテープに記録され
る。
Input composite signal is IH delay circuit 12 and BPF 22
is given to. The output of the IH delay circuit 12 is LPF1
4 to the output of the subtracter 26, the recording side terminal of the switch SW, and the input of the other B P F 16. The three inputs of the comb filter calculation unit 24 are BPF 22.
16 outputs and a delay compensation circuit 34 for time adjustment, which will be described later.
In response to the output of the subtractor 26, the output becomes a color signal output and is also applied to the subtracter 26. The output of the subtracter 25 is a luminance signal output. These luminance signal outputs and chrominance signal outputs are sent to the head via a recording amplifier (not shown) after passing through a known processing circuit and are recorded on a videotape.

一方ビデオテーブから再生されて分離された再生色信号
は周波数変換された後CNR用IC30に与えられてお
り、そのIH遅延回路入力接続端子30aはスイッチS
Wの他の端子に接続されている。
On the other hand, the reproduced color signal reproduced and separated from the video tape is frequency-converted and then applied to the CNR IC 30, whose IH delay circuit input connection terminal 30a is connected to the switch S.
Connected to other terminals of W.

CNR用IH遅延回路32の入力端子はスイッチSWの
出力端子に接続され、出力端子はCNR用IC30のI
H遅延回路出力接続端子30bと時間合わせ用遅延補償
回路34の入力に与えられている。CNR用Ic30の
出力は色信号出力として用いられる。
The input terminal of the IH delay circuit 32 for CNR is connected to the output terminal of the switch SW, and the output terminal is connected to the IH delay circuit 32 for CNR.
It is applied to the H delay circuit output connection terminal 30b and the input of the time adjustment delay compensation circuit 34. The output of the CNR IC 30 is used as a color signal output.

第1図の回路構成では従来例の第2図と異なりBPF1
6の出力でなくその前段のLPF14の出力がスイッチ
SWを介してIH遅延回路32に与えられている。これ
は、このIH遅延回路32がガラス遅延回路からなって
いるため、それ自体にBPF特性があるからである。
In the circuit configuration shown in Figure 1, unlike the conventional example shown in Figure 2, the BPF1
6, but the output of the LPF 14 at the preceding stage is provided to the IH delay circuit 32 via the switch SW. This is because the IH delay circuit 32 is made of a glass delay circuit and therefore has BPF characteristics.

上記実施例ではスイッチSWの後段に配した遅延回路3
2はガラス遅延線であったが、これに限らずCCD遅延
回路を用いることもできる。この場合は時間合わせ用遅
延補償回路34は不要となるが、その代りに従来例のB
PF16と同様のBPFを挿入しておく必要がある。又
、各遅延回路はIH遅延を行うものであったが、これは
NTS C方式の場合に適合するものであり、PAL方
式では2H遅延する必要があり、方式に応じてIHの整
数倍の遅延回路とすることができる。
In the above embodiment, the delay circuit 3 is arranged after the switch SW.
Although 2 is a glass delay line, the present invention is not limited to this, and a CCD delay circuit may also be used. In this case, the delay compensation circuit 34 for time adjustment becomes unnecessary, but instead, the conventional B
It is necessary to insert a BPF similar to PF16. Also, each delay circuit performs an IH delay, but this is compatible with the NTSC system, and the PAL system requires a 2H delay, and depending on the system, a delay of an integral multiple of IH is required. It can be a circuit.

以上詳細に説明したところから明らかなように、本発明
の記録再生装置では再生系のカラーノイズ低減回路に用
いる遅延回路をスイッチで切り換えて記録系の3ライン
型コムフイルタの2段目の遅延回路と兼用しているので
、部品点数の削減、コスト低減を図ることができる。
As is clear from the detailed explanation above, in the recording and reproducing apparatus of the present invention, the delay circuit used in the color noise reduction circuit of the reproduction system is switched by a switch, and the delay circuit used in the second stage of the three-line comb filter of the recording system is switched. Since it is used for both purposes, it is possible to reduce the number of parts and reduce costs.

【図面の簡単な説明】[Brief explanation of drawings]

第1図は本発明の記録再生装置の実施例の記録系と再生
系の要部を示すブロック図、第2図は従来の記録再生装
置の記録系と再生系の要部を示すブロック図である。 12、32・・・遅延回路、 14・・・LPF、  
16.22・・・BPF、  24・・・コムフィルタ
演算部、 26・・・減算器、 30・・・CNR用I
C,SW・・・スイッチ。 発明者  石井幹十
FIG. 1 is a block diagram showing the main parts of the recording system and playback system of an embodiment of the recording/playback apparatus of the present invention, and FIG. 2 is a block diagram showing the main parts of the recording system and playback system of a conventional recording/playback apparatus. be. 12, 32...Delay circuit, 14...LPF,
16.22... BPF, 24... Comb filter calculation unit, 26... Subtractor, 30... I for CNR
C, SW...Switch. Inventor: Mikiju Ishii

Claims (1)

【特許請求の範囲】[Claims] (1)入力ビデオ信号を1水平期間の整数倍遅延する第
1遅延手段と前記第1遅延手段の出力信号を更に1水平
期間の整数倍遅延する第2遅延手段とを有する3ライン
型Y/C分離フィルタを記録系に有し、再生系には、再
生カラー信号のライン相関を利用したカラーノイズ低減
回路であって第3遅延手段を備えたものを有する記録再
生装置において、前記第2及び第3遅延手段を単一の遅
延手段とし、この単一の遅延手段の入力として記録時に
は前記第1遅延手段の出力信号を、再生時には前記カラ
ーノイズ低減回路の所定部分の信号を与える切換手段を
設けたことを特徴とする記録再生装置。
(1) A 3-line Y/R having a first delay means for delaying an input video signal by an integral number of one horizontal period, and a second delay means for further delaying the output signal of the first delay means by an integral number of one horizontal period. In the recording and reproducing apparatus, the recording system includes a C separation filter, and the reproducing system includes a color noise reduction circuit that utilizes line correlation of reproduced color signals and is equipped with a third delay means. The third delay means is a single delay means, and a switching means is provided for supplying the output signal of the first delay means as input to the single delay means during recording and the signal of a predetermined portion of the color noise reduction circuit during reproduction. A recording/reproducing device characterized in that:
JP1145624A 1989-06-08 1989-06-08 Recording and reproducing device Pending JPH0310575A (en)

Priority Applications (1)

Application Number Priority Date Filing Date Title
JP1145624A JPH0310575A (en) 1989-06-08 1989-06-08 Recording and reproducing device

Applications Claiming Priority (1)

Application Number Priority Date Filing Date Title
JP1145624A JPH0310575A (en) 1989-06-08 1989-06-08 Recording and reproducing device

Publications (1)

Publication Number Publication Date
JPH0310575A true JPH0310575A (en) 1991-01-18

Family

ID=15389317

Family Applications (1)

Application Number Title Priority Date Filing Date
JP1145624A Pending JPH0310575A (en) 1989-06-08 1989-06-08 Recording and reproducing device

Country Status (1)

Country Link
JP (1) JPH0310575A (en)

Citations (2)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
JPS5710139U (en) * 1980-06-17 1982-01-19
JPS63232782A (en) * 1987-03-20 1988-09-28 Victor Co Of Japan Ltd Luminance signal-color difference signal separating circuit

Patent Citations (2)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
JPS5710139U (en) * 1980-06-17 1982-01-19
JPS63232782A (en) * 1987-03-20 1988-09-28 Victor Co Of Japan Ltd Luminance signal-color difference signal separating circuit

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