JPH03102738U - - Google Patents

Info

Publication number
JPH03102738U
JPH03102738U JP1216590U JP1216590U JPH03102738U JP H03102738 U JPH03102738 U JP H03102738U JP 1216590 U JP1216590 U JP 1216590U JP 1216590 U JP1216590 U JP 1216590U JP H03102738 U JPH03102738 U JP H03102738U
Authority
JP
Japan
Prior art keywords
tray
semiconductor wafer
spring
similar
cover
Prior art date
Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
Pending
Application number
JP1216590U
Other languages
Japanese (ja)
Priority date (The priority date is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the date listed.)
Filing date
Publication date
Application filed filed Critical
Priority to JP1216590U priority Critical patent/JPH03102738U/ja
Publication of JPH03102738U publication Critical patent/JPH03102738U/ja
Pending legal-status Critical Current

Links

Description

【図面の簡単な説明】[Brief explanation of drawings]

第1図は本考案の半導体ウエハ梱包トレイの一
実施例を示す説明図、第2図及び第3図は夫々従
来の梱包トレイの分解図及び組立図である。 1……トレイ、2,2A,2B……ウエハ、5
……カバー、6……スプリング。
FIG. 1 is an explanatory diagram showing one embodiment of the semiconductor wafer packaging tray of the present invention, and FIGS. 2 and 3 are an exploded view and an assembled view, respectively, of a conventional packaging tray. 1...Tray, 2, 2A, 2B...Wafer, 5
...Cover, 6...Spring.

Claims (1)

【実用新案登録請求の範囲】[Scope of utility model registration request] 半導体ウエハをトレイに収納してその上面より
スプリングで押え、その上をカバーで蓋をして梱
包する半導体ウエハ梱包トレイにおいて、前記ス
プリングが上下相似の形状を有し、前記カバーの
内面が前記トレイの内面と相似の形状を具え、前
記トレイに前記半導体ウエハが収納された後その
上面に前記上下相似形スプリングが配置され、該
スプリングの上方には別の半導体ウエハが載せら
れてその上方より内面形状がトレイ内面形状と相
似の前記カバーが被せられ、前記二枚の半導体ウ
エハが前記上下相似形スプリングにより上下方向
に押圧されてなる構造を有することを特徴とする
半導体ウエハ梱包トレイ。
In a semiconductor wafer packaging tray in which a semiconductor wafer is stored in a tray and pressed from the upper surface with a spring, and then covered with a cover for packaging, the spring has a top and bottom similar shape, and the inner surface of the cover is pressed against the tray. After the semiconductor wafer is stored in the tray, the upper and lower similar springs are disposed on the upper surface of the tray, and another semiconductor wafer is placed above the spring, and the inner surface is formed from above. A semiconductor wafer packaging tray, characterized in that the tray is covered with the cover having a shape similar to the inner surface of the tray, and the two semiconductor wafers are pressed in the vertical direction by the upper and lower springs having similar shapes.
JP1216590U 1990-02-09 1990-02-09 Pending JPH03102738U (en)

Priority Applications (1)

Application Number Priority Date Filing Date Title
JP1216590U JPH03102738U (en) 1990-02-09 1990-02-09

Applications Claiming Priority (1)

Application Number Priority Date Filing Date Title
JP1216590U JPH03102738U (en) 1990-02-09 1990-02-09

Publications (1)

Publication Number Publication Date
JPH03102738U true JPH03102738U (en) 1991-10-25

Family

ID=31515655

Family Applications (1)

Application Number Title Priority Date Filing Date
JP1216590U Pending JPH03102738U (en) 1990-02-09 1990-02-09

Country Status (1)

Country Link
JP (1) JPH03102738U (en)

Cited By (1)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
JP2014507072A (en) * 2011-02-16 2014-03-20 テックスチェム アドバンスド プロダクツ インコーポレイテッド スンディリアン ブルハド 1-stage and 2-stage wafer cushioning materials

Cited By (1)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
JP2014507072A (en) * 2011-02-16 2014-03-20 テックスチェム アドバンスド プロダクツ インコーポレイテッド スンディリアン ブルハド 1-stage and 2-stage wafer cushioning materials

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