JPH03100994U - - Google Patents
Info
- Publication number
- JPH03100994U JPH03100994U JP879590U JP879590U JPH03100994U JP H03100994 U JPH03100994 U JP H03100994U JP 879590 U JP879590 U JP 879590U JP 879590 U JP879590 U JP 879590U JP H03100994 U JPH03100994 U JP H03100994U
- Authority
- JP
- Japan
- Prior art keywords
- state
- display
- data
- data storage
- storage means
- Prior art date
- Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
- Pending
Links
- 238000013500 data storage Methods 0.000 claims 3
- 238000010586 diagram Methods 0.000 description 6
- 238000000034 method Methods 0.000 description 2
Landscapes
- Digital Computer Display Output (AREA)
Description
第１図はこの考案の機能ブロツク図、第２図〜
第８図は実施例を示し、第２図はＥＣＲの全体構
成を示したブロツク図、第３図は前回操作内容メ
モリ２０の構成とデータセツト例を示した図、第
４図は登録モードの動作を示したフローチヤート
、第５図は第３図の置数処理を示したフローチヤ
ート、第６図は第３図のクリア処理を示したフロ
ーチヤート、第７図は第３図の登録・その他の機
能処理を示したフローチヤート、第８図はキー操
作例と表示内容を示した図、第９図は従来のキー
操作例と表示内容を示した図である。
１１……ＣＰＵ、１２……ＲＯＭ、１３……キ
ー入力部、１４……表示部、１４−１……メイン
表示装置、１４−２……サブ表示装置、１７……
表示駆動部、１９−１……メイン表示バツフア、
１９−２……サブ表示バツフア、２０……前回操
作内容メモリ。
Figure 1 is a functional block diagram of this invention, Figure 2~
FIG. 8 shows an embodiment, FIG. 2 is a block diagram showing the overall configuration of the ECR, FIG. 3 is a diagram showing the configuration of the previous operation content memory 20 and an example of data set, and FIG. 4 is a diagram showing the registration mode. A flowchart showing the operation, FIG. 5 is a flowchart showing the number setting process in FIG. 3, FIG. 6 is a flowchart showing the clearing process in FIG. 3, and FIG. FIG. 8 is a flowchart showing other functional processing, FIG. 8 is a diagram showing an example of key operation and display contents, and FIG. 9 is a diagram showing an example of conventional key operation and display contents. 11...CPU, 12...ROM, 13...Key input unit, 14...Display unit, 14-1...Main display device, 14-2...Sub display device, 17...
Display drive section, 19-1...main display buffer,
19-2...Sub display buffer, 20...Previous operation content memory.
Claims (1)
記憶手段と、 以前入力されたデータを記憶する第２のデータ
記憶手段と、 現在の入力状態が予め決められている特定状態
か通常状態かを判別する判別手段と、 この判別手段で特定状態であると判別された際
に前記第１および第２のデータ記憶手段内のデー
タを同時に前記表示手段へ表示出力させ、通常状
態であると判別された際に前記第１のデータ記憶
手段内のデータを前記表示手段へ表示出力させる
表示制御手段と、 を具備したことを特徴とする表示制御装置。[Claims for Utility Model Registration] A display means having a plurality of display areas, a first data storage means for storing currently input data, and a second data storage means for storing previously input data. , a determining means for determining whether the current input state is a predetermined specific state or a normal state; and when the determining means determines that the current input state is the specific state, a Display control means for displaying and outputting data to the display means at the same time, and displaying and outputting data in the first data storage means to the display means when it is determined that the state is normal. display control device.
Priority Applications (1)
| Application Number | Priority Date | Filing Date | Title |
|---|---|---|---|
| JP879590U JPH03100994U (en) | 1990-01-31 | 1990-01-31 |
Applications Claiming Priority (1)
| Application Number | Priority Date | Filing Date | Title |
|---|---|---|---|
| JP879590U JPH03100994U (en) | 1990-01-31 | 1990-01-31 |
Publications (1)
| Publication Number | Publication Date |
|---|---|
| JPH03100994U true JPH03100994U (en) | 1991-10-22 |
Family
ID=31512413
Family Applications (1)
| Application Number | Title | Priority Date | Filing Date |
|---|---|---|---|
| JP879590U Pending JPH03100994U (en) | 1990-01-31 | 1990-01-31 |
Country Status (1)
| Country | Link |
|---|---|
| JP (1) | JPH03100994U (en) |
-
1990
- 1990-01-31 JP JP879590U patent/JPH03100994U/ja active Pending
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