JPH03100949A - Recording tape velocity discriminating device - Google Patents

Abstract

PURPOSE:To reduce erroneous discrimination by executing the change of mode discrimination when the abnormal state of a phase locked signal is continuously counted n-times, and initializing the count of the abnormal state when a normal state is continuously counted m-times. CONSTITUTION:The phase lock signal is obtained by the constitution of a figure. It is checked whether the phase locked signal is an H level or not. When it is the H level, the contents of a counter 1 to continuously count the H level state are added by 1. Then, the contents of a counter 2 to count an L level state are reset. Afterwards, the contents of the counter 1 are checked and when it is more than 4, the discrimination mode is changed. On the other hand, when the phase lock signal is an L level, the contents of the counter 2 are added by 1. Next, the contents of the counter 2 are checked and when it is more than 8, the counter 1 is reset. Thus, since the L level is made continuous 8 times and the counter 1 is set before the H level of the phase locked signal is made continuous 4 times, there is no danger of erroneous discrimination.

Description

DETAILED DESCRIPTION OF THE INVENTION (a) Field of Industrial Application The present invention relates to a recording tape speed determination device during high-speed playback in a VTR that employs the so-called ATF racking method, which is the standard for 8 mm VTRs.

(b) Conventional technology 8mm video, instead of forming a control track like a general VTR, superimposes a tracking pilot signal on the video track and extracts the beat component from the injected pilot signal during playback and its level. Tracking is possible according to the difference.

On the other hand, 8mm video has a standard recording mode and a double long-time recording mode, making it necessary to determine the recording mode during playback. Furthermore, the playback modes include a normal playback mode and a forward and reverse high-speed playback mode called picture search, and the recording mode can be determined regardless of the tape speed during playback. desirable.

In JP-A-61-1179, a tracking error signal is derived while switching the frequency of an injection pilot signal with a field period, and the frequency of this tracking error signal is divided according to the tape speed, and then the period of the divided output is identified. A method for determining the recording mode is shown.

By the way, there are two ways to create a tracking error signal in high-speed playback mode: one is to switch the frequency of the injection pilot signal to ff4, fl, f in the field period as described above, and the other is to create a tracking error signal for all tracks traced by the video head. There is a method of creating a tracking error signal by sequentially switching injection pilot signals corresponding to the following.

Regarding the latter method, for example, JP-A-59-19197
There is a disclosure in Publication No. 9. The latter method is said to be superior in terms of servo stability and other factors.

However, when this latter method is used, the method disclosed in the above-mentioned Japanese Unexamined Patent Publication No. 1179/1983 cannot be adopted as a recording mode discrimination method. Therefore, the applicant has proposed a device that takes the above points into consideration. FIG. 7 is a block diagram, FIG. 2 is a flowchart showing the operation of the microcomputer, and FIGS. 3, 4, and 5 are explanatory diagrams.

In FIG. 7, (1) is an input terminal for a reproduction pilot signal, (2) is an input terminal for an RF switching pulse related to the head rotation phase, (3) is an input terminal for a signal specifying high-speed reproduction, and (4) is an input terminal for a signal specifying high-speed reproduction. is the ATF error signal output terminal, (
5) is an output terminal for determining the recording tape speed.

(6) is a mixing circuit, (7) is an injection pilot signal generation circuit, (8) is a timing control circuit that controls this injection pilot signal generation circuit (7), etc., and (9) is a 47KHz (
] band pass filter (B P F),
(10) is the first detection circuit, (11) is 16K) 1z
(advanced beat) band pass filter (BP F>
, (12) is a second detection circuit.

(13) is the first. A differential amplifier that receives the outputs of the second detection circuit (1o) and (12), (14) the first sample and hold circuit, and (15) the second sample and hold circuit, both sample and hold circuits (14) ) (15) is controlled by a timing control circuit (8).

(16) is a first comparator that receives the output of the second sample and hold circuit (15), (17) is a low pass filter (LPF), (18) is a second comparator, (
19) is a microcomputer that outputs a recording tape speed determination output.

The first comparator (16) outputs an L level when the second sample and hold circuit (15) output (changes between θ and 5V) is higher than a certain level (2.5V), and outputs an L level when it is lower than a certain level (2,5V). On the other hand, it is set to output H level when high and L level when low. Broken line (20) is IC (CX22022)
It shows.

The operation during high-speed playback will be explained based on FIG. 3 (9x speed, normal forwarding). FIG. 3(a) shows how the video head traces the recorded tracks when the recording is performed normally using the track pattern coordinate method. And■■
■■ indicates pilot signals f1, f7, f, , f4.

(b) shows the RF switching pulse, and (c) shows the envelope of the reproduced output and the reproduced pilot signal. (
D) shows the injection pilot signal, and (E) shows the output of the differential amplifier (13).

Once the high-speed playback speed is determined, it is known how to trace the track, and it is then determined how to switch the frequency of the injection pilot signal. When playing at 9x speed, one field is basically divided into nine parts, and the resulting pilot signal is f + (= 102
, 5 KHz), then r, fs (=119
．． When 0KI(z), f s (= 148, 7
KHz), f is supplied when fs (=165.2 KHz), and fl is supplied when f4.

Actually, it is sufficient to output in the order fl, f<, f3, f.

Then, in order to determine whether the phase is locked, a phase lock signal is further generated. In other words, when the phase is locked and the noise bar is fixed during high-speed playback, the ATF at either level of f(fJhL)
In order to obtain an error signal, the frequency of the partially injected pilot signal is made to deviate from the regulations mentioned above. In other words, in a certain section (A), if an injection pilot signal with a frequency corresponding to the previous or next track is inserted at the center (A)° of that section, when the phase is correctly locked, L A level or H level pilot signal is obtained. In other words, it means that it is ahead or behind it by l tracks.

In the example, the center (A) of the section (A) at the center of the screen
°, an injection pilot signal with a frequency corresponding to the next track is inserted. Therefore, if the phase is properly locked in the center of this section, an H level output (output of the differential amplifier (13)) is always obtained. If the phase is not locked and a noise bar flows, the level of this phase lock signal will fluctuate randomly. When phase lock is released, long-term recording (LP) is performed using tape recorded in standard recording (SP) mode.
) mode for 9x high speed playback (4 or 5x playback) or (il!5 diagram), or when performing 9f high speed playback in SP mode for a tape recorded in LP mode ( This also includes a state in which playback is performed at a mode different from the tape speed at the time of recording, such as 18x playback (see FIG. 4).

The ATF error signal is sent to the first sample and hold circuit (14)
is obtained as the output of Further, the phase lock signal is the output of the second sample and hold circuit (15).

The timing control circuit (8) controls the creation of the injection pilot signal and the sample/hold of the first and second sample and hold circuits (14) and (15) in accordance with the timing shown in FIG. During high-speed reproduction, a 9x speed designation signal is applied, and the timing control circuit (8) controls the frequency of the injection pilot signal to change as shown in (d) in synchronization with the RF switching pulse (b).

The second sample and hold circuit (15) samples the output (E) of the differential amplifier (13) at a predetermined timing in the interval (A)°, and is controlled to hold the value during other periods. The first sample and hold circuit (14) is
Section (A) is controlled to sample and hold the previous value, and removes interference of the phase lock signal with respect to the ATF error signal.

The first comparator (16) that receives the output of the second sample and hold circuit (15) inverts the output as described in 1-1, so when the phase is locked and the correct tape speed is determined, it is at the L level. The output of I C (20)
is obtained at the terminal (21). Conversely, when the phase is not locked, a random output is obtained at the terminal (21).

The phase lock signal of this terminal (21) is applied to a low-pass filter (17), and the smoothed output is compared with the power supply voltage 172 (2.5V) by a second comparator (18).

In other words, when the phase is not locked, the terminal (21
) is in a random state of H level and L level, so L P F (17) produces an output of a certain level. The occurrence of this output is detected by the $2 comparator (18), that is, when a random output is obtained, the output of the second comparator (18) is set to H level.

The output of the first sample and hold circuit (14) is applied to the capstan servo circuit via a suitable low-pass filter.

As described above, the microcomputer (19) makes a final determination of the recording tape speed and outputs an SP/LP determination output. The operation is performed by interrupt processing based on detection of rising and falling edges of the RF switching pulse.

That is, when the edge of the RF switching pulse is detected, a high-speed reproduction determination routine is entered to check whether the terminal (22) of the microcomputer (19) is at H level. - If it is not a level, reset the counter R1 and return to the main routine. If H level is detected, counter R
The value of 1 is increased by 1, and it is checked whether the value of counter R1 is greater than 60.

High-speed playback is performed by operating the fast-forward and rewind buttons in normal playback mode. Therefore, the counter R1 is always reset during normal playback. Also, the tape speed in high-speed playback corresponds to the determination result in the previous normal playback (and if the recording tape speed of the tape changes from the middle of high-speed playback, the determination in high-speed playback mode required).

If it is less than 60, the phase lock has been out for less than 1 second, and the process returns to the main routine. 60
If it is larger than , the determination of the recording tape speed at that point is reversed (if it is in SP mode, it changes to LP mode,
If you are in LP mode, change to SP mode). Further, when this mode is reversed, the counter R1 is reset. Then return to the main routine.

In other words, the microcomputer (19) considers that the tape speed is incorrect if the phase lock continues for longer than a certain period of time.

This predetermined time must be longer than the time required from when the high-speed playback state is specified until the phase is locked.

Note that the output from the terminal (21) of the IC (20) may be directly input to the microcomputer (19) to determine whether the output changes randomly. For example, the following methods can be considered. That is, the predetermined field period (X)
In this method, the number of fields (Y) for which the output of the terminal (21) becomes II is measured, and when this (Y) becomes larger than, for example, (XX4), the reproduction mode is reversed.

A 70-chart showing this operation is shown in FIG. The predetermined field period (X) is set to 60 fields. Due to the RF edge interrupt operation, the value of register X (indicating the number of RF edges) is increased by "1" (61),
Check whether the TF lock signal is at the "1 (" level) (62). r If it is at the HJ level, register Y (AT
(indicating the number of times the F lock signal is at H level) is increased by 1 (63), and after that, and when the ATF lock signal is not at H level, check whether the value of register X is "60" (64) , if it is "60", set the value of register X to rQJ (65), otherwise return to the original process (69).

After setting register X to "0", it is checked whether the value of register Y is "15" or more (66). "15
'', the process returns to the original process (69). Register Y
If the value is "15" or more, the playback mode is considered to be incorrect, so change the SP mode to LP mode and
The mode is reversed to SP mode (67). After the value of register Y is set to rQJ (68), the process returns to the original process.

In this case, the contents of registers X and Y must be set to "0" before entering the high-speed playback mode. In a VTR configured such that the high-speed playback mode can only be set from the normal playback mode, the values of registers X and Y may be set to "0" in the normal playback mode.

The comparison value of the value of register Y is set to be 1/4 or more of X in the above example, but this is determined by the SP of the ATF error signal in the VTR to which the present invention is applied. be. That is, even if high-speed reproduction is performed in the correct mode (SP or LP), if the S balance is poor, the ATF lock signal may become "H" level. Therefore, it is desirable to set the comparison value to a value that does not cause such discrimination through experiments.

(c) Problems to be Solved by the Invention However, the conventional method described above has a drawback in that the time required for discrimination is relatively long. For example, the methods shown in FIGS. 2 and 6 require at least 1 second for determination. This is to prevent misjudgment.

(d) Means for solving the problem In the present invention, in order to shorten the time required for discrimination and prevent misjudgment, phase lock signals are counted and an abnormal state continues n times in a row. The present invention is characterized in that the determination result is sometimes changed, and when the normal state of the phase lock signal continues m times, the count of the abnormal states is initialized.

(E) Effect: In other words, if the abnormal state of the phase lock signal continues once without the normal state of the phase lock signal continuing m times, the mode determination is changed. Therefore, by selecting n to a relatively small value, it is possible to quickly determine if there is indeed a mode change. At the same time, if a normal state continues m times, the count of abnormal states is initialized, eliminating the possibility of misjudgment.

(F) EXAMPLES The present invention will be described in detail below with reference to the drawings. The basic operation of the present invention is realized by a program. FIG. 1 is a flowchart showing the operation. Incidentally, the ATF lock signal is obtained by the configuration shown in FIG. 7 as in the conventional example.

In this discrimination processing routine, it is first checked whether the ATF (phase) lock signal is at H level. If it is H level, a counter l that continuously counts the H level state.
Increase the contents of (register l that stores the counted value) by one. Counter 2 counts the L level state of the phase lock signal (register 2 that stores the value of the number of stitches)
Set the contents of .

After that, check the contents of counter l, and if it is 4 or more, change the discrimination mode (if the result up to now is SP mode, change to LP mode, conversely, if it is LI' mode, change to SP mode) ). If it is 3 or less, do nothing and move on to the next process.

On the other hand, if the phase lock signal is at L level, the contents of counter 2 that counts the L level state of the phase lock signal are set to 1.
Increase by one. Next, the content of the counter 2 is checked, and if it is 8 or more, the counter 1, which counts the H level of the phase lock signal, is reset.

If it is less than 8, do nothing and move on to the next process.

Therefore, if the recording mode is changed during playback operation, 4
The mode can be determined by determining the phase lock signal.

On the other hand, in a state where the recording mode has not actually changed, the counter 1 is reset by the L level 8 times in a row before the phase lock signal ■ There is no risk of

Note that the threshold value 8 for counting the L level is determined in consideration of the characteristics of the capstan servo. In other words, the above determination is performed in one field cycle), but considering the characteristics of the servo in this embodiment, the normal phase lock signal indicating that the phase is locked is not detected for eight field periods. Level L
If this continues, it can be determined that the phase is correctly locked. Therefore, if this occurs eight or more times in a row, the counter l is reset. Therefore, the value of im changes depending on the servo characteristics (pull-in characteristics, etc.).

Further, regarding n=4, the setting is made so that the time required for discrimination is shortened to the extent that no erroneous discrimination occurs.

Although FIG. 1 does not show under what circumstances the determination routine is entered, this is carried out as follows. As mentioned above, the phase (ATF) lock signal is created with an l-field period. That is, the timing and period of creation are determined in advance. Therefore, start the discrimination luatin immediately before the timing of this creation, and AT
The level of the F lock signal is taken into the microcomputer.

(g) Effects of the Invention As described above, the present invention is effective because it reduces the risk of misjudgment and also shortens the time required for discrimination.

[Brief explanation of drawings]

FIG. 1 is a flowchart showing the operation of the embodiment. Fig. 7 is a block diagram of the conventional example, and Fig. 2 shows the operation.
The charts, FIGS. 3, 4, and 5 are explanatory diagrams. Further, FIG. 6 is a 70-chart in another conventional example. (15)...Second sample hold circuit (16)
...First comparator (17) ...Low pass filter (18) ...Second comparator (19)
・Microcomputer

Claims (1)

[Claims] (1) The tape is run at high speed, and the frequency of the injection pilot signal is switched a predetermined number of times during one field period.
A videotape in which a phase-lock signal is obtained by creating an F error signal and setting the frequency of the injection pilot signal at at least one location during the one field period to a frequency different from the frequency corresponding to the track scanned at that portion. In the recording tape speed determination device of the recorder, if the abnormal state of the phase lock signal is counted n times in a row, means for changing the mode determination; A recording tape speed discriminating device characterized by comprising means for initializing the count in the abnormal state when counting is performed.