JPH0298294A - Solid-state color image pickup device - Google Patents

Abstract

PURPOSE:To attain the correction processing of resistration with high accuracy and simple structure by applying readout of a signal of each color being components of a color picture from a memory in a timing so that the deviation of the location of the picture element of each color is corrected. CONSTITUTION:With the application of a drive signal from CCD drive circuit 11, CCD image sensors 3R, 3G, 3B output an optical image subjected to photoelectric conversion as a picture signal, The picture signal is inputted to process circuits 4R, 4G, 4B, where it is processed and converted into R, G, B color signals and only the G signal is retarted somewhat by a delay circuit 5. Then the readout of each color signal from each picture memory 7 is implemented in a timing so that the deviation of the location of each color picture element is corrected. Thus, the resistration correction processing with simple structure and high accuracy is attained.

Description

[Detailed Description of the Invention] [Field of Industrial Application] The present invention performs registration correction processing by adjusting the timing of reading each color signal from an image memory so as to correct the positional deviation of each color pixel. Regarding solid-state color imaging devices.

[Prior Art] In general, a television digital camera for color photography separates a subject image into three optical images of red, green, and blue, and then superimposes these images to create color i! i
It is designed to reproduce the image.

Therefore, if there is an error in the superposition of images of each color, color blurring will appear in the reproduced color image. Therefore, it is necessary to make this overlay error extremely small.

Conventionally, in color television cameras using image pickup tubes, the so-called registration adjustment to eliminate the above-mentioned image overlay error is performed by mechanical position adjustment of each image pickup surface and electrical adjustment of the deflection system. was. Also, C
In a solid-state color television camera that uses a solid-state image sensor such as an OD, it is not possible to adjust the 1lfll area using a deflection system like in an image pickup tube type camera, so it is necessary to perform mechanical registration adjustment with high precision. I was doing it.

Generally, in a color imaging device, there is an overlay error of each color, that is, a registration error due to the angular magnification aberration of the m-image optical system. Assuming that the overlay error due to this chromatic magnification aberration is zero at the center of the screen, the amount of error tends to increase as the distance from the center of the screen increases. Therefore, there is a problem in that simply eliminating the overlay error at the center of the screen by mechanical registration adjustment cannot eliminate the overlay error caused by the chromatic lateral aberration.

Furthermore, mechanical registration adjustment requires advanced technology, expensive adjustment jigs, and a large number of adjustment culms. Furthermore, after the image element has been bonded, it is impossible to readjust for any misalignment, resulting in a problem of low yield in factory production.

An example of prior art for solving this problem is JP-A-61-
It is disclosed in Japanese Patent No. 89791. This prior art example reads out correction data formed in advance by interpolation processing from a storage means during actual imaging operation, and generates an electrical signal for the 8411 output obtained by the solid-state image sensor based on the correction data. By performing the processing, highly accurate registration correction vIUyI is performed, and high-quality color imaging can be performed.

[Problems to be Solved by the Invention] However, the above prior art example requires a large-scale arithmetic processing circuit to perform interpolation processing, resulting in a complex structure and high cost. There was a problem.

[Object of the Invention] The present invention has been made in view of the above circumstances, and an object of the present invention is to provide a solid-state color imaging device that can perform highly accurate registration correction processing with a simple structure.

[Means for Solving the Problems] The solid-state color III & device of the present invention is a solid-state color imaging device that obtains signals of a plurality of colors constituting a color image using a plurality of image sensors. and a timing adjustment means for reading out the signals of the respective colors stored in the image memory at a timing that corrects the positional deviation of each pixel of the image due to the signals of the respective colors. .

[Function] That is, in the solid-state color imaging aI device of the present invention, the signals of each color constituting a color image are read out from each image memory at a timing such that the displacement of the position of the pixel of each color is corrected. , the registration is corrected.

[Embodiments] Hereinafter, embodiments of the present invention will be described with reference to the accompanying drawings.

Figures 1 to 3 relate to one embodiment of the present invention;
The figure shows the configuration of a solid-state color imaging device.
The figure is a block diagram showing the configuration of the write address control section.
FIG. 3 is a block diagram showing the configuration of the read address control section.

FIG. 1 shows an example in which the present invention is applied to a so-called three-panel digital television camera. Here, image carrier light from a subject is guided from an imaging lens 1 via a color separation prism 2 and irradiated onto three CCD image sensors 3R and 3G.

3B constitutes an imaging unit 3 that takes a VRI image of a subject.

In this embodiment, the CCD image sensors 3R, 3G are transmitted from the m-image lens 1 through the color separation prism 2.
, 3B is guided to the color separation prism 2.
Therefore, the three primary color components, namely red (R), green (G), and blue <8
), and the above-mentioned 3 lights are separated into light of each color, and the above-mentioned 3
An optical image is formed by the primary color lights R, G, and B, and then photoelectrically converted by these CCD image sensors 3R, 3G, and 3B.

Each of the above CCD image sensors 3R, 3G, 3B is CO
When a drive signal is applied from the D drive circuit 11,
The optical image photoelectrically converted as described above is output as an image signal (video signal). This image signal is then input to process circuits 4R, 4G, and 4B, where it is processed and converted into R, G, and B color signals. Next, only the G signal among these signals is delayed to some extent by the delay circuit 5.

The R, G, and B color signals are then sent to an A/D converter 6.
R, 6G, and 6B provide digitally connected color signals DR,
After being converted to DG and DB, the image memory 7R
, 7G, and 7B, respectively.

Write operations and read operations for these image memories 7R, 7G, and 7B are controlled by a memory controller 15. This memory controller 15 receives the horizontal synchronizing signal HD and vertical synchronizing signal VD output from the timing pulse generator 12, and the A/
Clock signal 4fs used for D conversion and D/A conversion
The image memories 7R, 7G, and 7B are controlled based on these signals. The COD drive circuit 11 also takes in a timing signal that defines the read timing output from the timing pulse generator 12, and drives each of the CCD image sensors 3R, 3G in synchronization with this signal.

The drive signal is output to 3B.

Further, the horizontal synchronization signal HD, the vertical synchronization signal VD, and the clock signal 4CH SC are applied to the write address control section 13 and the read address control section 14 as timing control means. ing. Based on these signals, the write address control section 13 generates a write address, and the read address control section 14 generates a read address, and sends them to each of the image memories 7R, 7G, and 7B. There is.

Digital oak R, G, and B signals OR and DG read out from each of the image memories 7R, 7G, and 7B.

DB is converted into analog R, G, and B signals R=, GB' by D/A converters 88.8G and 8B, respectively, and is input to the NTSC encoder 9.

By the way, the write address control section 13 is composed of a counter 21 and a counter 22, as shown in FIG. Among these, the counter 21 receives a clear input [CLR receives the horizontal synchronization signal ID, and the clock is manually operated OHC].
A clock signal 4fSC is applied to each of LK, and counting is performed by inputting clock signal 4fSC, and this counted value is cleared by inputting horizontal synchronization signal 1-IO. It is a counter. On the other hand, the counter 22 has a clear input O
Vertical synchronization signal VD is applied to HCL R, clock input terminal CL
A horizontal synchronizing signal HD is applied to each of K, and a vertical counter is counted by inputting the horizontal synchronizing signal HD, and the counted value is cleared by inputting a vertical synchronizing signal VD. It has become. These two counters 21 and 22 generate a store entry address.

Next, the configuration of the read address control section 14 is changed to the third
This will be explained with reference to the figures.

As shown in this figure, the read address control section 14
has two counters 23, 24 and two ROMs 25.
26 and two subtracters 27 and 28. Of these, the counter 23 is configured such that the horizontal synchronizing signal HD is applied to the clear input terminal CLR, and the clock signal 4fSC is applied to the clock input terminal CLK.
It is a horizontal counter in which counting is performed by inputting a clock signal 4fsc, and the counted value is cleared by inputting a horizontal synchronizing signal HD.

On the other hand, the counter 24 receives the vertical synchronization signal VD at the clear input terminal CLR and the horizontal synchronization signal HD at the clock input terminal CLK.
are applied respectively, counting is performed by inputting the horizontal synchronizing signal HD, and the vertical synchronizing signal VD
This is a vertical counter whose counted value is cleared by input.

The output of the counter 23 is stored in the ROM in a subtracter 27.
25 to generate a horizontal address. This ROM 25 contains R for the G pixel.
Information on the horizontal deviation of pixels B and B is input and outputted, and a value for correcting this deviation is output.

The same applies to the vertical address, and the output of the counter 24 is added to the value output from the ROM 26 in the subtracter 28 to generate the vertical address. This ROM 26 contains R and 8 pixels for G pixels.
Information on the amount of vertical deviation of the pixels is written, and a value for correcting this deviation is output.

Since the ROM 25 and the ROM 26 output values for correcting the deviations of the R and 8 pixels with respect to the G pixels in the horizontal and vertical directions, respectively, the read address output from the read address control unit 14 is as follows. R,G
, B, the timing for reading out each color signal from each image memory 7R, 7G, 7B is specified so as to correct the displacement of each pixel in both the horizontal and vertical directions, and thereby the registration is corrected.

In this manner, in this embodiment, the registration correction process of the three-plate color #l image device can be performed by the simple operations described above. In addition, since registration correction is performed based on the values written in the ROM, even if the adjustment is incorrect, the ROM can be corrected.
It can be readjusted by rewriting the value of .

Furthermore, since no mechanical adjustment is required, adjustment can be made without requiring advanced technology. Furthermore, since the image memory for still images is also used as the memory for adjustment, the configuration is easy.

In this embodiment, the colors that make up the color image are R, G,
Although the three primary colors of B have been described above, they are not limited to these, and include magenta (Mo), yellow (YG), and cyan (C
It may be a complementary color to y).

Furthermore, in this embodiment, the color imaging device has been described as a three-plate type using three image-carrying elements, but it is not limited to this, and can also be applied to a two-plate type using two image pickup elements. can.

[Effects of the Invention] As described above, according to the present invention, the signals of each color constituting a color image are read out from the image memory at a timing such that the positional deviation of the pixels of each color is corrected. With a simple structure, registration correction processing can be performed with high precision.

[Brief explanation of drawings]

Figures 1 to 3 relate to one embodiment of the present invention;
The figure is a block diagram showing the configuration of a solid-state color imaging device.
FIG. 1 is a block diagram showing the structure of the write address control circuit, and FIG. 3 is a block diagram showing the structure of the &extrusion address control circuit. 3...Imaging section 3R, 3G, 3B...COD image sensor 5...
Delay circuit 7... Image memory 11... CC
D drive circuit 12...timing pulse generator 13...write address control section 14...read address control section 15...memory controller 21.22.23.24...counter 25, 26.
...ROM 27.28...Shear reducer

Claims (1)

[Claims] In a solid-state color imaging device in which signals of a plurality of colors constituting a color image are obtained by a plurality of image sensors, an image memory that stores signals of each color obtained from the image sensors;
A solid-state color imaging device characterized by comprising: timing adjustment means for reading out the signals of the respective colors stored in the image memory at a timing that corrects a positional shift of each pixel of the image due to the signals of the respective colors.