JPH0294814A - A/d converter - Google Patents

A/d converter

Info

Publication number
JPH0294814A
JPH0294814A JP63245983A JP24598388A JPH0294814A JP H0294814 A JPH0294814 A JP H0294814A JP 63245983 A JP63245983 A JP 63245983A JP 24598388 A JP24598388 A JP 24598388A JP H0294814 A JPH0294814 A JP H0294814A
Authority
JP
Japan
Prior art keywords
converter
converters
signal
digital
analog
Prior art date
Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
Pending
Application number
JP63245983A
Other languages
Japanese (ja)
Inventor
Yukitomi Fujishima
藤嶋 之富
Masahiro Yamada
雅弘 山田
Current Assignee (The listed assignees may be inaccurate. Google has not performed a legal analysis and makes no representation or warranty as to the accuracy of the list.)
Toshiba Corp
Original Assignee
Toshiba Corp
Priority date (The priority date is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the date listed.)
Filing date
Publication date
Application filed by Toshiba Corp filed Critical Toshiba Corp
Priority to JP63245983A priority Critical patent/JPH0294814A/en
Publication of JPH0294814A publication Critical patent/JPH0294814A/en
Pending legal-status Critical Current

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  • Compression Or Coding Systems Of Tv Signals (AREA)
  • Analogue/Digital Conversion (AREA)

Abstract

PURPOSE:To reduce noise by inputting the same analog signal to excess A/D converters, summing their digital outputs and dividing the result by the number of added signals when analog signals less than number of the A/D converters in a digital TV in which plural number of the A/D converters are employed. CONSTITUTION:An analog switch 7 is provided, which switches an SVHS C signal also to an input composite video signal of an A/D converter 4. Outputs of two A/D converters 3, 4 are added by an adder 8 and the result is divided by 2 at a multiplier 10. In order to halve the gain, the multiplier 10 is to be shifted by one bit. Thus, analog noise caused at the MSB change point is halved and the nose is divided into two and outputted with a timewise deviation. That is, the level of the analog noise generated at the MSB change point is decreased and scattered timewise.

Description

【発明の詳細な説明】 [発明の目的] (産業上の利用分野) 本発明は、デジタル信号処理を行なうテレビジョン受像
機(以下デジタルTVと言う)のA/D(アナログ/デ
ジタル)変換器に関する。
[Detailed Description of the Invention] [Object of the Invention] (Industrial Application Field) The present invention relates to an A/D (analog/digital) converter for a television receiver (hereinafter referred to as digital TV) that performs digital signal processing. Regarding.

(従来の技術) 現在のデジタルTVは高画質化が計られている。従って
第4図の様に5VHSのC信号用の入力端子2を持つこ
とが多く、その場合は5VHSのC信号人力用のA/D
変換器4が設けられている。またこれらデジタルTVは
、多機能化も計られ主画面のA/D変換器以外に副画面
映像信号用A/D変換器を持っている場合も考えられる
。尚、このようなデジタルTVはコンポジットビデオと
5VHSのY信号共通入力端子1がコンポジットビデオ
と5VH3のY信号用A/D変換器3に接続され、この
A/D変換器3のコンポジットビデオと5VH8のY信
号のデジタルデータ出力端子5はデジタル信号処理回路
へ接続される。前記A/D変換器4の5VHSのC信号
用のデジタルデータ出力端子6はデジタル信号処理回路
へ接続される しかし、主画面のみをコンポジットビデオ信号入力で映
し出している場合、この主画面コンポジットビデオ信号
用A/D変換器以外は、全く使用されていない。
(Prior Art) Current digital TVs are designed to have high image quality. Therefore, as shown in Figure 4, there is often an input terminal 2 for 5VHS C signal, and in that case, an A/D input terminal for 5VHS C signal manually.
A converter 4 is provided. Furthermore, these digital TVs may be designed to be multi-functional and include an A/D converter for sub-screen video signals in addition to the A/D converter for the main screen. In addition, in such a digital TV, the composite video and 5VHS Y signal common input terminal 1 is connected to the A/D converter 3 for composite video and 5VH3 Y signals, and the composite video and 5VHS of this A/D converter 3 are connected to the Y signal input terminal 1. A digital data output terminal 5 of the Y signal is connected to a digital signal processing circuit. The digital data output terminal 6 for the 5VHS C signal of the A/D converter 4 is connected to a digital signal processing circuit.However, when only the main screen is displayed by inputting a composite video signal, this main screen composite video signal Nothing other than the A/D converter is used.

一方、デジタルTVのビデオ信号はデジタル信号時、周
辺のノイズの混入及び各能動素子の熱雑音の混入による
S/N劣化はない。従ってデジタルTVでの上述の様な
ノイズの混入等によるS/N劣化はA/D変換以前及び
D/A変換以後に限られる。特に、A/D変換以前への
デジタル回路等のノイズ混入は、コンポジットビデオ信
号のY/C分離に悪影響も与えたり、単なるS/N劣化
に止まらない。また、ビデオ信号はA/D変換されれば
必らず量子化ノイズを発生する。
On the other hand, when a digital TV video signal is a digital signal, there is no S/N deterioration due to the mixing of peripheral noise and thermal noise of each active element. Therefore, S/N deterioration due to the above-mentioned noise mixture in digital TV is limited to before A/D conversion and after D/A conversion. In particular, the introduction of noise from digital circuits or the like before A/D conversion has an adverse effect on the Y/C separation of the composite video signal, and is not limited to mere S/N deterioration. Furthermore, when a video signal is A/D converted, it inevitably generates quantization noise.

(発明が解決しようとする課+8) 本発明は、従来技術ではS/N劣化等がある点に鑑みて
なされたもので、A/D変換器で発生するノイズの混入
の低減、A/D変換器の分解能の向上によって、デジタ
ルTV全体の画質を向上させ得るA/D変換器を提供す
ることを目的とする。
(Problem to be solved by the invention +8) The present invention was made in view of the fact that the conventional technology suffers from S/N deterioration. An object of the present invention is to provide an A/D converter that can improve the overall image quality of a digital TV by improving the resolution of the converter.

[発明の構成] (課題を解決するための手段と作用) 本発明は、A/D変換器が腹数個あるデジタルTVにお
いて、A/D変換器の数より少ないアナログ、信号が入
力された場合、余るA/D変換器にも同じアナログ信号
を入力する。そして、同じアナログ信号を入力したA/
D変換器のデジタル出力を加算し、その後加算した数で
除す。
[Structure of the invention] (Means and effects for solving the problem) The present invention provides a digital TV having several A/D converters, in which fewer analog signals than the number of A/D converters are input. In this case, the same analog signal is input to the remaining A/D converters. Then, the A/
Add the digital outputs of the D converters and then divide by the added number.

するとA/D変換器ごとに発生しているノイズに相関が
なければ、出力でのノイズは1/(A/D変換器の数)
となる。
Then, if there is no correlation between the noise generated by each A/D converter, the noise at the output will be 1/(number of A/D converters)
becomes.

(実施例) 次に図面を参照して本発明の実施例を詳細に説明する。(Example) Next, embodiments of the present invention will be described in detail with reference to the drawings.

第1図は本発明の一実施例であり、第1図中、第4図と
同一部分は同一符号を付す。即ち、5VIISのC信号
用のA/D変換器4の入力をコンポジットビデオ信号入
力端子1にも切り換えられるようにアナログスイッチ7
を設ける。そして2つのA/D変換器3.4の出力を加
算し、2で除すために、加算器8、セレクター9、乗算
器10を設ける。この場合乗算器10はゲインを1/2
にするには1ビツトシフトするだけでよい。9ビツト得
られる出力はそのまま使用しても、上位8ビツトだけを
次のディジタル信号処理回路に供給してもよい。
FIG. 1 shows an embodiment of the present invention, and the same parts in FIG. 1 as in FIG. 4 are given the same reference numerals. That is, the analog switch 7 is connected so that the input of the A/D converter 4 for the C signal of 5VIIS can also be switched to the composite video signal input terminal 1.
will be established. An adder 8, a selector 9, and a multiplier 10 are provided to add the outputs of the two A/D converters 3.4 and divide by 2. In this case, the multiplier 10 reduces the gain to 1/2
To do this, you only need to shift one bit. The output obtained from 9 bits may be used as is, or only the upper 8 bits may be supplied to the next digital signal processing circuit.

これら第1図の回路に5VHS信号が入力された場合は
、スイッチ7は入力端子2側に接続され回路動作は第4
図と全く同じになる。
When a 5VHS signal is input to the circuit shown in FIG. 1, the switch 7 is connected to the input terminal 2 side and the circuit operates at the fourth
It will be exactly the same as the figure.

次に、A/D変換器内で発生するノイズを考える。まず
MSBが変化するスイッチングノイズが考えられる。つ
まりデジタルデータがここを境に全て1−0又はO−1
と変化する。するとこれら出力のデジタルデータの急変
は入力アナログデータヘ電源を介するなどしてノイズを
混入する可能性がある。
Next, consider noise generated within the A/D converter. First, switching noise in which the MSB changes can be considered. In other words, the digital data is all 1-0 or O-1 after this point.
and changes. Then, sudden changes in the output digital data may cause noise to be mixed into the input analog data via the power supply.

そこでスイッチ7を入力端子1側に接続した状態でA/
D変換器3とA/D変換器4の入力端子に入ってくる信
号の直流成分をわずかにずらしたり、A/D変換器3と
A/D変換器4のダイナミックレンジの上・下限をわず
かにずらしたりして2つのA/D変換器出力にDCオフ
セットを与える。すると、前述のMSBの変化する点は
、A/D変換器3、A/D変換器4で時間的なずれを生
じる。そしてそれぞれMSB変化点で発生するアナログ
ノイズは1/2にされ2つに別かれて時間的なずれを生
じ、出力されることになる。つまり、MSB変化点で発
生するアナログノイズはレベルが下げられ時間的に分散
させられる。
Therefore, with switch 7 connected to input terminal 1 side,
Slightly shift the DC components of the signals that enter the input terminals of the D converter 3 and A/D converter 4, or slightly shift the upper and lower limits of the dynamic range of the A/D converter 3 and A/D converter 4. A DC offset is applied to the outputs of the two A/D converters. Then, the point at which the MSB changes as described above causes a time lag in the A/D converter 3 and the A/D converter 4. Then, the analog noise generated at each MSB change point is halved and divided into two parts with a time lag, which are then output. In other words, the analog noise generated at the MSB change point is lowered in level and dispersed in time.

その他にA/D変換器内で発生するノイズはA/D変換
器3とA/D変換器4で相関のないものについては全て
エネルギーで1/2、得られるデジタルデータの電圧出
力で1 / ff−−3dl’3となる。
In addition, the noise generated in the A/D converter is 1/2 in terms of energy and 1/2 in terms of the voltage output of the obtained digital data for all noises that are uncorrelated between A/D converters 3 and 4. ff--3dl'3.

第1図を簡易化すると第2図の様になる。すなわち、セ
レクター9の0固定であった入力をA/D変換器3の出
力そのものに接続し乗算器10のゲインを1/2固定と
することが出来る。
When Figure 1 is simplified, it becomes as shown in Figure 2. That is, by connecting the input of the selector 9, which was fixed to 0, to the output of the A/D converter 3 itself, the gain of the multiplier 10 can be fixed to 1/2.

この場合、従来に比べ追加が必要となる回路は、アナロ
グスイッチ7とデジタルの加算器8とセレクター9のみ
となる。
In this case, only the analog switch 7, digital adder 8, and selector 9 are required to be added compared to the conventional circuit.

またA/D変換器3とA/D変換器4の直線性がA/D
変換器のダイナミックレンジ全域にゎたり1/2LSB
以下の誤差をもっているなら、上述の様なA/D変換器
3とA/D変換器4間でのDCオフセットを1/2LS
Bにすることにより、出力端子5の性能は9ビツトにな
り1ビツト向上させることが出来る。従って、以後のデ
ジタル信号処理回路でも、コンポジットビデオ信号入力
時は1ビット信号の性能を上げた状態で信号処理が可能
となる。この場合の接続は第3図の様に第2図の入力端
子1とA/D変換器4の間に1/2LSB  DCシフ
ト回路11を設けるだけでよい。
Also, the linearity of A/D converter 3 and A/D converter 4 is
1/2 LSB over the entire dynamic range of the converter
If the error is as follows, set the DC offset between A/D converter 3 and A/D converter 4 to 1/2LS as described above.
By setting it to B, the performance of the output terminal 5 becomes 9 bits, which can be improved by 1 bit. Therefore, even in subsequent digital signal processing circuits, when a composite video signal is input, signal processing can be performed with improved performance of a 1-bit signal. In this case, the only connection required is to provide a 1/2 LSB DC shift circuit 11 between the input terminal 1 of FIG. 2 and the A/D converter 4 as shown in FIG.

又、A/D変換器3とA/D変換器4のダイナミックレ
ンジの上・下限は2つの間に1/2LSBオフセツトを
持たせるだけでもよい。
Further, the upper and lower limits of the dynamic range of the A/D converter 3 and the A/D converter 4 may be set by simply providing a 1/2 LSB offset between the two.

尚、本発明はA/D変換器4を副画面表示機能の付いた
デジタルTVの副画面用A/D変換器と起き換えること
も可能である。また、第1図の加算器8の出力にさらに
副画面用A/D変換器出力を加算し乗算器10のゲイン
を1/3にすることも考えられる。
Incidentally, in the present invention, the A/D converter 4 can be replaced with an A/D converter for a sub-screen of a digital TV equipped with a sub-screen display function. It is also conceivable to further add the output of the sub-screen A/D converter to the output of the adder 8 shown in FIG. 1 to reduce the gain of the multiplier 10 to ⅓.

この様に、本発明は上記実施例に限定されるものではな
く、この外その要旨を逸脱しない範囲で種々変形して実
施することができる。
As described above, the present invention is not limited to the above-mentioned embodiments, and can be implemented with various modifications without departing from the gist thereof.

[発明の効果] 以上詳述したようにこの発明によ、れば、使用されてい
ないA/D変換器を簡単な追加回路で有効利用しA/D
変換器の性能を向上することにより、A/D変換器で発
生するノイズの混入の低減、A/D変換器の分解能の向
上によって、デジタルTV全体の画質を向上させること
ができる。
[Effects of the Invention] As detailed above, according to the present invention, an unused A/D converter can be effectively used with a simple additional circuit, and an A/D
By improving the performance of the converter, the overall image quality of the digital TV can be improved by reducing the amount of noise generated in the A/D converter and improving the resolution of the A/D converter.

【図面の簡単な説明】[Brief explanation of drawings]

第1図は本発明の一実施例を示す構成説明図、第2図お
よび第3図は第1図の回路を簡単化した本発明の他の実
施例を示す構成説明図、第4図は従来のA/D変換器を
示す構成説明図である。 1・・・コンポジットビデオと5VHSのY信号共通入
力端子、3・・・コンポジットビデオと5VH3のY信
号用A/D変換器、5・・・コンポジットビデオと5V
H3のY信号のデジタルデータ出力端子、2・・・5V
H3のC信号用の入力端子、4・・・S V II S
のC信号用A/D変換器、6・・・5VH3のC信号用
デジタルデータ出力端子、7・・・アナログスイッチ、
8・・・加算器、9・・・セレクター 10・・・乗算
器、11・・・1/2LSB  DCシフト回路。 出願人代理人 弁理士 鈴 江 武 彦VJIノ扱え 第1図 第2図
FIG. 1 is a configuration explanatory diagram showing one embodiment of the present invention, FIGS. 2 and 3 are configuration explanatory diagrams showing another embodiment of the present invention in which the circuit in FIG. 1 is simplified, and FIG. FIG. 2 is a configuration explanatory diagram showing a conventional A/D converter. 1... Composite video and 5VHS Y signal common input terminal, 3... Composite video and 5VH3 Y signal A/D converter, 5... Composite video and 5V
H3 Y signal digital data output terminal, 2...5V
Input terminal for H3 C signal, 4...S V II S
A/D converter for the C signal, 6...5VH3 digital data output terminal for the C signal, 7...analog switch,
8... Adder, 9... Selector 10... Multiplier, 11... 1/2 LSB DC shift circuit. Applicant's agent Patent attorney Takehiko Suzue How to handle VJI Figure 1 Figure 2

Claims (1)

【特許請求の範囲】[Claims] 入力アナログ信号の数より多い複数個のA/D変換器を
内蔵したデジタル信号処理を行なうテレビジョン受像機
において、同一アナログ信号を複数個のA/D変換器に
分配するスイッチ回路と、このスイッチ回路により同一
アナログ信号が複数個のA/D変換器に入力された時各
A/D変換器の出力を選択するセレクターと、このセレ
クターにより選択された出力を加算する加算器とを具備
することを特徴とするA/D変換器。
A switch circuit for distributing the same analog signal to a plurality of A/D converters in a television receiver that performs digital signal processing and has a plurality of built-in A/D converters greater than the number of input analog signals, and this switch. The circuit includes a selector that selects the output of each A/D converter when the same analog signal is input to a plurality of A/D converters, and an adder that adds the outputs selected by the selector. An A/D converter characterized by:
JP63245983A 1988-09-30 1988-09-30 A/d converter Pending JPH0294814A (en)

Priority Applications (1)

Application Number Priority Date Filing Date Title
JP63245983A JPH0294814A (en) 1988-09-30 1988-09-30 A/d converter

Applications Claiming Priority (1)

Application Number Priority Date Filing Date Title
JP63245983A JPH0294814A (en) 1988-09-30 1988-09-30 A/d converter

Publications (1)

Publication Number Publication Date
JPH0294814A true JPH0294814A (en) 1990-04-05

Family

ID=17141731

Family Applications (1)

Application Number Title Priority Date Filing Date
JP63245983A Pending JPH0294814A (en) 1988-09-30 1988-09-30 A/d converter

Country Status (1)

Country Link
JP (1) JPH0294814A (en)

Cited By (7)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
JPH0392015A (en) * 1989-09-04 1991-04-17 Yokogawa Electric Corp Analog/digital converter
USRE38483E1 (en) 1992-03-26 2004-03-30 Matsushita Electric Industrial Co., Ltd. Communication system
US6724976B2 (en) 1992-03-26 2004-04-20 Matsushita Electric Industrial Co., Ltd. Communication system
US6728467B2 (en) 1992-03-26 2004-04-27 Matsushita Electric Industrial Co., Ltd. Communication system
USRE42643E1 (en) 1991-03-27 2011-08-23 Panasonic Corporation Communication system
US8027418B2 (en) 2005-09-26 2011-09-27 Renesas Electronics Corporation Diversity reception circuit
US9616591B2 (en) 2010-12-30 2017-04-11 United States Gypsum Company Slurry distributor, system and method for using same

Cited By (7)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
JPH0392015A (en) * 1989-09-04 1991-04-17 Yokogawa Electric Corp Analog/digital converter
USRE42643E1 (en) 1991-03-27 2011-08-23 Panasonic Corporation Communication system
USRE38483E1 (en) 1992-03-26 2004-03-30 Matsushita Electric Industrial Co., Ltd. Communication system
US6724976B2 (en) 1992-03-26 2004-04-20 Matsushita Electric Industrial Co., Ltd. Communication system
US6728467B2 (en) 1992-03-26 2004-04-27 Matsushita Electric Industrial Co., Ltd. Communication system
US8027418B2 (en) 2005-09-26 2011-09-27 Renesas Electronics Corporation Diversity reception circuit
US9616591B2 (en) 2010-12-30 2017-04-11 United States Gypsum Company Slurry distributor, system and method for using same

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