JPH029061A - Video recording and reproducing device - Google Patents

Abstract

PURPOSE:To prevent misdiscrimination even when a head amplifier output signal is missing during a period of a vertical synchronizing signal by taking out a horizontal synchronizing signal from a video signal after FM demodulation and detecting its level only during this period of time. CONSTITUTION:An FM regenerative signal is amplified via a video head 11 and a head amplifier 12. Then, it is demodulated by a video demodulation circuit 13, and the horizontal synchronizing signal (H pulse) is taken out by a horizontal synchronization separating circuit 14. The presence of the H pulse is discriminated by a discrimination circuit 15, and when the H pulse is present, an H pulse waveform is outputted as it is. A gate circuit 16 is in the closed state only for the period of the H pulse, so that the H pulse part can be sampled from its output signal to the amplifier. The level of the H pulse part of an output (h) of the circuit 16 is detected by a carrier detecting circuit 17, and when an output of the circuit 17 is at an H level, the output (video signal) is discriminated as an S-VHS mode with the application of high picture quality technology. Then, when the output of the circuit 17 is at an L level, it is discriminated as a normal VHS mode.

Description

DETAILED DESCRIPTION OF THE INVENTION Field of Industrial Application The present invention relates to a video recording and reproducing device that uses high image quality technology such as the 5-VHS system in which the FM carrier frequency of a luminance signal is shifted to a high band (high band). It is related to.

BACKGROUND OF THE INVENTION In recent years, in what has been called an era of high image quality, it has become clear that the image quality of video recording and reproducing devices, especially video tape recorders (VTRs), is not as good as that of video cameras, computer images, and the like.

Furthermore, as TV screens have become larger, there has been a strong demand for improved image quality and higher image quality. In order to meet this demand, in order to improve the horizontal resolution, which is a measure of image quality, recording methods have been used in which the FM carrier frequency of the luminance signal is shifted to a higher frequency range. For example, in the conventional VHS system, as shown in FIG. 7, the FM carrier frequency of the luminance signal is 3.4 to 4.4 MH, whereas
In the 5-VHS system shown in FIG. 8, the video is shifted as high as 6.4 to 7.0 to increase the amount of video information and improve the horizontal resolution. When recording in the 5-VHS format, it is impossible to record on conventional VHS cassette tapes, and 5-VHS
You have to use a cassette tape, but it is 5-VH.
The S cassette tape can record in both 5-VHS mode and VHS mode, so when playing it back, it automatically determines which format it is recorded in and uses the subsequent signal processing circuit. It is necessary to switch. Therefore, to distinguish between the two formats during playback, the difference in the FM carrier frequency of the luminance signal is used to distinguish between the two formats.
The format was automatically determined by detecting the level after peaking around 4 Peng. However, the brightness of the video signal is constantly changing, and the FM carrier frequency is also constantly changing according to the change in brightness.
5 of the luminance signal FM carrier frequency in mode. OM)h
If the nearby components are large, the problem is that the 5-VHS mode is erroneously determined, and a normal reproduced image cannot be obtained. For this reason, conventionally, the period of the vertical synchronization signal (hereinafter referred to as V pulse) which does not have video information has been used and detection has been performed only during this period to avoid misjudgment.

An example of a conventional video recording and reproducing device will be described below with reference to the drawings. FIG. 9 is a block diagram of a conventional video recording and reproducing apparatus. 1 is a video head, 2 is a head up, 3 is a vertical synchronizing pulse generation circuit (hereinafter referred to as pulse generation circuit), monostable multivibrators (hereinafter referred to as MM) 31 to 34, and an adder circuit 35. It is configured. MM31 and 33 have a time constant of e, 5H, for example.
(H is the horizontal scanning period), and the time constants of MM32 and MM34 are, for example, 3H of the V pulse period.

4 is a gate circuit, 5 is a carrier detection circuit 6'), a peaking circuit 61, a detection circuit 52, an integration circuit 63, and a voltage comparator diagram. The resonance frequency of the peaking circuit 61 is set, for example, to 5-4 MHz, which corresponds to the sync chip frequency in the 5-VHS mode (FIG. 6A). The integration constant of the integration circuit 63 is, for example, 100V (vV
i vertical scanning period).

The operation of the conventional video recording and reproducing apparatus configured as described above will be described below.

FIG. 10 shows the waveform from point a in FIG. 9. From FIG. 9, first, the video head 1 extracts a playback signal from the video track on the magnetic tape, and the head amplifier 2 amplifies the playback signal (first
Figure 0 a). - The MM31 in the pulse generating circuit 3 operates at the rising edge of the head switching pulse b (Fig. 10b) based on the head switching pulse (Fig. 10b).
Output the signal C (Fig. 10) with a pulse period of H, and
2 is the falling edge of this signal C, and a signal d (FIG. 10), which is a 3H pulse, is output. Similarly, MM33 operates at the falling edge of head switching pulse b, and
Outputs the signal e (Fig. 10) which is an H pulse, and
4 outputs a signal f (FIG. 10) which is a 3H pulse at the fall of this signal e. The signal d and signal f, which are the output signals of the MM32.34, are input to an adder circuit 35,
This adder circuit 35 outputs a pulse signal q (FIG. 10). With this signal q, ■Pulse period (3H)
Only when the gate circuit 4 is in the closed state, the 5V pulse portion of the head amplifier output signal a can be extracted (FIG. 10h). Next, the peaking circuit 51 in the carrier detection circuit 6 has a peaking characteristic as shown in FIG.
Since the vicinity of 4 MHz is emphasized, in the 5-VHS mode, the level of the Vparnu portion of the gate circuit output is amplified (Fig. 10i). This output is level-detected by the detection circuit 62 (Figure 10), integrated by the integration circuit 53 (Figure 10k), and then input to the non-inverting input terminal of the voltage comparator 54 for voltage comparison. It is compared with the reference voltage input to the inverting input terminal l of the converter 54. Here, the voltage at one point in FIG. 9 is set to (a) in FIG. 3 and is used as a reference voltage. 5-V
If it is recorded in the HS mode, an integrated voltage (b) higher than the reference voltage (a) is input to the voltage comparator 64.
The output m is at a high level and the JS-VHS mode is determined. Conversely, when recording in VHS mode, the sync tip frequency is s 4 MH! Therefore, the peaking circuit 61 in the carrier detection circuit 5 does not emphasize it as shown in FIG. 6A, and the level of the pulse portion (2) is not amplified. Therefore, the integration constant of the non-inverse integration circuit 151 of the voltage comparator 44 is, for example, about 1A173, and the voltage comparator 174
It is made up of. The resonant frequency of the peaking circuit 171 is set to, for example, 5.4 M), which corresponds to the synch lag frequency of the S-VHS mode (FIG. 6A). The integration constant of the integrating circuit 173 is, for example, about 6 oH.

The operation of the video recording and reproducing apparatus of this embodiment configured as described above will be described below with reference to FIGS. 1 to 6. FIG. 2 shows waveforms from points 8 to 1 in FIG. As shown in FIG. 1, the FM playback signal is amplified through the video head 11 and head amplifier 12 (FIG. 2a). Next, the video demodulation circuit 13 converts the pFM signal back into a video signal (FIG. 2b), and the horizontal synchronization separation circuit 14 extracts the H pulse from the signal (FIG. 2C). Discrimination circuit 16 is H
This is to determine the presence or absence of bulk, and if there is an H pulse,
The waveform of C is output as is (Fig. 2q). By keeping the gate circuit 16 closed only during the H pulse period, the H parnu portion can be extracted from the head amplifier output signal (FIG. 2h).

Next, the peaking circuit 171 in the carrier detection circuit 17
has peaking characteristics as shown in Figure 6A, and 5-
In the case of VHS, the level of the H pulse portion of the output of the gate circuit 16 is amplified (FIG. 2i). The level of this output is detected by the detection circuit 1a2 (Fig. 2j), and the level of the output is detected by the detection circuit 1a2 (Fig. 2j).
After integration at step 3 (Fig. 2k), voltage comparator 17
The voltage is inputted to the non-inverting input terminal 4 and compared with the reference voltage inputted to the inverting input terminal 1 of the pressure comparator 174 7 .

Here, set the voltage at one point in Figure 1 to (A) in Figure 3,
If the reference voltage is recorded in the 5-VHS mode, the integral 'po pressure (b) higher than the reference voltage (a) is input to the point, and the output of the voltage comparator 174 becomes -.
5-Vf (identified as S mode. Conversely, when recording in VHS mode, peaking circuit 1A1 does not emphasize and the level of the H bulk portion is not amplified. Therefore,
Since the integrated voltage (c) lower than the reference voltage is input to the non-inverting input terminal k of the voltage comparator 1a4, the voltage comparator 1a
The output of 74 is in low level JVHSVHS mode,
Automatically switches the subsequent signal processing circuit. The reason why the discrimination circuit 16 is used here is that the gate circuit 16 is operated with an H pulse, so when a video signal is output from no signal, etc.
Since there is no pulse, the gate circuit does not operate, making formant discrimination impossible. For this reason, the gate circuit 16 is always operated (closed) when the video signal is output from no signal, and when the video signal is output and the H pulse is output.
The gate circuit 16 is operated only during this period to improve the accuracy of seven-man one-man discrimination. Next, the operation of the discrimination circuit 15 will be explained using FIG. 4 and FIG.
) is input to the non-inverting input terminal of the voltage comparator 152, and is compared with the reference voltage input to the inverting input terminal e. Here, if the voltage at point e in Figure 1 is set to (in Figure 4) and used as the reference voltage, the integrated voltage at point d (e) exceeds the reference voltage (in Figure 4), and the output of voltage comparator 152 is at a high level. Tonashi (4th
Figure f), switch 163 is switched to the A side, discrimination circuit 15
The waveform of C is output as is as shown in FIG. 4q, and the gate circuit 16 is closed only during the bulk period. Next, if there is no video signal, there will be no H pulse, and in this case, the output of the horizontal sync separation circuit 14 will be as shown in FIG.
51 (FIG. 5d), and is compared with a reference voltage of a voltage comparator 1152. As shown in FIG. 5, the integrated voltage at point d is at a low level and is therefore lower than the reference voltage, the output of the voltage comparator 162 becomes a low level (FIG. 5f), and the switch 153 switches to B. When the switch is switched to the side, a high level voltage is outputted from the discrimination circuit 15 as shown in FIG. 5q, so that the gate circuit 16 is always closed.

Also, during special playback, the video signal is missing at most 20 to 50H due to noise bars, etc., so the integration constant of the integration circuit 173 of the carrier detection circuit 17 is set to 10H, for example.
By setting it to about 0H, it is possible to prevent erroneous determination of 7-oh manoto, and improve responsiveness when changing modes.

As described above, according to this embodiment, the horizontal synchronization separation circuit 14
The H pulse is taken out from the head amplifier output signal through the discrimination circuit 15, the gate circuit 16 passes the head amplifier output signal only during the H pulse period, and after the level of the sync chip frequency is detected by the carrier detection circuit 17, 7 outputs are discriminated. By using this configuration, it is possible to improve the format discrimination accuracy and improve the responsiveness during mode transition by making use of the many H pulses (pulses) and dispersing the level detection positions. be able to.

In this embodiment, the resonance frequency S of the peaking circuit 171 in the carrier detection circuit 17 was set to 5.4 M)h, which corresponds to the sync chip frequency in the VHS mode.
It may also be set to 3.4 M which corresponds to the sync chip frequency in the HS mode.

Effects of the Invention As described above, according to the present invention, when the difference in FM carrier frequency is used to discriminate between two formats,
Since the configuration is such that the level of the sync chip frequency is detected and discriminated only during this period by using the H hull 7, which exists more than the pulses, the level detection positions can be dispersed, and the head amplifier output signal drops around the V pulse. 7) Misjudgment can be prevented even if there is a local omission, and 7) discrimination accuracy can be improved. Furthermore, since the integration constant of the integration circuit in the carrier detection circuit can be made small, excellent effects such as significantly improved responsiveness during mode transition can be obtained.

[Brief explanation of the drawing]

FIG. 1 is a block diagram of a video recording and reproducing device according to an embodiment of the present invention, FIG. 2 is a signal waveform diagram of the main parts of the video recording and reproducing device, and FIG. 3 is a voltage comparator diagram of the video recording and reproducing device. Figure 4 is a signal waveform diagram of the main part of the discrimination circuit of the same video recording and reproducing apparatus when there is a video signal, and Fig. 5 is the main part of the discrimination circuit of the same video recording and reproducing apparatus when there is no video signal. 6 is a peaking characteristic diagram of the peaking circuit of the same video recording and reproducing apparatus. FIG. 7 is a VH3 system luminance signal frequency spectrum diagram. 8 is a 5-VH5 system luminance signal frequency spectrum characteristic diagram. Figure 9 is a block diagram of a conventional video recording/playback device, Figure 10 is a signal waveform diagram of the main parts of the same video recording/playback device, and Figure 11 shows a drop in the V pulse portion of the head amplifier output signal in the same video recording/playback device. Fig. 12 is a signal waveform diagram of the main part when double speed playback is performed with the same video recording and reproducing device, and Fig. 13 is a signal waveform diagram of the main part when performing fine throw with the same video recording and reproducing device. FIG. 2 is a signal waveform diagram of the main part of 12...Head amplifier, 14...Horizontal synchronization separation circuit, 15...Discrimination circuit, 16...
・Gate circuit, 17...Carrier detection circuit, 1
61...Integrator circuit 152...Voltage comparator, 153...Switcher, 171...Peaking circuit, 172...Detection circuit, 173・・・
...Integrator circuit, 174...Voltage comparator. Name of agent: Patent attorney Toshio Nakao and 1 other person No. 1
Fig. Fig. Fig. Iha Fig. Fig. Fig. Fig. 11.

Claims (1)

[Claims] A head amplifier that amplifies the head output, a horizontal synchronization separation circuit that extracts a horizontal synchronization signal from the video signal after FM demodulation, and a determination that determines the presence or absence of a horizontal synchronization signal from the output of the horizontal synchronization separation circuit and outputs the horizontal synchronization signal. a gate circuit that allows the output signal of the head amplifier to pass only during the horizontal synchronization signal period from the output of the discrimination circuit; detects the level of an FM carrier frequency of the horizontal synchronization signal portion of the head amplifier output signal from the output of the gate circuit; A video recording and reproducing device characterized by comprising a carrier detection circuit that performs format discrimination.