JPH0287745A - Cell contention control circuit - Google Patents

Abstract

PURPOSE:To complete reservation of plural cells by one reservation and to improve the throughput by setting a loop while revising a transmission assignment time of each cell sequentially stored in an input terminal corresponding to an output port of a post-stage based on a reserved time of each input terminal with respect to the final cell with a reference to a reserved time assigned to each output. CONSTITUTION:Input ports 1-0-1-(N-1) receive a cell with a header of a prescribed length and store it to input buffers 9-0-9-(N-1). The header of cells stored in the buffers 9-0-9-(N-1) is decoded by a spatial switch 4 to switch output ports 3-0-3-(N-1) corresponding to its destination. The transmission reserved time corresponding to output ports 3-0-3-(N-1) is stored individually in plural storage registers 10-0-10-(N-1) and the transmission reserved period returned from the buffers 9-0-9-(N-1) is transmitted sequentially by a transmission loop 11 connecting to the registers 10-0-10-(N-1) to assign the transmission reservation period to stored cells.

Description

Detailed Description of the Invention (Industrial Field of Application) This invention provides a switch circuit used for ATM (asynchronous transfer mode) that communicates using signals (cells) with a header of a certain length. This invention relates to a cell contention control circuit that buffers and eliminates contention that occurs when cells destined for the same destination arrive at different input ports.

[Conventional technology]

FIG. 6 shows, for example, ELECTRONIC5LETTER
523rdJune 1988 Vol, 24 No.
1:l pp, 772-773'Re5erva-ti
on-based Contention Re5ol
Mechanism for Batch
r-banyan Packet 5w1tches”
1 is a block diagram illustrating the configuration of a conventional switch circuit shown in FIG. ) are input terminals, and cells input through each of these input terminals 1 are stored in input buffers 5-0 to 5-3, respectively.

4 is a so-called non-blocking spatial switch in which there is no contention for signals with different output ports, and all cells with different destinations are connected to spatial switch input ports 2-0 to 2.
- Output port 3 where the cell is desired as long as it is input to 3
-0 to 3-3.

Registers 6-0 to 6-3 hold reservation signals for each output output from the reservation loop control circuit 8 to the reservation loop 7.

Next, a conventional cell contention control operation will be explained.

While cells are being transferred from the space switch input ports 2-0 to 2-3 to the output ports 3-0 to 3-3, the reservation loop 7 transfers the input buffer 5 to the input buffer 5 to prevent cells destined for the same destination from competing. An operation is performed to select cells destined for output ports 3-0 to 3-3 from among the cells stored in -0 to 5-3.

As a method, the reservation loop control circuit 8 sequentially outputs reservation signals corresponding to the output ports 3-0 to 3-3 onto the reservation loop 7, and the reservation signals corresponding to the input buffers 5-0 to 5-3 are outputted one after another from the reservation loop control circuit 8 to the reservation loop 7. The data is sequentially sent to registers 6-0 to 6-3.

Each register 6-0 to 6-3 receives and takes a reservation signal for each output one after another, and if there is a signal to go to that output in its own input buffer 5-0 to 5-3, the reservation signal is reserved. , secures the output product at the next time, and sends the reservation signal to the next register 6.

In addition, when each input buffer 5 has already reserved the reserved signal or has already reserved its own output product, it does not do anything with the reserved signal and transfers the reserved signal to the next register 6. send to

The reservation loop control circuit 8 resets the reservation signal returned as reserved to unreserved to prepare for the next time's competitive control, and at the same time resets the reservation signal that has been returned as reserved to be unreserved, and at the same time resets the reservation signal that has been returned as reserved to prepare for conflict control at the next time. was operated so that the position of the large buffer at which the reservation acceptance starts was changed for each reservation, so that reservations were accepted equally to each input terminal 3.

(Problem to be Solved by the Invention) Since the conventional cell contention control circuit is configured as described above, it is necessary to reset the reservation signal or to
The reservation loop control circuit 8 for equalizing -3 becomes indispensable, which makes the configuration complicated. Furthermore, since the reservation signal only represents two states, unreserved and reserved, the number of cells that each input buffer 5 can reserve in one reservation operation is limited to one at most. Therefore, when the number of ports of the space switch 4 is large and the transfer speed of the reservation loop 7 is slow, there is a problem that the period of reservation operation for a certain output becomes long and the throughput decreases.

Furthermore, since the input buffer closest to the output side of the reservation loop control circuit 8, the input buffer 5-0 in the figure, can be reserved earliest, it is advantageous that the other input buffers 5-1 to 5-
There were problems such as the competitive processing of No. 3 became unequal and the variation in competitive processing efficiency became significant.

This invention was made in order to solve the above problem, and it is based on the reserved time assigned to each output port and assigns the transmission timing to each output port for a plurality of cells input to each input terminal. By setting a loop while sequentially updating the transmission allocation timing of each cell held at the input terminal corresponding to the output port of the subsequent stage based on the reserved timing for the final cell of each input terminal, one It is an object of the present invention to provide a cell contention control circuit that can complete the reservation of a plurality of cells by a reservation operation and can improve the throughput of cells corresponding to each input terminal.

[Means to solve the problem]

The cell contention control circuit according to the present invention includes a plurality of holding registers that individually hold transmission reservation times corresponding to each output port, and a transmission reservation time transmitted from an arbitrary holding register to a corresponding input buffer to an input buffer. an allocation means for sequentially allocating transmission reservation times to a plurality of accumulated unreserved cells, and returning the final allocated transmission reservation time assigned to the last cell to a holding register; A transfer loop is provided for sequentially updating and cyclically transferring the final assigned transmission reservation time to a subsequent holding register as a next transmission reservation start time signal.

In addition, there are multiple holding registers that hold the reserved transmission timing corresponding to each output port, and a barrel shift space that transmits and receives the reserved transmission timing signal held in each holding register while sequentially barrel-shifting it to and from the input buffer. The transmission reservation time is sequentially assigned to multiple unreserved cells accumulated in this input buffer from the transmission reservation time transmitted to the input buffer via the switch and this barrel shift space switch, and the transmission reservation time is assigned to the last cell. The system is further provided with an allocating means for returning the final allotted sending reservation time to the holding register via the barrel shift space switch.

(Operation) In the present invention, when a data is transmitted from any holding register to the corresponding input buffer, the allocation means selects a plurality of unreserved cells that have already been accumulated in the input buffer based on the transmitted reservation time. The transmission reservation time is sequentially assigned to the cells, and the final assigned transmission reservation time assigned to the last cell is returned to the holding register.Then, the final assigned transmission reservation time returned from the allocation means to the holding register is sent via the transfer loop. It is sequentially updated and cyclically transferred to the subsequent holding register as the next transmission reservation start timing signal.

In addition, in the case where a barrel shift space switch is used, after the scheduled sending time corresponding to each output port is held in multiple holding registers, the scheduled sending time signal held in each holding register is transferred to the barrel shift space switch. When the cells are sent to the barrel-shifted input buffer via the input buffer, the allocation means sequentially allocates the transmission reservation time to the plurality of unreserved cells accumulated in this input buffer from the transmission reservation time, and also assigns the transmission reservation time to the last cell. The final assigned sending reservation time is returned to the holding register via the barrel shift space switch, the barrel shift space switch performs barrel shifting between the input buffer and the holding register, and starts allocation processing for the next input buffer.

(First Embodiment) FIG. 1 is a block diagram illustrating an example of a cell contention control circuit showing an embodiment of the present invention.
1) is an input port, and this input port 1-0 to 1-(N
A cell having a header of a certain length is input to the input buffers 9-0 to 9-(N-1) through the input buffers 9-1 to 9-1. input buffer 9
-0 to 9-(N-1) have a function of storing cells having a header of a certain length.

3-0 to 3-(N-1) are output ports, which output cells accumulated in the input buffer 9 via the non-blocking spatial switch 4. The space switch 4 outputs the cell to the target output port 3 based on the result of decoding the header of the cell input via the input lines 2-0 to 2-(N-1).

11 is a transfer loop, holding registers 10-0 to 1O-(
During the interval N-1), the transmission reservation times returned from the input buffers 9-0 to 9-(N-1) are sequentially transferred. Note that it has an allocation function that allocates a transmission reservation time (time) ti to the cells accumulated in the input buffers 9-0 to 9-(N-1), and an arbitrary holding register 1O-i (0≦i< N
) to the corresponding input buffer 9-i, transmission reservation times are sequentially assigned to a plurality of unreserved cells already stored in the input buffer 9-i based on the transmitted transmission reservation time ti. That is, a time when no transmission is scheduled from the corresponding input buffer 9-i is assigned as a transmission time, and the final assigned transmission reservation time assigned to the last cell is returned to the corresponding holding register 10-1. And input buffer circuit 9-
The final assigned transmission reservation time returned from i to the holding register 10-1 is cyclically transferred to the subsequent holding register 10-(i+1) via the transfer loop 11 as the next transmission reservation start time signal. Note that mod N of the holding register 10 represents the remainder of i/N.

Next, the operation shown in FIG. 1 will be explained.

If the scheduled transmission time corresponding to any output port 3-i (0≦i<N) is ti, then at a certain time, the reserved time is stored on the holding registers 10-0 to 10-(N-1). Corresponding signals are carried, and transmission time allocation processing is performed in parallel in each input buffer 9-0 to 9-(N-1). When all of this is completed, the holding register 10 receives the new reserved time assigned by each input buffer 9. Then, each holding register 10 sequentially shifts to the next holding register 10 via the transfer loop 11, and cycles through the new reserved time. Now, if the number of ports of the space switch 4 is N (0≦j<N), the input buffer 9-
In j, the receiver outputs port 3 for the reserved time tk.
- In general, for a plurality of cells that have not yet been assigned a transmission time to be output to, the reception is later than the reserved time tk, and there is no transmission schedule other than the reserved time from the input buffer 9. Assign a period.

Among the allocated times, the latest time is returned to the holding register 10-j as a new allocated time tk. The new allocated time tk returned to the holding register 10-j is stored in the subsequent holding register 1Q-((j+1
) mod N), and a new allocated time t (k+1 m
od N) is shifted through the transfer loop 11. Then, this shifted allocated time t (
k+1 mod N) is repeated.

Note that there is no particular need for a certain relationship between this allocation processing operation and the cell sending time.

In this way, by using the scheduled transmission time and circulating it to each input buffer 9-0 to 9-(N-1),
It becomes possible to treat each input port 1-0 to 1-(N-1) equally without an additional circuit. Furthermore, since the reserved time is used, all cells destined for a certain output port stored in each input buffer 9-0 to 9-(N-1) can be allocated in one allocation process.
Even if the control circuit is slow and the number of ports of the space switch 4 increases and the allocation process period becomes longer, output times are allocated to a large number of cells when the allocation process to a certain output is repeated. No more throughput drop.

In addition, in the above embodiment, the case where the transmission reservation for each cell is processed using time has been explained, but it may also be done from the position of each cell (order information such as the number after the current cell), and this The timing of the specification includes the time and the position of each cell.

[Second Embodiment] FIG. 2 is a block diagram illustrating the configuration of a cell contention control circuit showing another embodiment of the present invention, and the same components as in FIG. 1 are given the same reference numerals. .

In this figure, 12 is a bidirectional barrel shift space switch, and the correspondence between each input port 1-0 to 1-(N-1) and each input buffer 9-0 to 9-(N-1) is periodic. to 1
A so-called barrel shift operation is performed in which the ports are shifted one by one, and the reserved output port sending time ti (0≦i<N) held in the holding registers 13-0 to 13-(N-1) is transferred, and the output ports are sequentially shifted. Registers 13-0 to 13-(N-
1) Transfer via transfer lines 14-0 to 14-(N-1).

Figure 3 shows the barrel shift space switch 1 shown in Figure 2.
2 is a detailed circuit diagram illustrating the configuration of 21-0 to 21.
-11 is a unit switch with 2 inputs and 2 outputs, for example 3
The two inputs are switched and output in two ways depending on the value of data dO'=dll ("O" or "1") read from the ROM 22 by the address 23a (FIG. 4) from the bit counter 23.

FIG. 4 is a relative diagram illustrating a correspondence table between the ROM 22 and the 3-bit counter 23 shown in FIG. 3, and shows a case where, for example, eight types of data 22a are outputted according to the address 23a.

FIGS. 5(a) and 5(b) are schematic diagrams for explaining the switch control operations of the two-input, two-output unit switches 21-0 to 21-11 shown in FIG. The switch state when data d and rOJ are input to each of the unit switches 21-0 to 21-11 with 2 inputs and 2 outputs is shown, and (b) of the figure shows the unit switch 21-0 with 2 inputs and 2 outputs ~21
-11 shows the switch state when data ct, rl are input.

In this way, the barrel shift space switch 12 receives the address 23a (ao
-a2), data d is output from the ROM 22.

The configuration is such that barrel shift processing can be performed by Nd I 1, and data d0 is transferred every time the allocation operation is completed.
~dll is updated and barrel shift processing is executed.

Next, the operation of the cell contention control circuit shown in FIG. 2 will be explained.

The reserved sending time t of cells destined for output port 3-k (0≦k<N) is transmitted from holding register 13-k to input buffer 9-k via barrel shift space switch 12, and thereafter in the same manner as above. Allocating reserved output port sending times for the cells (generally plural) accumulated in the power buffer 9-k is processed, and the reserved output port sending time assigned to the latest cell is set as the new reserved output port sending time. Transfer line 14- is sent back to holding register 13-k via barrel shift space switch 12. Then, after the barrel shift space switch 120 performs the barrel shift operation, allocation to the next holding register 13-(k+1) begins processing. Note that there is no particular need for a certain relationship between this allocation processing operation and the cell sending time.

In this way, the line capacities of the space switch 4 and the barrel shift space switch 12 are increased in advance.

By setting the space switch 4 in advance, the space switch 4 can be operated without actually stopping the operation of the space switch 4. A new input buffer 9 can be added while the barrel shift space switch 12 is operating.

〔Effect of the invention〕

As explained above, the present invention includes a plurality of holding registers that individually hold transmission reservation times corresponding to each output port, and an input buffer that stores transmission reservation times transmitted from any holding register to the corresponding input buffer. an allocation means for sequentially allocating transmission reservation times to a plurality of unreserved cells, and returning the transmission reservation time to a holding register with a final allocation of τIJ to the last cell; A transfer loop is provided that sequentially updates and cyclically transfers the final allocated transmission reservation time returned to the subsequent holding register as the next transmission reservation start time signal. Therefore, it is possible to allocate transmission timing to a certain output port, and even if the number of ports of the space switch increases and the cycle of transmission allocation processing for a certain output port becomes longer, a decrease in throughput can be suppressed. Therefore, when used in a large-capacity asynchronous transfer mode switching node with a large number of space switch ports, there is no drop in throughput and smooth switching processing can be achieved.

In addition, the one that uses a barrel shift space switch has multiple holding registers that hold the reserved sending timing corresponding to each output port, and the sending reserved timing signal held in each holding register is transferred between the input buffer and the reserved sending timing signal. A barrel shift space switch that transmits and receives data while sequentially shifting barrels, and a transmission reservation time for multiple unreserved cells accumulated in this input buffer based on the transmission reservation time sent to the input buffer via this barrel shift space switch. In addition to sequential allocation, the allocation means returns the final allocation transmission reservation time allocated to the last cell to the holding register via the barrel shift space switch, so input buffers and output ports can be added while the barrel shift space switch is operating. This makes it possible to achieve excellent effects such as increasing the efficiency of expansion work.

[Brief explanation of drawings]

FIG. 1 is a block diagram illustrating an example of a cell contention control circuit showing an embodiment of the present invention, and FIG. 2 is a block diagram illustrating the configuration of a cell contention control circuit showing another embodiment of the invention. 3 is a detailed circuit diagram explaining the configuration of the barrel shift space switch shown in FIG. 2, FIG. 4 is a relative diagram explaining the correspondence table between the ROM and the 3-bit counter shown in FIG. 5(a) and 5(b) are schematic diagrams illustrating the switch control operation of the 2-input 2-output unit switch shown in FIG. 3, and FIG. 6 is a block diagram illustrating the configuration of a conventional switch circuit. be.

Claims (2)

[Claims] (1) An input buffer that receives and stores cells with headers of a fixed length for each input port, and a space that decodes the headers of cells stored in this input buffer and switches them to each output port corresponding to their destination. a cell contention control circuit that controls contention of cells destined for the same output port to the spatial switch, the cell contention control circuit having a plurality of holding registers that individually hold transmission reservation timings corresponding to each of the output ports; From the transmission reservation time transmitted from the holding register to the corresponding input buffer, the transmission reservation time is sequentially assigned to a plurality of unreserved cells accumulated in the input buffer, and the final assigned transmission reservation time is assigned to the last cell. an allocation means for replying to the holding register, and a transfer loop for sequentially updating and cyclically transferring the final allocated transmission reservation time returned to the holding register by the allocation means as a next transmission reservation start time signal to a subsequent holding register. A cell contention control circuit comprising: (2) An input buffer that receives and stores cells with headers of a fixed length for each input port, and a space that decodes the headers of cells stored in this input buffer and switches them to each output port corresponding to their destination. a cell contention control circuit that controls contention of cells destined for the same output port to the space switch, the cell contention control circuit having a switch, a plurality of holding registers holding reserved transmission times corresponding to each of the output ports, and each holding register. A barrel shift space switch that transmits and receives the reserved transmission time signal held in the input buffer while sequentially barrel-shifting it to and from an input buffer, and a barrel shift space switch that transmits and receives the reserved transmission time signal held in the input buffer from the reserved transmission time signal transmitted to the input buffer via the barrel shift space switch. an allocation means for sequentially allocating transmission reservation times to a plurality of unreserved cells stored in a buffer, and returning the final allocated transmission reservation time allocated to the last cell to the holding register via the barrel shift space switch; A cell contention control circuit characterized by comprising: