JPH0284071A - Dc power device - Google Patents

Dc power device

Info

Publication number
JPH0284071A
JPH0284071A JP23313988A JP23313988A JPH0284071A JP H0284071 A JPH0284071 A JP H0284071A JP 23313988 A JP23313988 A JP 23313988A JP 23313988 A JP23313988 A JP 23313988A JP H0284071 A JPH0284071 A JP H0284071A
Authority
JP
Japan
Prior art keywords
voltage
rectification
triac
power supply
turned
Prior art date
Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
Granted
Application number
JP23313988A
Other languages
Japanese (ja)
Other versions
JP2712369B2 (en
Inventor
Hitoshi Yoshioka
均 吉岡
Takeshi Miyazawa
宮澤 毅
Current Assignee (The listed assignees may be inaccurate. Google has not performed a legal analysis and makes no representation or warranty as to the accuracy of the list.)
Yutaka Electric Mfg Co Ltd
TDK Lambda Corp
Original Assignee
Yutaka Electric Mfg Co Ltd
TDK Lambda Corp
Priority date (The priority date is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the date listed.)
Filing date
Publication date
Application filed by Yutaka Electric Mfg Co Ltd, TDK Lambda Corp filed Critical Yutaka Electric Mfg Co Ltd
Priority to JP63233139A priority Critical patent/JP2712369B2/en
Publication of JPH0284071A publication Critical patent/JPH0284071A/en
Application granted granted Critical
Publication of JP2712369B2 publication Critical patent/JP2712369B2/en
Anticipated expiration legal-status Critical
Expired - Lifetime legal-status Critical Current

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Abstract

PURPOSE:To prevent extremely high voltage from applying to circuit elements even in voltage variations by switching over a switching means to full wave rectification side by a force holding means if the input voltage is identified as high in putting the power supply to work, and after that even if low voltage is detected in operation by power supply fluctuation caused by voltage drop, etc., by forcibly holding full wave rectification. CONSTITUTION:If high voltage is detected by a discrimination means 8 in putting the power supply to work, no trigger circuit 9 will turn ON a TRIAC 7 by a forced holding means 10 even if the voltage is reduced as prescribed temporarily after that in operation, so that application of extremely high voltage to the circuit elements at rear stages will be prevented by the time lag in switching the TRIAC 7 without changing over to voltage doubler rectification.

Description

【発明の詳細な説明】 [発明の目的] (産業上の利用分野) 本発明は入力電圧の高低に応じて整流方式を自動的に切
り換えて所定の直流電圧を得る直流電源装置に関するも
のである。
[Detailed Description of the Invention] [Object of the Invention] (Industrial Application Field) The present invention relates to a DC power supply device that automatically switches the rectification method depending on the level of input voltage to obtain a predetermined DC voltage. .

(従来の技術) 一般に、世界各国の商用電源電圧はA C80VからA
C276Vまで様々な電圧値を示している。このため、
同一の直流電源装置を世界各国で使用できるように、入
力電圧の高低に応じて整流方式を自動的に切り換えるよ
うにしている。すなわち、例えば入力電圧がAC100
■のときは倍電圧整流を行い出力にほぼ入力電圧の最大
値の2倍の電圧が得られるようにし、入力電圧がAC2
00Vのときは全波整流を行うようにしている。このよ
うなM流力式を自動的に切り換えるには、入力電圧の高
低を検出し、この高低に応じてダイオードブリッジ回路
に接続されたトライアックなどのスイッチをオンさせる
ことにより倍電圧整流が、一方オフさせることにより全
波整流が各々行われるようになっており、例えばこの種
のものとして特開昭58−213317号公報が開示さ
れている。
(Prior art) Generally, the commercial power supply voltage in countries around the world ranges from 80V to 80V.
It shows various voltage values up to C276V. For this reason,
The rectification method is automatically switched depending on the input voltage so that the same DC power supply can be used in different countries around the world. That is, for example, if the input voltage is AC100
In the case of (2), voltage double rectification is performed so that the output voltage is approximately twice the maximum value of the input voltage, and the input voltage is AC2.
When the voltage is 00V, full-wave rectification is performed. In order to automatically switch such an M-current type, voltage doubler rectification can be performed by detecting the high or low level of the input voltage and turning on a switch such as a triac connected to a diode bridge circuit depending on this high or low level. Full-wave rectification is performed by turning them off, and for example, Japanese Patent Laid-Open No. 58-213317 discloses this type of rectification.

(発明が解決しようとする課題) このように、入力電圧の高低を判別して自動的に整流方
式を切り換えるものにお、いては、第4図に示すように
高電圧が入力されてトライア・yりがオフし全波整流が
行われているときに、電圧降下又は入力が断続的に遮断
される電圧変動が発生すると、−時的に低電圧が検出さ
れ、その結果トライアックにオン信号が出力されトライ
アックがオンして倍電圧整流に切り換わる。しかし、そ
のtIt復帰して高電圧が再び検出されるとトライアッ
クをオフするようオフ信号が出力されるが、トライアッ
クはこのオフ信号が与えられても、印加電圧がOvに低
下するまでオフされない、そのため、入力電圧が低電圧
から高電圧に復帰しても倍電圧整流から全波整流に切り
換わるには多少のタイムラグがある。この結果、高電圧
が倍電圧整流されることになり、トライアックの後段に
接続されるコンデンサや池の素子に一時的に非常に高い
出力電圧が印加されることになり、破壊にいなる恐れが
あった。
(Problem to be Solved by the Invention) In this way, in a device that automatically switches the rectification method by determining whether the input voltage is high or low, when a high voltage is input as shown in FIG. When the TRIAC is off and full-wave rectification is occurring, if a voltage drop or voltage fluctuation occurs that causes the input to be interrupted intermittently, a low voltage will be detected, resulting in an ON signal to the TRIAC. The triac is turned on and switched to voltage doubler rectification. However, when tIt returns and a high voltage is detected again, an off signal is output to turn off the triac, but even if this off signal is given, the triac will not be turned off until the applied voltage drops to Ov. Therefore, even if the input voltage returns from a low voltage to a high voltage, there is some time lag before switching from voltage doubler rectification to full wave rectification. As a result, the high voltage is doubled and rectified, and a very high output voltage is temporarily applied to the capacitor and pond elements connected to the rear stage of the triac, which may cause damage. there were.

そこで、本発明は前記問題点に基づいて成されたもので
あり、電圧変動があっても回路素子に異常に高い電圧が
加わることを防止できる直流電源装置を提供することを
目的とするものである。
SUMMARY OF THE INVENTION The present invention has been made based on the above-mentioned problems, and it is an object of the present invention to provide a DC power supply device that can prevent abnormally high voltage from being applied to circuit elements even when there are voltage fluctuations. be.

[発明の構成J (課題を解決するための手段) 本発明は入力電圧の高低を判別する判別手段を設け、こ
の判別手段において判別された入力電圧の高低に応じて
整流方式を全波整流又は倍電圧整流に切り換えるスイッ
チ手段を設けるとともに、前記判別手段において電源投
入時に高電圧と判別されたとき電源投入後の動作中、前
記スイッチ手段を全波m流側に保持させる強制保持手段
を設けたものである。
[Structure J of the Invention (Means for Solving the Problems) The present invention provides a determining means for determining whether the input voltage is high or low, and changes the rectification method to full-wave rectification or A switch means for switching to voltage doubler rectification is provided, and a forced holding means is provided for holding the switch means on the full-wave m flow side during operation after the power is turned on when the discrimination means determines that the voltage is high when the power is turned on. It is something.

(作 用) 電源投入時に入力電圧が高電圧と判別されると強制保持
手段によりスイッチ手段は全波整流側に切り換わり、そ
れ以後の動作中に電圧降下などの電源変動により低電圧
が検出されても強制的に全波整流が保持される。
(Function) When the input voltage is determined to be high voltage when the power is turned on, the switch means is switched to the full-wave rectification side by the forced holding means, and during subsequent operation, low voltage is detected due to power fluctuations such as voltage drop. Full-wave rectification is forcibly maintained.

(実施例) 以下、図面に基づいて本発明の一実施例を詳述する。第
1図はブロック図であり、1は交流電源、2は平滑コン
デンサ3.4と相俟って交流入力を直流に変換するよう
ダイオードをブリッジ接続した整流部であり、直流電圧
が出力端子5.6から出力される。7は整流部2の入力
接地端子と平滑コンデンサ3゜4の接続点との間に接続
されたトライアックであり、このトライアック7がオン
しているときは整流部2において倍電圧整流が構成され
、一方オフしていると金波整流が構成される。
(Example) Hereinafter, an example of the present invention will be described in detail based on the drawings. Figure 1 is a block diagram, in which 1 is an AC power supply, 2 is a rectifier in which diodes are bridge-connected to convert AC input into DC in conjunction with a smoothing capacitor 3.4, and DC voltage is output from output terminal 5. Output from .6. 7 is a triac connected between the input ground terminal of the rectifier 2 and the connection point of the smoothing capacitor 3゜4, and when the triac 7 is on, voltage doubler rectification is configured in the rectifier 2, On the other hand, when it is off, Kinwave rectification is configured.

8は交流電源1に接続し入力電圧が低電圧(例えばAC
looV)か高電圧(AC200V)のどちらであるか
を詞刑する判別手段である。
8 is connected to the AC power supply 1 and the input voltage is low voltage (for example, AC
This is a means of determining whether the voltage is high voltage (AC200V) or high voltage (AC200V).

9はこの判別手段8の判定結果に応じて入力電圧が低電
圧の場合トライアyり7をオンさせ、高電圧の場合トラ
イアック7をオフさせるトリガ回路である。10は入力
投入時に判別手段8が高電圧であると判別した場合、ト
リガ回路9を*ItlJI、て入力投入後の動作中、強
制的にトライアック7のオフを保持させる強制保持手段
である。
A trigger circuit 9 turns on the triac 7 when the input voltage is a low voltage, and turns off the triac 7 when the input voltage is a high voltage, according to the determination result of the discriminating means 8. Reference numeral 10 denotes forced holding means that, when the determining means 8 determines that the voltage is high when the input is applied, causes the trigger circuit 9 to *ItlJI to forcibly keep the triac 7 off during operation after the input is applied.

次に、第2図の回路図を用いて判別手段8゜トリガ回路
9及び強制保持手段10の具体的な一実施例を詳述する
0判別手段8は交流電圧を直流に変換する整流部11及
び平滑コンデンサ12と、この得られた直流電圧を分圧
する抵抗13.14と、これらの抵抗13.14の分圧
点に接続し高電圧を検出したときにオンするトランジス
タ15及びツェナーダイオード16等から構成される。
Next, a specific embodiment of the discriminating means 8, the trigger circuit 9, and the forced holding means 10 will be described in detail using the circuit diagram of FIG. and a smoothing capacitor 12, a resistor 13.14 that divides the obtained DC voltage, a transistor 15, a Zener diode 16, etc. that are connected to the voltage division point of these resistors 13.14 and turn on when a high voltage is detected. It consists of

また、トリガ回路9は低電圧が検出されたときにオンす
るトランジスタ17と、このトランジスタ17がオンし
たときに発光する発光ダイオード18と、この発光ダイ
オード18とともにフォトカブラ19を構成するフォト
トライアック20等から構成される。さらに、強制保持
手段10は電源投入時に高電圧が検出されたときに定電
流動作を行うためのトランジスタ21と、高電圧検出時
に前記トランジスタ15とともにオンしその後低電圧が
検出されても前記トランジスタ21からオン状態の保持
電流が流れ続けられるサイリスタ22等から構成されて
いる。
The trigger circuit 9 also includes a transistor 17 that turns on when a low voltage is detected, a light emitting diode 18 that emits light when the transistor 17 turns on, and a phototriac 20 that forms a photocoupler 19 together with the light emitting diode 18. It consists of Further, the forced holding means 10 includes a transistor 21 for performing constant current operation when a high voltage is detected when the power is turned on, and a transistor 21 that is turned on together with the transistor 15 when a high voltage is detected and even if a low voltage is detected thereafter. It is composed of a thyristor 22, etc., through which an on-state holding current continues to flow.

以−Eのように構成される本発明の作用を第3図のタイ
ムチャートを基に詳述する。先ず、交流電源lから低電
圧が供給されると、判別手段8において分圧点の電圧が
低いためトランジスタ15がオフとなり、トランジスタ
17がオンする。このため、発光ダイオード18が点灯
し、フにトトライアック20がオンするため、トライア
ック7がオンしてNK部2は@電圧整流に切り換わる。
The operation of the present invention constructed as shown below will be explained in detail based on the time chart of FIG. First, when a low voltage is supplied from the AC power source 1, the voltage at the voltage dividing point in the determining means 8 is low, so the transistor 15 is turned off and the transistor 17 is turned on. Therefore, the light emitting diode 18 lights up and the triac 20 is turned on, so the triac 7 is turned on and the NK section 2 is switched to voltage rectification.

一方、交流電源1から高電圧が供給されると、判別手段
8において分圧点の電圧が上昇し、ツェナーダイオード
16及びトランジスタ15がオンし、その結果、サイリ
スタ22がオンしてトランジスタ17のベース電流を引
くためトランジスタ17はオフし発光ダイオード18は
消灯する。このため、トライアック7はオフしU流部2
は全波整流に切り換わる。また、この場合、強制保持手
段10においてトランジスタ21がオンして定電流動作
を行い、ひとたびサイリスタ22がオンしたならば入力
電圧が低下しトランジスタ15がオフしてもサイリスタ
22のオン状態を保持するよう保持電流を流し続ける。
On the other hand, when a high voltage is supplied from the AC power source 1, the voltage at the voltage dividing point increases in the determining means 8, the Zener diode 16 and the transistor 15 are turned on, and as a result, the thyristor 22 is turned on and the base of the transistor 17 is turned on. In order to draw current, the transistor 17 is turned off and the light emitting diode 18 is turned off. Therefore, the triac 7 is turned off and the U flow section 2
switches to full-wave rectification. Further, in this case, in the forced holding means 10, the transistor 21 is turned on to perform a constant current operation, and once the thyristor 22 is turned on, the input voltage decreases and even if the transistor 15 is turned off, the thyristor 22 remains on. The holding current continues to flow.

従って、電源投入時に判別手段8により高電圧が検出さ
れサイリスタ22がオンすると、第3図に示すように電
源投入後の電源が遮断されるまでの動作中に電圧降下な
どによって一時的に低電圧にまで低下しても定電流作用
によりサイリスタ22がオン状態を継続するため発光ダ
イオード18が点灯せず、すなわちトリガ回路9はオン
信号をトライアック7に出力できず、トライアック7は
オフを継続し全波整流が維持される。この結果、再度交
流電源1から復帰した高電圧が供給されても従来のよう
にトライアック7のタイムラグにより異常な高電圧が後
段の回路素子に供給されることがなく、回路の安全を図
、ることができる、尚、第3図に示すように一時的に低
電圧になった場合、整流部2は全波整流のままであるた
め一時的に出力電圧は低下する。
Therefore, when a high voltage is detected by the discriminator 8 and the thyristor 22 is turned on when the power is turned on, as shown in FIG. Since the thyristor 22 continues to be in the ON state due to the constant current action even if the current decreases to Wave rectification is maintained. As a result, even if the high voltage restored from the AC power supply 1 is supplied again, abnormal high voltage will not be supplied to the subsequent circuit elements due to the time lag of the triac 7, unlike in the conventional case, and circuit safety is ensured. However, when the voltage temporarily becomes low as shown in FIG. 3, the output voltage temporarily decreases because the rectifier 2 remains in full-wave rectification.

また、サイリスタ22は交流電源1が遮断され平滑コン
デンサ12の電荷が無くなるまでオンし続ける。
Further, the thyristor 22 continues to be turned on until the AC power supply 1 is cut off and the smoothing capacitor 12 is no longer charged.

このようにして、電源投入時に判別手段8により高電圧
が検出されると、それ以後の動作中に一時的に電圧が所
定の低電圧まで低下しても強制保持手段10によりトリ
ガ回路9はトライアック7をオンさせないようにするた
め、倍電圧wL流に切り換わることがなくトライアック
7の切り換わり時のタイムラグにより後段の回路素子に
異常な高い電圧が加わることが防止される。
In this way, when a high voltage is detected by the discrimination means 8 when the power is turned on, the trigger circuit 9 is activated by the forced holding means 10 even if the voltage temporarily drops to a predetermined low voltage during subsequent operation. Since triac 7 is not turned on, it is not switched to the voltage doubler wL flow, and a time lag when switching triac 7 prevents an abnormally high voltage from being applied to subsequent circuit elements.

以上、本発明の一実施例について詳述したが、本発明の
要旨の範囲内で適宜変形できる。
Although one embodiment of the present invention has been described in detail above, it can be modified as appropriate within the scope of the gist of the present invention.

例えばスイッチ手段としてはトライアック以外の素子も
使用できる。
For example, elements other than triacs can be used as the switch means.

[発明の効果] 以上詳述したように本発明によれば入力電圧の高低に応
じて整流方式を切り換える直流電源装置において、入力
電圧の高低を判別する判別手段と、この判別手段により
判別された入力電圧の高低に応じて整流方式を全波整流
又は倍電圧整流に切り換えるスイッチ手段と、前記判別
手段により電源投入時に高電圧と判別されたとき電源投
入後の動作中、前記スイッチ手段を全波整流側に保持さ
せる強制保持手段とを備えたことにより、電圧変動があ
っても回路素子に異常に高い電圧が加わることを防止で
きる直流電源装置を提供することができる。
[Effects of the Invention] As detailed above, according to the present invention, in a DC power supply device that switches the rectification method depending on the level of input voltage, there is provided a discrimination means for discriminating whether the input voltage is high or low; a switch means for switching the rectification method to full-wave rectification or voltage doubler rectification according to the level of the input voltage; and a switch means for switching the rectification method to full-wave rectification or voltage doubler rectification according to the level of the input voltage; By including the forced holding means for holding on the rectifying side, it is possible to provide a DC power supply device that can prevent abnormally high voltage from being applied to circuit elements even if there is a voltage fluctuation.

【図面の簡単な説明】[Brief explanation of the drawing]

第1図は本発明の一実施例を示すブロック図、第2図は
同回路図、第3図はタイムチャート、第4図は従来の不
具合を示すタイムチャートである。 7・・・トライアック(スイッチ手段)8・・・判別手
段 10・・・強制保持手段 特 許 出 同 願 人 株式会社ユタ力電機 製作所 ネミツク・ラムダ 株式会社 代 理 人
FIG. 1 is a block diagram showing an embodiment of the present invention, FIG. 2 is a circuit diagram thereof, FIG. 3 is a time chart, and FIG. 4 is a time chart showing problems in the conventional technology. 7...Triac (switching means) 8...Discrimination means 10...Forced holding means Patent applicant Utah Power Electric Manufacturing Co., Ltd. Nemic Lambda Co., Ltd. Agent

Claims (1)

【特許請求の範囲】[Claims] 入力電圧の高低に応じて整流方式を切り換える直流電源
装置において、入力電圧の高低を判別する判別手段と、
この判別手段により判別された入力電圧の高低に応じて
整流方式を全波整流又は倍電圧整流に切り換えるスイッ
チ手段と、前記判別手段により電源投入時に高電圧と判
別されたとき電源投入後の動作中、前記スイッチ手段を
全波整流側に保持させる強制保持手段とを備えたことを
特徴とする直流電源装置。
In a DC power supply device that switches a rectification method depending on the level of input voltage, a determining means for determining whether the input voltage is high or low;
a switch means for switching the rectification method to full-wave rectification or voltage doubler rectification according to the level of the input voltage determined by the determination means; , and forced holding means for holding the switch means on the full-wave rectification side.
JP63233139A 1988-09-16 1988-09-16 DC power supply Expired - Lifetime JP2712369B2 (en)

Priority Applications (1)

Application Number Priority Date Filing Date Title
JP63233139A JP2712369B2 (en) 1988-09-16 1988-09-16 DC power supply

Applications Claiming Priority (1)

Application Number Priority Date Filing Date Title
JP63233139A JP2712369B2 (en) 1988-09-16 1988-09-16 DC power supply

Publications (2)

Publication Number Publication Date
JPH0284071A true JPH0284071A (en) 1990-03-26
JP2712369B2 JP2712369B2 (en) 1998-02-10

Family

ID=16950338

Family Applications (1)

Application Number Title Priority Date Filing Date
JP63233139A Expired - Lifetime JP2712369B2 (en) 1988-09-16 1988-09-16 DC power supply

Country Status (1)

Country Link
JP (1) JP2712369B2 (en)

Cited By (3)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
US6755389B2 (en) 2000-06-14 2004-06-29 Surpass Industry Co., Ltd. Flow regulation valve
US6932318B2 (en) 2002-07-03 2005-08-23 Surpass Industry Co., Ltd. Flow control device
US8215609B2 (en) 2007-05-16 2012-07-10 Hun Ki Kim Flow control valve assembly with low noise

Citations (1)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
JPH0222091U (en) * 1988-07-25 1990-02-14

Patent Citations (1)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
JPH0222091U (en) * 1988-07-25 1990-02-14

Cited By (3)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
US6755389B2 (en) 2000-06-14 2004-06-29 Surpass Industry Co., Ltd. Flow regulation valve
US6932318B2 (en) 2002-07-03 2005-08-23 Surpass Industry Co., Ltd. Flow control device
US8215609B2 (en) 2007-05-16 2012-07-10 Hun Ki Kim Flow control valve assembly with low noise

Also Published As

Publication number Publication date
JP2712369B2 (en) 1998-02-10

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