JPH0280862U - - Google Patents

Description

[Brief explanation of drawings]

Figure 1 is an external view of an electronic memo pad. FIG. 2 is a diagram showing a conventional memory circuit. FIG. 3 is a diagram showing an applied circuit of the invention.

Amendment June 29, 1999 The name of the invention is amended as follows. Title of the invention Schedule storage device The scope of the utility model registration claims and the brief description of the drawings are amended as follows.

[Claims for Utility Model Registration] An input means, a buffer memory for storing first time data, second time data, and memo data corresponding to the second time data inputted from the input means; a data memory into which the second time data and the memo data are input, and each of the plurality of second time data and the memo data is stored in an address order such that the second time data can be read out in order of magnitude; In a schedule storage device comprising a display section for displaying the memo data, during schedule storage, the second time data to be stored stored in the buffer memory and the second time data read out in address order from the data memory; a determination circuit that determines whether the first time data stored in the buffer memory matches the second time data read out in address order from the data memory when calling the schedule; At the time of schedule storage, the second time data and the memo data stored in the buffer memory are transferred to the second time data and the memo data stored in the buffer memory based on the determination result of the determination circuit.
The time data is stored at an address in the data memory that can be read out in order of magnitude, and when the schedule is called, the data corresponds to the second time data determined to be a match in response to the determination circuit determining a match. A schedule storage device, characterized in that said memo data is transferred to said display section.

[Brief Description of the Drawings] FIG. 1 is an external view of a schedule storage device. Second
The figure shows a circuit of a conventional schedule storage device. FIG. 3 is a diagram showing a circuit of the schedule storage device of the present invention.

Claims (1)

[Scope of utility model registration request] A keyboard for inputting time data, a keyboard memory for storing the time data inputted to the keyboard, a data memory for storing a plurality of inputted time data in chronological order, and the time data and the data stored in the keyboard memory. A determination circuit that sequentially determines the magnitude of the plurality of time data stored in a memory; when inputting data, the plurality of time data stored in the data memory is sequentially read out and supplied to the determination circuit; control means for performing a comparison with the time data stored in the keyboard memory, and controlling to store the time data stored in the keyboard memory at a corresponding address in the time order of the data memory according to the comparison result. An electronic memo pad that is characterized by: