JPH027834A - Battery charger - Google Patents

Battery charger

Info

Publication number
JPH027834A
JPH027834A JP15888888A JP15888888A JPH027834A JP H027834 A JPH027834 A JP H027834A JP 15888888 A JP15888888 A JP 15888888A JP 15888888 A JP15888888 A JP 15888888A JP H027834 A JPH027834 A JP H027834A
Authority
JP
Japan
Prior art keywords
battery
fet3
fet1
turned
fet2
Prior art date
Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
Granted
Application number
JP15888888A
Other languages
Japanese (ja)
Other versions
JP2858008B2 (en
Inventor
Eiji Kondo
近藤 英次
Current Assignee (The listed assignees may be inaccurate. Google has not performed a legal analysis and makes no representation or warranty as to the accuracy of the list.)
Shindengen Electric Manufacturing Co Ltd
Original Assignee
Shindengen Electric Manufacturing Co Ltd
Priority date (The priority date is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the date listed.)
Filing date
Publication date
Application filed by Shindengen Electric Manufacturing Co Ltd filed Critical Shindengen Electric Manufacturing Co Ltd
Priority to JP63158888A priority Critical patent/JP2858008B2/en
Publication of JPH027834A publication Critical patent/JPH027834A/en
Application granted granted Critical
Publication of JP2858008B2 publication Critical patent/JP2858008B2/en
Anticipated expiration legal-status Critical
Expired - Lifetime legal-status Critical Current

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  • Control Of Charge By Means Of Generators (AREA)

Abstract

PURPOSE:To reduce the size of a battery charger, to improve the economical properties and to enable reduction of commutation loss by utilizing the bilateral on characteristic of a FET transistor. CONSTITUTION:When an AC input phi1 has positive polarity, the FET1 in its arm is biased nigatively and turned OFF, then FET2, FET3 are baised forwardly and tuned ON thus supplying generated current through a path of a diode D1 - a battery BAT - FET2, FET3. When the AC input PHI1 has negative polarity, the gate of the FET1 is biased positively and turned ON bilaterally thus making the charging current flow through a path of a diode D1 - a battery BAT-Fet2, FET3. When the AC input phi1 has negative polarity, the gate of the FET1 is biased positively and turned ON bilaterally thus making the charging current flow through a path of a diode D2 - the battery BAT-FET1, FET3. When the battery BAT is fully charged, it is detected through a control circuit CONT and a positive bias signal is provided. All FETs are turned ON and the AC input is shortcircuited through a path of a generating coil EXT-FET1, FET2 or FET3 thus maintaining the battery voltage at a predetermined level.

Description

【発明の詳細な説明】 本発明は二輪車等の車載用バッテリの充電装置に関する
もので特に装置の小型経済化と損失の低減をはかった充
電装置を提供するものである。第1図はこの種の従来回
路図で、図中Mは永久磁石式発電機、[ZXTはその発
電コイル、D1〜D4は全波(ブリッジ)整流器を形成
するダイオード[3ATはバッテリ、C0NTはバッテ
リ電圧検出制御回路、S CR+ 、S CR2は夫々
ダイオドD3、D4に並列(逆方向)に接続されたサイ
リスタで夫々ゲートは該制御回路C0NTに接続されて
いる。この動作は永久磁石発電fiMにより発電した交
流電流iは、矢印i+の様にブリッジダイオードD1〜
D4により、整流されて、BA]゛に充電される。
DETAILED DESCRIPTION OF THE INVENTION The present invention relates to a charging device for a battery mounted on a vehicle such as a two-wheeled vehicle, and particularly provides a charging device that is compact and economical and reduces losses. Figure 1 is a conventional circuit diagram of this type, where M is a permanent magnet generator, ZXT is its generating coil, D1 to D4 are diodes forming a full-wave (bridge) rectifier, 3AT is a battery, and C0NT is a The battery voltage detection control circuits S CR+ and S CR2 are thyristors connected in parallel (in opposite directions) to diodes D3 and D4, respectively, and have gates connected to the control circuit C0NT. In this operation, the alternating current i generated by the permanent magnet power generation fiM is connected to the bridge diode D1 to
It is rectified by D4 and charged to BA].

やがて、IIATが、満充電になると、C0NT部によ
り、BAT端子電圧を検出して、SCR。
Eventually, when IIAT becomes fully charged, the C0NT section detects the BAT terminal voltage and turns on the SCR.

5CR2に点弧信号を与える。その結果、5CR3CR
2は“ON ”の状態となり、発電電流は点線12の如
く、5CR2により、短絡されてBATへの充電は停止
される。(尚、この時、永久磁石式発電機は、出力イン
ピーダンスが大きいため、出力を短絡しても、問題ない
、)係る従来装置は主回路にダイオードとサイリスタの
逆並列回路を複数個要するために部品点数が多く、又ダ
イオードの整流損失が問題となる欠点がある。
Give an ignition signal to 5CR2. As a result, 5CR3CR
2 is in the "ON" state, and the generated current is short-circuited by 5CR2, as indicated by the dotted line 12, and charging to BAT is stopped. (At this time, permanent magnet generators have a large output impedance, so there is no problem even if the output is short-circuited.) This conventional device requires multiple anti-parallel circuits of diodes and thyristors in the main circuit. It has the disadvantage that it requires a large number of parts and rectification loss of the diode becomes a problem.

本発明は係る欠点を解消した充電装置を提供するもので
、三相交流発電機の交流出力を整流器を介して整流して
バッテリを充電すると共に該バッテリ電圧を検出して該
交流出力を短絡し該バッテリ電圧を所定値に維持せしめ
るようにしたバッテリ充電装置において、各アームがダ
イオードと電界効果トランジスタにより成る全波整流回
路を形成する共に該電界効果トランジスタのゲート制御
回路を有し、且つ前記ゲート制御回路は夫々自己アムの
入力正電位(又は負電位)と同期して自己アームの電界
効果トランジスタのケートに負バイアス信号(又は正バ
イアス信号)を送付する機能を備えたことを特徴とする
ものである。
The present invention provides a charging device which eliminates such drawbacks, and which rectifies the AC output of a three-phase AC generator via a rectifier to charge a battery, and also detects the battery voltage and short-circuits the AC output. In the battery charging device for maintaining the battery voltage at a predetermined value, each arm forms a full-wave rectifier circuit consisting of a diode and a field effect transistor, and has a gate control circuit for the field effect transistor, and the gate Each control circuit is characterized by having a function of sending a negative bias signal (or positive bias signal) to the gate of the field effect transistor of the self-arm in synchronization with the input positive potential (or negative potential) of the self-arm. It is.

第2図は本発明の一実施例回路図で従来例と同一符号は
同等部分を示す8本発明は従来例のダイオドD3、サイ
リスタ5CRI及びダイオードD、サイリスタ5CR2
の代りに電界効果トランジスタF ET’+ 、 F 
ET2 及びFET3を用イテ三相全波整流回路を形成
する。そして制御回路C0NTは三相交流入力の各相の
入力正電位と同期して自相アームの電界効果トランジス
タのゲートに負バイアス信号送出し、これにより他アー
ムの電界効果トランジスタを介して全波整流回路を形成
してバッテリを充電する。即ちこの動作を第3図の動作
波形を用いて説明する0周知の如く三相交流は人力位相
が夫々120°異る。従って制御回路C0NTにおいて
夫々入力位相φ1、φ2、φ3の正電位を検出した時に
信号(a)(b)(c)を夫々FET、〜FET3のゲ
ートに送出する(第3図(a)(b)(c)) このように構成すれば交流人力φ1が正極の時はこの間
(1,〜14)自己アームのFETIは負バイアスされ
てオフ状態を保ち、池FET2又は〜釦 F E T 3が順バイアスされオン状態になることに
より、発電電流はダイオードD1−バッテリーBA T
  F E T 2 、 F E T 3の経路で流れ
バッテリBATを充電する。一方逆極性の時はFETI
のゲートが、正バイアスされ双方向共オン状態となり充
電電流はダイオードD2−バッテリBATしてF E 
T 、及びF E T 2 、F E T 3の夫々ゲ
トに正バイアス信号(第3図d)を送出する結果、各F
ETI〜FET3は共にオン状態となり発電コイ)Iy
 E X ”r”  F E T H、F E T 2
又ハF E T3の経路で夫々交流入力を短絡してバッ
テリ電圧を所要値に維持する如く動作する。
FIG. 2 is a circuit diagram of an embodiment of the present invention, in which the same symbols as in the conventional example indicate equivalent parts.
Instead of field effect transistor F ET'+ , F
A three-phase full-wave rectifier circuit is formed using ET2 and FET3. Then, the control circuit C0NT sends a negative bias signal to the gate of the field effect transistor of the own phase arm in synchronization with the input positive potential of each phase of the three-phase AC input, thereby performing full-wave rectification via the field effect transistor of the other arm. Form a circuit to charge the battery. That is, this operation will be explained using the operation waveforms of FIG. 3.As is well known, in three-phase AC, the human phase differs by 120 degrees. Therefore, when the control circuit C0NT detects the positive potential of the input phases φ1, φ2, and φ3, it sends the signals (a), (b), and (c) to the gates of the FETs and FET3, respectively (Fig. 3(a), (b) ) (c)) With this configuration, when the AC human power φ1 is positive, during this period (1, ~14), the self-arm FETI is negatively biased and remains off, and the pond FET2 or ~ button FET3 is turned off. By being forward biased and turned on, the generated current is transferred from the diode D1 to the battery BA T
The flow battery BAT is charged through the paths F ET 2 and F ET 3. On the other hand, when the polarity is reversed, FETI
The gate of is positively biased and turned on in both directions, and the charging current flows through diode D2 - battery BAT and F E
As a result of sending a positive bias signal (FIG. 3d) to each gate of FET 2 and FET3,
Both ETI to FET3 are in the on state and the power generation coil)Iy
E X “r” F E T H, F E T 2
In addition, each of the AC inputs is short-circuited in the FET3 path to maintain the battery voltage at a required value.

第4図は制御回路の一実施例を示すもので図中COMI
〜C0M4は→−該開回路COM 1〜CO罠蝦 較し、夫々入力電位が負(−)の時、夫々自己アムの電
界効果トランジスタのゲートG1乃至G3に正バイアス
信号を送出する。又C0M4はバッテリ電圧(満充電)
を抵抗R,,Jで検出した出力(十入力)と基準電圧K
を比較し上記基準信号Sを変化せしめて各F ET 、
〜FE T 3を同時に正バイアスする。
Figure 4 shows an example of the control circuit, and in the figure COMI
~C0M4 →-The open circuit COM1~CO traps and sends a positive bias signal to the gates G1 to G3 of the self-amp field effect transistors, respectively, when the respective input potentials are negative (-). Also, C0M4 is the battery voltage (fully charged)
The output (10 inputs) detected by resistors R, , J and the reference voltage K
are compared and the reference signal S is changed to obtain each FET,
~FET 3 is simultaneously positively biased.

このように本発明によれば電界効果トランジスタの双方
向オン特性を利用することにより従来のSCRとダイオ
ードの逆並列回路を1つの電界効果トランジスタにより
等価的に置換できるので回路の小型、経済化が達成でき
る共に電界効果トランジスタの低いオン抵抗を利用する
ことにより整流用ダイオードに比し整流損失の低減が可
能である等実用上の効果は大きい。
As described above, according to the present invention, by utilizing the bidirectional ON characteristic of the field effect transistor, the conventional anti-parallel circuit of an SCR and a diode can be equivalently replaced with one field effect transistor, thereby making the circuit smaller and more economical. By utilizing the low on-resistance of field effect transistors, it is possible to reduce rectification loss compared to rectifier diodes, which has great practical effects.

【図面の簡単な説明】[Brief explanation of the drawing]

第1図は従来回路図、第2図、第3図及び第414は本
発明の一実施例回路図、動作説明図及制御回路の結線図
である。 図においてMは発電機、EXTは発電コイル、D、〜D
3、Da、DCはダイオード、S CRl5CR2はサ
イリスタ、C0NTは制御回路、BATはバッテリ、F
 ETI、FET2 、FE’r3は電界効果トランジ
スタ、COMI〜C0M4は比較器である。
FIG. 1 is a conventional circuit diagram, and FIGS. 2, 3, and 414 are circuit diagrams of an embodiment of the present invention, an operation explanatory diagram, and a wiring diagram of a control circuit. In the figure, M is the generator, EXT is the generator coil, D, ~D
3. Da, DC are diodes, SCR15CR2 are thyristors, C0NT is a control circuit, BAT is a battery, F
ETI, FET2, and FE'r3 are field effect transistors, and COMI to C0M4 are comparators.

Claims (2)

【特許請求の範囲】[Claims] (1)三相交流発電機の交流出力を整流器を介して整流
してバッテリを充電すると共に、該バッテリ電圧を検出
して該交流出力を短絡し該バッテリ電圧を所定値に維持
せしめるようにしたバッテリ充電装置において、各アー
ムがダイオードと電界効果トランジスタより成る三相全
波整流回路を形成するとともに該電界効果トランジスタ
のゲート制御回路を有し、且つ前記ゲート制御回路は夫
々自己アームの入力正電位(又は負電位)と同期して自
己アームの電界効果トランジスタのゲートに負バイアス
信号(又は正バイアス信号)を送出す機能を備えたこと
を特徴とするバッテリ充電装置。
(1) The AC output of the three-phase AC generator is rectified via a rectifier to charge the battery, and the battery voltage is detected and the AC output is short-circuited to maintain the battery voltage at a predetermined value. In the battery charging device, each arm forms a three-phase full-wave rectifier circuit consisting of a diode and a field effect transistor, and has a gate control circuit for the field effect transistor, and each gate control circuit has a positive input potential of its own arm. 1. A battery charging device characterized by having a function of sending a negative bias signal (or positive bias signal) to the gate of a field effect transistor of a self-arm in synchronization with (or negative potential).
(2)制御回路にバッテリ電圧が満充電状態を検出した
時各電界効果トランジスタに同時に正バイアス信号を送
出する機能を付与したことを特徴とする特許請求の範囲
第(1)項記載のバッテリ充電装置。
(2) Battery charging according to claim (1), characterized in that the control circuit is provided with a function of simultaneously sending a positive bias signal to each field effect transistor when the battery voltage detects a fully charged state. Device.
JP63158888A 1988-06-27 1988-06-27 Battery charger Expired - Lifetime JP2858008B2 (en)

Priority Applications (1)

Application Number Priority Date Filing Date Title
JP63158888A JP2858008B2 (en) 1988-06-27 1988-06-27 Battery charger

Applications Claiming Priority (1)

Application Number Priority Date Filing Date Title
JP63158888A JP2858008B2 (en) 1988-06-27 1988-06-27 Battery charger

Publications (2)

Publication Number Publication Date
JPH027834A true JPH027834A (en) 1990-01-11
JP2858008B2 JP2858008B2 (en) 1999-02-17

Family

ID=15681575

Family Applications (1)

Application Number Title Priority Date Filing Date
JP63158888A Expired - Lifetime JP2858008B2 (en) 1988-06-27 1988-06-27 Battery charger

Country Status (1)

Country Link
JP (1) JP2858008B2 (en)

Cited By (3)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
WO1999060684A1 (en) * 1998-05-18 1999-11-25 Seiko Epson Corporation Overcharge protection, charger, electronic device and timepiece
US8415931B2 (en) 2010-05-21 2013-04-09 Mitsubishi Electric Corporation Power supply device
US8525490B2 (en) 2010-05-18 2013-09-03 Mitsubishi Electric Corporation Power supply device

Citations (2)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
JPS5163655A (en) * 1974-10-03 1976-06-02 Ootomeishan Puradakutsu Inc
JPS61140176A (en) * 1984-12-13 1986-06-27 Semiconductor Energy Lab Co Ltd Semiconductor device

Patent Citations (2)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
JPS5163655A (en) * 1974-10-03 1976-06-02 Ootomeishan Puradakutsu Inc
JPS61140176A (en) * 1984-12-13 1986-06-27 Semiconductor Energy Lab Co Ltd Semiconductor device

Cited By (6)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
WO1999060684A1 (en) * 1998-05-18 1999-11-25 Seiko Epson Corporation Overcharge protection, charger, electronic device and timepiece
EP1017146A1 (en) * 1998-05-18 2000-07-05 Seiko Epson Corporation Overcharge protection, charger, electronic device and timepiece
US6373790B1 (en) 1998-05-18 2002-04-16 Seiko Epson Corporation Overcharge prevention method, changing circuit, electronic device and timepiece
EP1017146A4 (en) * 1998-05-18 2004-04-14 Seiko Epson Corp Overcharge protection, charger, electronic device and timepiece
US8525490B2 (en) 2010-05-18 2013-09-03 Mitsubishi Electric Corporation Power supply device
US8415931B2 (en) 2010-05-21 2013-04-09 Mitsubishi Electric Corporation Power supply device

Also Published As

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JP2858008B2 (en) 1999-02-17

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