JPH0276309A - Automatic gain control circuit - Google Patents
Automatic gain control circuitInfo
- Publication number
- JPH0276309A JPH0276309A JP22818288A JP22818288A JPH0276309A JP H0276309 A JPH0276309 A JP H0276309A JP 22818288 A JP22818288 A JP 22818288A JP 22818288 A JP22818288 A JP 22818288A JP H0276309 A JPH0276309 A JP H0276309A
- Authority
- JP
- Japan
- Prior art keywords
- down counter
- control circuit
- gain control
- controlled
- reference voltage
- Prior art date
- Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
- Pending
Links
- 238000006243 chemical reaction Methods 0.000 abstract 1
- 230000003247 decreasing effect Effects 0.000 description 1
- 238000010586 diagram Methods 0.000 description 1
Landscapes
- Control Of Amplification And Gain Control (AREA)
Abstract
Description
【発明の詳細な説明】
本発明は４線式音声専用回線で使用される通称インバン
ドリンガーなる装置に備える自動利得制御回路に関する
ものである。DETAILED DESCRIPTION OF THE INVENTION The present invention relates to an automatic gain control circuit provided in a device commonly called an in-band ringer used in a four-wire audio dedicated line.
この種の装置では、交換接続のためのダイヤルパルスは
音声帯域内の特定の周波数を使って伝送されるため、通
話時にはこの信号を止めなければならないという理由に
より、この信号をパイロット信号とする通常の自動利得
制御は実施が困震であった。In this type of equipment, it is common practice to use this signal as a pilot signal because the dial pulse for switching connections is transmitted using a specific frequency within the voice band, and this signal must be stopped during a call. The automatic gain control was difficult to implement.
本発明はこのような装置に於いても、前記パイロット信
号を使って無通話時に実施した自動利得制御情報をディ
ジタル的に記憶しておき、通話時には、この記憶しであ
る情報により利得を継続保持することにより、常に安定
な自動利得制御回路を提供することを目的とする。Even in such a device, the present invention digitally stores automatic gain control information performed during no calls using the pilot signal, and when a call is made, the gain is continuously maintained using this stored information. The purpose of this invention is to provide an automatic gain control circuit that is always stable.
本発明はアップダウンカウンタと、これによて制御され
る可変利得制御回路をそなえ、出力電圧と基準電圧の比
較結果により前記アップダウンカウンタを制御するよう
な構成とするものである。The present invention includes an up-down counter and a variable gain control circuit controlled by the up-down counter, and is configured to control the up-down counter based on a comparison result between an output voltage and a reference voltage.
本発明を図面に基づいて説明すると、図において、入力
信号は２で示すアップダウンカウンタによってディジタ
ル制御される１で示す可変利得制御回路を経て出力され
る。出力信号の一部は３で示す交流−直流変換器を経て
４で示す電圧比較器で基準電圧と比較され、その結果に
より６［アップダウンカウンタを制御する。いま交流−
直流変換した出力電圧が基準電圧に比べて小さい場合に
は、アップダウンカウンタの制御方向は１の可変利得Ｉ
Ｉ御回路の利得を増加させる方向とし、また出力電圧が
逆に大きい場合には利得を減少させる方向とするならば
、出力電圧は理想的には基準電圧を挟んだ１ビツトのＩ
ｇｍ範囲内を往復するだけとなる。The present invention will be explained based on the drawings. In the figure, an input signal is outputted through a variable gain control circuit indicated by 1 which is digitally controlled by an up/down counter indicated by 2. A part of the output signal passes through an AC-DC converter shown at 3 and is compared with a reference voltage at a voltage comparator shown at 4, and the result controls an up/down counter 6. Interacting now-
When the DC-converted output voltage is smaller than the reference voltage, the control direction of the up-down counter is set to the variable gain I of 1.
If the gain of the I control circuit is to be increased, and if the output voltage is large, the gain is to be decreased, then ideally the output voltage should be equal to the 1-bit I value across the reference voltage.
You will only have to go back and forth within the gm range.
通話開始に先立ってパイロット信号が所となれば、５で
示すパイロット信号検出器の出力により６で示すアンド
ゲートを閉じてクロックパルスの供給を止め、アップダ
ウンカウンタの動作を停止させる０通話時にはこの時の
利得が継続して保持される。When a pilot signal is detected prior to the start of a call, the output of the pilot signal detector shown as 5 closes the AND gate shown as 6 to stop the supply of clock pulses and stop the operation of the up/down counter. Time gains continue to be maintained.
本発明は以上説明したように、無通話時に伝送されるパ
イロット信号を利用して自動利得制御を実施し、通話時
にはこの記憶情報により利得を継続保持することにより
、インバンドリンガー装置等に安定した自動利得制御回
路を提供することができる。As explained above, the present invention implements automatic gain control using the pilot signal transmitted when there is no call, and by continuously maintaining the gain using this stored information during a call, it is possible to stabilize the in-band ringer device, etc. An automatic gain control circuit can be provided.
添付図面は本発明の自動利得Ｉ！御四回路一実施例を示
すブロック図である。
１・・・ディジタルＩＩＪ御可変利得１１御回路、２・
・・アップダウンカウンタ、
３・・・交流−直流変換器、
４・・・電圧比較器、
５・・・パイロット信号検出器、
６・・・アンドゲート
特許出願人 国際システム株式会社The attached drawings show the automatic gain I! of the present invention. FIG. 4 is a block diagram showing an embodiment of the four circuits. 1... Digital IIJ control variable gain 11 control circuit, 2...
...up/down counter, 3.AC-DC converter, 4.voltage comparator, 5.pilot signal detector, 6.ANDGATE patent applicant Kokusai System Co., Ltd.
Claims (1)
利得制御回路を備え、出力電圧と基準電圧の比較結果に
より前記アップダウンカウンタを制御することを特徴と
する自動利得制御回路。An automatic gain control circuit comprising an up-down counter and a variable gain control circuit controlled by the up-down counter, and controlling the up-down counter based on a comparison result between an output voltage and a reference voltage.
Priority Applications (1)
| Application Number | Priority Date | Filing Date | Title |
|---|---|---|---|
| JP22818288A JPH0276309A (en) | 1988-09-12 | 1988-09-12 | Automatic gain control circuit |
Applications Claiming Priority (1)
| Application Number | Priority Date | Filing Date | Title |
|---|---|---|---|
| JP22818288A JPH0276309A (en) | 1988-09-12 | 1988-09-12 | Automatic gain control circuit |
Publications (1)
| Publication Number | Publication Date |
|---|---|
| JPH0276309A true JPH0276309A (en) | 1990-03-15 |
Family
ID=16872496
Family Applications (1)
| Application Number | Title | Priority Date | Filing Date |
|---|---|---|---|
| JP22818288A Pending JPH0276309A (en) | 1988-09-12 | 1988-09-12 | Automatic gain control circuit |
Country Status (1)
| Country | Link |
|---|---|
| JP (1) | JPH0276309A (en) |
Citations (5)
| Publication number | Priority date | Publication date | Assignee | Title |
|---|---|---|---|---|
| JPS5565168A (en) * | 1978-11-10 | 1980-05-16 | Mitsubishi Electric Corp | Agc system for radar receiver |
| JPS5583311A (en) * | 1978-12-19 | 1980-06-23 | Nec Corp | Agc circuit |
| JPS566516A (en) * | 1979-06-28 | 1981-01-23 | Fujitsu Ltd | Automatic gain control circuit |
| JPS5679511A (en) * | 1979-12-04 | 1981-06-30 | Ricoh Co Ltd | Automatic gain control circuit |
| JPS6377205A (en) * | 1986-09-20 | 1988-04-07 | Fujitsu Ltd | Transmission power control circuit |
-
1988
- 1988-09-12 JP JP22818288A patent/JPH0276309A/en active Pending
Patent Citations (5)
| Publication number | Priority date | Publication date | Assignee | Title |
|---|---|---|---|---|
| JPS5565168A (en) * | 1978-11-10 | 1980-05-16 | Mitsubishi Electric Corp | Agc system for radar receiver |
| JPS5583311A (en) * | 1978-12-19 | 1980-06-23 | Nec Corp | Agc circuit |
| JPS566516A (en) * | 1979-06-28 | 1981-01-23 | Fujitsu Ltd | Automatic gain control circuit |
| JPS5679511A (en) * | 1979-12-04 | 1981-06-30 | Ricoh Co Ltd | Automatic gain control circuit |
| JPS6377205A (en) * | 1986-09-20 | 1988-04-07 | Fujitsu Ltd | Transmission power control circuit |
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