JPH027149A - Information processor - Google Patents

Abstract

PURPOSE:To simplify a device constitution and to efficiently operate a CPU and a DMA by regulating access from the CPU or the DMA to a circumferential device connected to a local bus with an arbiter. CONSTITUTION:In a condition in which a CPU 11 makes access to an interrupting controller 141 through a local bus 14, when only an access request signal 131 from the CPU 11 is inputted, the CPU 11 is continuously allocated in a next period. When only the access request signal from the DMA 13 is inputted, the DMA 13 is allocated in the next period. When the access signals 131 and 133 are simultaneously inputted, the DMA 13 and the CPU 11, whose corresponding parties are exchanged, are allocated in the respective next periods based on whether the CPU or the DMA takes charge of orthogonal service, and both are equalized.

Description

[Detailed Description of the Invention] [Object of the Invention] (Industrial Application Field) The present invention relates to an information processing device having a control device and an information transfer device, and in particular, a method for connecting the control device and the information transfer device with a simple configuration. The present invention relates to an information processing device that operates on equal footing.

(Prior Art) A large number of printed materials consisting of multiple manuscripts, etc. are sequentially read by an image scanner device, and are registered as image information in a storage device such as an optical disk device, and such registered image information is transmitted as necessary. Various information processing devices that perform search output have been developed.

Conventional information processing devices include a control OII device such as a CP LJ for controlling peripheral devices, etc., and a control device such as a CP LJ to transfer the image information from one storage device to another, or from an input/output device to a storage device. It has an information transfer device for transferring information. This conventional information transfer device is CPtJ's 37
It was considered to be a so-called slave device on the same level as a single device.

In recent years, improvements have been made to information transfer devices, and DMA (D1rectMemory), which is treated as a so-called master device like a CPU,
Information transfer devices such as ACCeSS) have been proposed.

FIG. 4 is a block diagram of a conventional information processing apparatus incorporating such an information transfer apparatus treated as a master device.

As shown in FIG. 4, the CPU 411 is connected via a CPU local bus 421 to an interrupt controller 423, a floppy disk controller 425, and a serial interface 427 such as an R8232C.
33 are connected. Also, DMA, which is an information transfer device,
413 is connected to the interrupt controller 443.413 via the DMA local bus 441. Serial interface 445° is connected to floppy disk controller 447 and magnetic disk controller 449.

Further, a floppy disk device 451 is connected to the floppy disk controller 447, and a magnetic disk device 451 is connected to the magnetic disk controller 449.
3 is connected. In other words, the DMA 413 transfers information from the memory 461 to the floppy disk device 451, for example.
Or a magnetic disk! This floppy disk device 451 and magnetic disk device 45 are used for data transfer to the device 453.
3 to 1) DMA local bus 4 managed by MA413
It is located on the 41 side. Therefore, the CPU 4"11 is connected to the floppy disk controller 44 corresponding to these devices.
7 or the magnetic disk controller 449, a request signal (REQ-BREL signal) 471 to release the DMA local bus 441 is output to the DMA 413 prior to this access.

In the DMA 413, when a request signal 471 from the CPU 411 is input, an acceptance signal (BREL signal) 473 is sent to the CPU.
411 to release the DMA local bus 441.

(Problems to be Solved by the Invention) As described above, when the CPU 411 accesses the floppy disk controller 447 or the magnetic disk controllers 1 to 449, a problem arises in that the operation of the DMA 413 is stopped.

In addition, a CPU local bus 421 managed by the CPU 411
and DMA local bus 441 managed by DMA 413.
Since there are buses for both, it was necessary to improve it from a circuit design perspective as well.

In addition, LSI (L
arge S cafe lntegrati
on) is used in the peripheral circuits of the CPU (7), etc., and it has been desired to create a system configuration in which peripheral circuits using such LSIs can be easily applied.

The present invention has been made in view of the above circumstances, and allows efficient operation of a CPU and DMA with a simple configuration, and allows easy application of a circuit section using an LSI such as a one-chip gate array. The purpose is to provide an information processing device that can perform the following tasks.

[Configuration of the Invention (Means for Solving the Problems) In order to achieve the above object, the present invention provides information transfer means for accessing a first device and transferring information, and control for accessing a second device. a single bus line connecting the first device and the second device; and a single bus line connected to the bus line for access from the information transfer means and for controlling the information. and an adjusting means for adjusting the access from the means.

(Function) The information processing device of the present invention includes information transfer means for accessing the first device and transferring information, and control means for accessing the second device. Further, each of the devices and adjustment means are connected to a single bus line, and this adjustment means adjusts access from the information transfer device and the control device. This allows the information transfer device and the control device to operate efficiently.

(Example) Hereinafter, an example according to the present invention will be described in detail with reference to the drawings.

First, the overall configuration of an image information storage and retrieval device as an information processing device to which the present invention is applied will be explained with reference to FIG.

The image scanner device 1 is a device for reading the content written on a document such as a photograph or a document as image information from a reading section configured by an image sensor such as a COD. The image scanner device 1 includes an operation section 3 for setting parameters such as the document size, document density, and reading density of the document to be read, a memory (not shown) for storing these set parameters, and the like. A CPU (not shown) that controls the entire image scanner device 1, a display section 5 that displays input information such as setting conditions and processing time, and a CPU (not shown) that continuously reads documents placed on a document table (not shown). The automatic paper feed mechanism (ΔDF) transports documents to the
)7.

The control unit (OP(J) 11) controls the overall operation and data flow of the information processing device.

That is, the control unit 11, the DMA 13 (to be described later), the main memory 51, the buffer 7 memory 53a, and the page memory 53b.
1 code/image converter 71, display memory 73, IP
The U90, CODEC95, etc. are connected via the system bus 20.

Similarly, the control section 11 is connected to a buffer memory 53a, a page memory 53b, a code/image conversion section 71, a display memory 73, an IPU 90, a CODEC 95, and the like via an image bus 40 for transmitting image information.

The arbiter 12 is connected to the control unit 11 and also to the DMA 13 which is an information transfer device.
This is an adjustment means for adjusting the access from DMA 1 and the access from DMA 13 when they conflict with each other. Further, the arbiter 12, the interface circuit 11a, and the interface circuit 13a are connected via a single local bus 14.

Interface circuit 11 managed by control unit 11
An external data input bag @100 is connected to a.

The data input device 100 can be used, for example, to input character information when creating a document using a word processing function, or to move a cursor displayed on the screen of the display device 77 when performing a search or image processing. A keyboard 101 and a mouse 10 for inputting search information, various command information, array formats, etc. for switching functions.
3 are provided.

DMA (D 1rect Memory Access
s) 13 is independent of the operation of the control unit 11 if there is no conflict with access from the control unit 11;
If there is a conflict with access from arbiter 1,
For example, data such as data is transferred between the buffer 7 memory 53a and the storage device 30 via the interface circuit 13a.

The storage device 30 includes a magnetic disk device 31 that stores information for specifying desired image information from a large amount of image information, that is, search information, etc., and a magnetic disk device 31 that stores information for specifying desired image information from among a large amount of image information, and a magnetic disk device 31 that stores information for specifying desired image information from among a large amount of image information, and a magnetic disk device 31 that stores information for specifying desired image information from among a large amount of image information. An optical disk 6133 stores search information, etc., and stores other image information, or is used as a spare storage device. Floppy disk device 3
Consists of 5th grade.

The main memory 51 stores the operation program of the control section 11 described above.

The buffer 1 memory 53a has a storage capacity of, for example, 128 bytes, and sequentially stores code data whose redundancy has been compressed by the CODEC95.

Further, the buffer memory 53a is provided with a counter for counting the amount of stored data, and when the stored data d based on the count value of this counter reaches, for example, more than half of the storage capacity, that is, when the stored data d reaches 64. When more than a byte of code data is stored, the 64-byte data is sent word by word to the optical disk device 33 via the system bus 20 and the interface circuit 13a.

For example, the page memory 53b stores a number of pages for an A4 size document.
It has a storage capacity that can accommodate 0 pages, and temporarily stores image information input from the image scanner device 1 or image information retrieved from the optical disk device 33.

For example, the code/image converter 71 converts the keyboard 10
It converts the character code data inputted from 1 into image data and outputs it to the display memory 73, and if necessary, performs reverse conversion to correct the characters converted into image data on the screen. .

The display memory 73 is a memory that temporarily stores image information when the display device 77 displays an image based on the image information from the page memory 53b or the like.

The display control unit 75 controls the drive of a display device 77 such as a CRT, and controls the display of image information stored in the display memory 73.

The CODEC 95 is an encoding/decoding circuit unit, and can reduce the storage area of a storage medium such as an optical disk used during registration by compressing image information, that is, by reducing redundancy.

Further, the CODEC 95 is a circuit unit that performs decompression processing of the compressed image information, that is, restores the reduced redundancy to the original image information and outputs it as the original image information.

This C0DEC95 has an IPU (■11agep r
ocessing Unit>90 is connected.

This IPU 90 includes an enlargement/reduction section 91 that enlarges and reduces image information, and an aspect/horizontal conversion section 9 that rotates image information.
It has built-in 3.

Furthermore, output devices such as the image scanner device 1 and the printer 9 are connected to the interface circuit 95a.

The printer 9 is a device that prints out image information as visible information such as characters on a recording medium such as paper, and is, for example, a C1 printer.

Next, we will explain how to operate the image information storage and retrieval device shown in FIG. Explain step by step.

First, when registering the read image information, follow the instructions on the initial information processing screen displayed on the display screen of the display device 77 to read the document and transfer the read image information to the predetermined optical disk device 33. The image information storage and retrieval device is set to the "read registration" mode by inputting a command etc. from the keyboard 101 for continuous registration.

Next, a number of other originals are stacked and placed on a predetermined position such as the original table of the image scanner device 1 constituting this image information storage and retrieval device, and the stacked originals are further read continuously. After setting the automatic paper feeding (ΔDF) J mode, input information related to initial settings such as the original size, original density, and reading density of this original from the keyboard 101 or the operation unit 3 of the image scanner device 1.

Further, after the image information from the image scanner device 1 is temporarily stored in the page memory 53b, the buffer memory 53
The information is transmitted to the optical disk device 33 via the interface circuit 13a and the interface circuit 13a, so that it can be registered on an optical disk (V in the figure) which is a storage medium of the optical disk device 33.

Next, use the keyboard '101 to register the title of the manuscript, informationffl! and search information such as array format are input in accordance with the format displayed on the screen of the display device 77.

This format specifies the original to be registered and inputs and sets search key items to facilitate the search process, and the remaining capacity of the storage device 30 when the image scanner device 1 reads the original. etc., a "table" for inputting key items for the above search, and a keyboard 101.
The function of this function key is displayed when inputting using the function key configured in .

When reading the document starts, the image information read from the image scanning device 1 is transferred to the interface circuit 95a.
The data is temporarily stored in the page memory 53b via the page memory 53b. Subsequently, after the image information is compressed by the C0DEC 95, the buffer memory 53a and the interface circuit 13a
Search information is registered in the magnetic disk device 31 via the search information, and search information and image information are registered in the optical disk device 33.

When searching for specific image information from a large amount of image information registered in the optical disk device 33 and printing out the searched image information, the keyboard 101 is used as in the case of reading and registering described above. Enter the search command to set it to “Search” mode.

Next, use the keyboard 101 to input search information for specifying desired image information, select the desired search information from a large number of search information recorded in the magnetic disk device 31, and apply the search information to the selected search information. Optical disk device 33 based on
Search for the desired image information registered in . The image information retrieved in this way is sent from the optical disk device 33.
It is applied to the CODEC 95 via the interface circuit 13a and the buffer 7 memory 53a.

The CODEC 95 restores the retrieved image information by processing such as expansion, and displays it on the display device 77 via the display memory 73 or the like.

When making a so-called hard copy of the displayed image information, the user uses the keyboard 101 to designate the image information desired to be made into a hard copy, sets the number of copies to be output, etc., and prints out the image from the printer 9.

Next, the main part of an embodiment according to the present invention will be explained with reference to FIG.

As shown in FIG. 2, the system bus 20 includes a control section (CP
U) 11, DMA 13, and buffer memory 53a are connected. Also, the memory 123 is connected to the CPU 11 and DMA1.
3 are connected to each of CPUII and DMA1
Shared with 3.

The arbiter 12 is connected to the CPU 11 and
It is connected to A13 and inputs the access request signal (REQ-CPU) 131 from CPU II, and
Access request signal from DMA13 @(REQ-DMA)
Enter 133.

When the arbiter 12 receives the access request signals 131 and 133 at the same time, it makes these adjustments using a so-called round-tropin method.

To be more specific, the arbiter 12 allocates a certain period of time according to the processing unit of CPL Jil or DMA 13, and adjusts the access request signals of both parties in consideration of the previous state every time this period elapses. Adjust so that access is even.

The arbiter 12 is connected to a plurality of peripheral devices via a single local bus 14, namely interrupt controllers 141 and R3.
Serial interface circuit 11al such as 232C,
A floppy disk controller 13a+, a magnetic disk controller 13a2, and an optical disk controller (not shown) are each connected.

A keyboard 101 and a mouse 103 are connected to a serial interface circuit 11a1 built in the interface circuit 11a.

The interface circuit 13a includes a floppy disk controller 13a1 and a magnetic disk controller 13a2.
A floppy disk device 35 is connected to the floppy disk controller 13a+, and a magnetic disk device 31 is connected to the magnetic disk controller 13a2.

Therefore, when there is a conflict with access from the control unit 11, the DMA 13 accesses the floppy disk controller 13a+ or the magnetic disk controller 13a2, which is the first peripheral device, for a period determined by the adjustment of the arbiter 12.
Alternatively, the information from the buffer memory 53a is transferred to the storage device 30 by accessing an optical disk controller (not shown).

Furthermore, when there is a conflict with an access from the DMA 13, the CPU 11 accesses the second device, such as the interrupt controller 141 and the serial interface circuit 11a1, for a period determined by the adjustment of the arbiter 12.

Next, the operation related to adjustment of the avita 12 will be explained with reference to FIG.

As shown in process A1, when the immediately preceding service is the CPU 11, that is, when the CPU 11 has been assigned in the previous period and the CPU 11 is accessing the interrupt controller 141 etc. via the local bus 14, the CPU 11 If only the access request signal 131 is input, the CPU 11 will continue to
is assigned. Therefore, the CPU II can continue to access the interrupt controller 141 and the like in the next period as well.

Similarly, when only the access request signal 131 from the CPU 11 is input as shown in process A4, the CPU 11 is assigned for the next period, and the CPU 11 can access the interrupt controller 141 etc. for the next period.

Conversely, processing △3. If only the access request signal 133 from the DMA 13 is input as shown in 86, the DMA 13 will be allocated for the next period, and the DMA 13 will be assigned to the floppy disk controller 13a+ in the next period.
, and peripheral devices such as the magnetic disk controller 13a2. As described above, when the DMA 13 accesses the peripheral devices, the floppy disk controller 13a+, the floppy disk controller 13a2
are handshake signals (DR
EQ/DACK 1') 151, operates by a handshake signal (DREQ/DACKO) 153,
Information from the buffer memory 53a is transferred to the system bus 20.
It is transferred to the storage device 30 via the local bus 14.

Next, the adjustment when the access request signals 131 and 133 are input at the same time will be explained.

As shown in process Δ2, when the previous service is CPU11, DMA13 is allocated in the next period. Also, as shown in process A5, the immediately preceding service is D.
If MA13, CPU11 for the next period.
is assigned.

Thereby, the accesses by the CPU 11 and the DMA 13 are adjusted to be equal.

As described above, access from the CPU II or DMA 13 to each peripheral device connected to the local bus 14 is adjusted by the arbiter 12, so that, for example, the CPU 11 accesses the floppy disk controller 13a1, etc., which is the peripheral device. Even in this state, the DMA 13 can access the buffer memory 53a connected to the system bus 20.

[Advantages of the Invention] As explained above, according to the present invention, a plurality of peripheral devices are connected to a single bus line, and access from the CPU and access from the DMA to each of these peripheral devices is connected. Since the adjustment is made using the adjustment means, the device configuration can be simplified, and the CPU and DM
A can be operated efficiently.

Further, a circuit section using an LSI such as a one-chip gate array can be easily applied, and costs can be reduced.

[Brief explanation of the drawing]

FIG. 1 is a block diagram of an image information storage and retrieval device to which the present invention is applied, FIG. 2 is a block diagram showing main parts of an embodiment according to the present invention, and FIG. 3 shows the operation of FIG. 2. The explanatory diagram, FIG. 4, is a block diagram showing a conventional example.

Claims (1)

[Scope of Claims] An information processing device having information transfer means for accessing a first device and transferring information, and control means for accessing a second device, wherein the first device and the second device are connected to each other. An information processing device comprising: a single bus line connecting the device; and an adjusting means connected to the bus line and adjusting access from the information transfer means and access from the control means. Device.