JPH0271381A - Sorting processor - Google Patents

Sorting processor

Info

Publication number
JPH0271381A
JPH0271381A JP63222297A JP22229788A JPH0271381A JP H0271381 A JPH0271381 A JP H0271381A JP 63222297 A JP63222297 A JP 63222297A JP 22229788 A JP22229788 A JP 22229788A JP H0271381 A JPH0271381 A JP H0271381A
Authority
JP
Japan
Prior art keywords
maximum value
memory
classification
category
circuit
Prior art date
Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
Pending
Application number
JP63222297A
Other languages
Japanese (ja)
Inventor
Yasumitsu Komatsu
小松 保満
Current Assignee (The listed assignees may be inaccurate. Google has not performed a legal analysis and makes no representation or warranty as to the accuracy of the list.)
NEC Corp
Original Assignee
NEC Corp
Priority date (The priority date is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the date listed.)
Filing date
Publication date
Application filed by NEC Corp filed Critical NEC Corp
Priority to JP63222297A priority Critical patent/JPH0271381A/en
Publication of JPH0271381A publication Critical patent/JPH0271381A/en
Pending legal-status Critical Current

Links

Abstract

PURPOSE:To select the desired number of higher rank categories that have small degrees of difference at recognition of a pattern at a high speed by carrying out a necessary arithmetic process and the selection of the higher rank categories at one time and in parallel with each other. CONSTITUTION:The correct answer value corresponding to the features and the feature value extracted out of an input pattern are added to an arithmetic circuit 13 from a dictionary memory 11 and a feature memory 12 respectively. Then a degree of difference between categories is obtained via a prescribed arithmetic. The maximum value, i.e., the initial value of a maximum value memory 15 is detected by a maximum value detecting circuit 16. A comparator 17 compares the obtained maximum value with the arithmetic result of the circuit 13. If the degree of difference, i.e., the arithmetic result is smaller than the maximum value, the set value of the memory 15 is replaced together with replacement of the category number of a sorting result memory 19. As a result, an arithmetic process to obtain the degree of difference and the selection of a higher rank category are performed at one time and in parallel with each other. Thus the higher rank category is selected at a high speed. The processing speed is more increased by multiplexing a sorting process function part having a small hardware quantity.

Description

【発明の詳細な説明】 〔産業上の利用分野〕 本発明は分類処理装置に関し、特に・ぐターン認識処理
を行うための分類処理装置に関する。
DETAILED DESCRIPTION OF THE INVENTION [Field of Industrial Application] The present invention relates to a classification processing device, and particularly to a classification processing device for performing turn recognition processing.

〔従来の技術〕[Conventional technology]

一般に、・Pターン認識において分類処理を行う場合に
は、特徴値(x)と谷カテゴリの辞書内容(y)とを比
較して谷カテゴリごとの相違度Σf(x、y)の演碧二
を行い、全カテゴリの演算が終了した後に、これら全力
デコゝりに対応する相違度をサーチするようになってい
る。そして、最も小さな相違度のカテゴリを求めて第1
位のカテゴリとする。更に、第1位を除外したカテコ゛
りについて相違度をサーチし、最も小さな相違度のカテ
コ゛リを第2位のカテゴリとする。この一連の処理を順
番に繰り返すことで上位のカテゴリの選出が行われてい
た。
Generally, when performing classification processing in P-turn recognition, the feature value (x) is compared with the dictionary content (y) of the valley category, and the degree of dissimilarity Σf(x, y) for each valley category is computed. After the calculations for all categories are completed, a search is made for the degree of dissimilarity corresponding to these full-scale decorations. Then, the first step is to find the category with the smallest degree of dissimilarity.
category. Furthermore, the degree of dissimilarity is searched for the categories excluding the first place, and the category with the smallest degree of difference is set as the category of the second place. By repeating this series of processes in order, the top categories were selected.

〔発明が解決しようとする課題〕[Problem to be solved by the invention]

しかしながら、このような手法による分類処理では、対
象カテゴリが多い場合に処理時間がかかるという課題が
ちった。例えば漢字の処理については数千字種のカテゴ
リがちるため、非常に多くの処理時間が必要となった。
However, classification processing using such a method has a problem in that it takes a long processing time when there are many target categories. For example, processing kanji requires an extremely large amount of processing time because there are thousands of characters in different categories.

本発明はこの点に着目したもので、多数のカテゴリの中
からt個の上位カテゴリを高速に選びだすことのできる
分類処理装置を提供するものである。
The present invention focuses on this point, and provides a classification processing device that can quickly select t higher-rank categories from among a large number of categories.

〔課題点を解決するための手段〕[Means to solve problems]

本発明によると、に個のカテゴリの中から特徴抽出され
た特徴1ift(x)と各カテコ゛りの辞書内容(y)
とを比較して相違度Σf (x r y ) k求め。
According to the present invention, the features 1ift(x) extracted from among the categories and the dictionary contents (y) of each category are
The degree of dissimilarity Σf (x ry ) k is calculated by comparing the values.

相違度の小さい−L位カテゴI/ t を個選択する分
類処理回路において、各カテゴリごとに相違度Σf(x
=y)全演算する複数の演算部と1分類後のt個の上位
力テコ゛す(/こついてそれらの演算結果を格納する最
大値メモリと、これら最大値メモリに格納された演算結
果の中で最大のものを求めるために用意された最大値検
出回路と、を個の上位カテゴリについてそルぞれの名称
を格納する分類結果メモリと、前記最大[直メモリと分
類結果メモリの両者を共用にアトVツンングするカウン
タ回路と2分類処理全数回にわけて1回0〃・らN回目
までのN段階の処理をくりかえして行なう多段階制御回
路とを具備すること全特徴とする高速分類処理装置が得
られる。
In the classification processing circuit that selects -L category I/t with small dissimilarity, the dissimilarity Σf(x
=y) Multiple calculation units that perform all calculations and t upper power outputs after one classification (/maximum value memory that stores those calculation results, and among the calculation results stored in these maximum value memories) A maximum value detection circuit prepared to find the maximum value in , a classification result memory that stores the names of each of the upper categories, and a maximum value detection circuit prepared to find the maximum value in The high-speed classification processing is characterized by being equipped with a counter circuit that performs at-to-V-tuning, and a multi-stage control circuit that repeats the N-stage processing from 1st time to the Nth time, dividing the total number of times into 2 classification processing times. A device is obtained.

〔実施例〕〔Example〕

次((1図面について本発明の詳細な説明する。 The following is a detailed description of the invention with reference to one drawing.

第1図は本発明の一実施例の構成図である。この分類処
理装置は次の回路部分より構成されているO ■ 各特徴に対応する正解匝を格納している辞書メモリ
110 ■ 人力・ぐターンから抽出さルた特徴匝全格納する特
徴メモリ12゜ ■ 辞書メモリ11の出力101A、l0IBと特徴メ
モリ12の出力102と全入力して距離計jIj:を行
う2系統の演算回路13−1.13−2゜■ 各種メモ
リのアドレッシングヲ同時に行うカウンタ回路14゜ ■ 2つの演算回路13−1.13−2の出力103A
、103Bのうち対応するものを人力して最大値を格納
する2系統の最大]直メモリ15−1.15−2゜ ■ 最大値メモリ15−1.15−2の出力104A、
104Bのうち対応するものを入力し最大値を検出する
2系統の最大1直検出回路16−1.16−2゜ ■ 最大値検出回路16−1.16−2の出力105A
、105Bのうち対応するものと演算回路13−1.1
3−2の出力103A、103Bのうち対応するもの全
比較し、カテコ゛りの決定を行う2系統の比較回路17
−1.17−2゜■ 比較回路17−1.17〜2の出
力107A。
FIG. 1 is a block diagram of an embodiment of the present invention. This classification processing device is composed of the following circuit parts: ■ A dictionary memory 110 that stores the correct answers corresponding to each feature; ■ A feature memory 12 that stores all the features extracted from manual input. ■ A two-system arithmetic circuit 13-1, 13-2 that performs distance meter jIj: by inputting all the outputs 101A and 10IB of the dictionary memory 11 and the output 102 of the feature memory 12 ■ A counter circuit that simultaneously performs addressing of various memories 14゜■ Output 103A of two arithmetic circuits 13-1 and 13-2
, 103B, the maximum value of the two systems is manually stored, and the maximum value is stored. Direct memory 15-1.15-2゜■ Output 104A of maximum value memory 15-1.15-2,
Two systems of maximum 1 direct detection circuit 16-1.16-2゜■ Output 105A of maximum value detection circuit 16-1.16-2 which inputs the corresponding one among 104B and detects the maximum value
, 105B and the corresponding arithmetic circuit 13-1.1
A two-system comparison circuit 17 that compares all corresponding outputs 103A and 103B of 3-2 and determines the category.
-1.17-2゜■ Output 107A of comparison circuit 17-1.17-2.

107B等を人力し処理すると共Vこ1分類処理装置 
ζ A 置傘体の制御を・行うための制御回路18゜■ 分類処
理結果を格納する分類結果メモリ19 。
107B etc. are manually processed and classified by V-1 classification processing equipment.
ζ A Control circuit 18 for controlling the umbrella body Classification result memory 19 for storing classification processing results.

■ 分類処理を1IBと2回目の2段階に分けて行う2
段階制御回路20゜ 02段階制御回路20の出力としての1IBの出力と2
回目の出力とを切り換える切換回路21゜ なお、この実施例では演算回路13.最大値メモリ15
等を2系統配置したが、複数系統であればよ〈3系統以
上の配置が可能である。
■ Classification processing is divided into two stages: 1IB and 2nd stage 2
Step control circuit 20゜02 Output of 1IB as output of step control circuit 20 and 2
Note that in this embodiment, the switching circuit 21 changes the output from the arithmetic circuit 13. Maximum value memory 15
Although we have arranged two systems, as long as there are multiple systems, it is possible to arrange three or more systems.

次に、このような構成の分類処理回路について。Next, let's talk about the classification processing circuit with such a configuration.

各回路部分を具体的に説明する。Each circuit portion will be specifically explained.

(演算回路) 演算回路13は人カバターンから抽出された特徴喧と、
各特徴に対応するカテゴリごとの辞書との相違度全計算
する部分であり1次の(1)式で距離計算を行う。
(Arithmetic circuit) The arithmetic circuit 13 calculates the features extracted from the human cover pattern,
This is the part that calculates all the degrees of difference from the dictionary for each category corresponding to each feature, and the distance is calculated using the linear equation (1).

ここでn;特徴数 X;特徴(直 y;辞書出力(直 である。where n; number of features X; Features (direct y; Dictionary output (direct It is.

(最大(直メモリ、最大1直検出回路)本来1分類処理
では、このΣf(xyy)のd1算をすべてのカテゴリ
について実行するようになっている。そして、その結果
の中で計算匝すなわち相違度が小さいカテコゝすを選び
だしている。ここで単に全カテゴリについて距離a1算
を行って全力テコ゛り分の距離結果から上位候補を選び
だすようにすると、莫大な処理時間全必要とすることに
なる。
(Maximum (direct memory, maximum 1 direct detection circuit)) Originally, in one classification process, this d1 calculation of Σf(xyy) is executed for all categories. If we simply calculate the distance a1 for all categories and select the top candidates from the distance results based on the full power, it would require a huge amount of processing time. become.

本発明は9分類処理時間を短縮できるようにするもので
あるが、この点について本実施例で最も重要とされる最
大値メモリ15および最大値検出回路16について詳し
く説明する。
The present invention is intended to shorten the nine-classification processing time, and in this regard, the maximum value memory 15 and maximum value detection circuit 16, which are most important in this embodiment, will be explained in detail.

本実施例で最大値メモリ15には分類処理の前に大きな
1直を初期泣として書き込んでいる。そして、各カテゴ
リごとの距離計算のたびに最大値メモリ15の最大(i
it検出し、この最大値と1カテゴリの距離結果を比較
回路17によって大小比較する。この結果、距離の方が
最大値検出1直よりも太きいときには次のカテゴリの距
離計算を行う。
In this embodiment, a large shift is written into the maximum value memory 15 as an initial value before classification processing. Then, each time the distance is calculated for each category, the maximum value memory 15 (i
It is detected, and the comparison circuit 17 compares the maximum value with the distance result of one category. As a result, if the distance is greater than the first maximum value detection, the distance calculation for the next category is performed.

また逆に距離1直が最大値検出値よりも小さい場合には
、その距離直企最大値メモリ15中の最大唾と入れ換え
ると同時に9分類結果メモリ19における最大1直メモ
リ15中の最大値の距離に対応するカテゴリ番号と、現
在のカテゴリ番号とを入れ換える。この処理′f:1カ
テゴリごとに行って順番に最大値メモリ15を更新して
いく。こうすると。
Conversely, if the distance 1st shift is smaller than the maximum value detected value, the maximum value in the maximum 1st distance memory 15 in the 9 classification result memory 19 is replaced with the maximum value in the maximum value memory 15 in the 9 classification result memory 19. Swap the category number corresponding to the distance with the current category number. This process 'f: is performed for each category and the maximum value memory 15 is updated in order. If you do this.

最終力テコ゛りの距離計算を行った後には、最大値メモ
リ15の内容は最終的に上位のカテゴリの距離計鼻血す
なわち相違度Σf(x+y)が残り。
After calculating the distance of the final force lever, the content of the maximum value memory 15 is finally the distance meter nosebleed of the upper category, that is, the difference degree Σf(x+y).

分類結果メモリ19には上位候補力テコゞすのカテゴリ
番号が残ることになる。すなわち、多数のカテゴリの中
から相違度の少ないに1位のカテゴリ群が選びだされ9
分類処理が完了することになる。
The category number of the top candidate will remain in the classification result memory 19. In other words, the group of categories with the lowest degree of dissimilarity is selected from a large number of categories.
The classification process will be completed.

(カウンタ回路) 特に2本実施例では辞書メモリ11および特徴メモリ1
2のアドレッシングを行うカウンタ回路14が最大値メ
モリのアトVツンングを行5ようになっている。このよ
うに同一のカウンタ回路14が共用されることにより、
距離演算を行っていると同時に最大1直メモリ15の内
容をザーチしで最大(fi ’c検出する処理が行なえ
る。この結果。
(Counter circuit) In particular, in this embodiment, there are two: dictionary memory 11 and feature memory 1.
The counter circuit 14 for addressing the maximum value memory is arranged as shown in row 5. By sharing the same counter circuit 14 in this way,
At the same time as the distance calculation is being performed, the contents of the maximum 1-direction memory 15 can be searched to perform maximum (fi'c detection processing).This result.

カテコ゛りの順位の並べかえ処理に必要とする時間は零
となる。換言すれば2分類処理に必要な処理時間は、距
離計算におけるΣf (x + y )の処理時間にカ
テゴリ数を掛けた時間とほぼ等しくなり高速の分類処理
が可能となる。
The time required to rearrange the order of the categories becomes zero. In other words, the processing time required for the two-classification process is approximately equal to the time obtained by multiplying the processing time of Σf (x + y) by the number of categories in the distance calculation, thereby enabling high-speed classification processing.

更に一般的には、特徴メモリ12等の他の回路部分に較
べて辞書は非常に大きな容量を必要とし。
Furthermore, in general, a dictionary requires a very large capacity compared to other circuit parts such as the feature memory 12.

ハードウェアとしての比率が高くなる。そこで本実施例
ではハードウェア量が辞書メモリ11に比較して少ない
分類処理回路を2つに多重化し、全体のハードウェアを
それほど大きくすることなく分類処理の並列化全可能に
している。これにより。
The ratio of hardware will increase. Therefore, in this embodiment, the classification processing circuit, which has a smaller amount of hardware than the dictionary memory 11, is multiplexed into two, thereby making it possible to perform classification processing in parallel without increasing the overall hardware size. Due to this.

分類処理は更に高速化されることになる。もちろん1回
路によっては3つ以上に多重化してもよい。
Classification processing will be further accelerated. Of course, one circuit may be multiplexed into three or more.

(多段階制御回路) また2本実施例では2段階制御回路19を配置している
ので9分類処理を1回目と2回目さらにN回目までの数
段階に分けてくりがえし行なうことができる。すなわち
、1回目では大きな分類。
(Multi-stage control circuit) In addition, in this embodiment, the two-stage control circuit 19 is arranged, so that the nine-classification process can be repeated in several stages, including the first, second, and Nth times. . In other words, the first time is a big classification.

すなわち少量の特徴の比較全高速で行ない、候補数を全
候補の数分の1にしぼりこんでしまう。2回目では1歩
tすめて細かな分類つ互り1回目で絞られた候補と辞書
の全r−夕と全比較する。さら[3回目以降N回目まで
同様の絞り込み全行ない最終的な分類結果全出力するこ
とが可能となる。
In other words, a small amount of features are compared at full speed, and the number of candidates is reduced to a fraction of the total number of candidates. In the second time, the candidates narrowed down in the first time are compared with all the entries in the dictionary, one step at a time, and the candidates are classified in detail. Furthermore, it becomes possible to carry out all the same narrowing down operations from the third time onward to the Nth time and output all the final classification results.

ここで1回目と2回目さらにN回目までの数段階を効率
良く分散して処理するようにすれば9分類処理に要する
時間は更に短縮されることになる。
If the first, second, and Nth stages are efficiently distributed and processed, the time required for the nine classification process will be further shortened.

次に以上、説明した例について1分類処理時間を比較し
ながら説明を補足する。
Next, the explanation will be supplemented by comparing the processing times for one classification with respect to the examples described above.

従来の処理回路では分類処理に要する時間Tは次の(2
)式に示すようになる。
In the conventional processing circuit, the time T required for classification processing is as follows (2
) as shown in the formula.

T=nk t1+ tk tz          −
(2)ここでn;特徴数 に;分類前カテがす数 t;分類後の上位カテゴリ数 tl ;1つの特徴に対する演算時間 t2 ;距離[直のサーチ全行う際の1回分の比較時間 である。
T=nk t1+ tk tz −
(2) Here, n; number of features; number of categories to be categorized before classification, t; number of upper categories after classification, tl; calculation time for one feature, t2; distance be.

この(2)式でnktlは、必要最小限の処理時間であ
り減少させることはできない。これに対してtkt2i
d:減少の可能性がある。また2分類前カテゴリ数にと
分類後の上位カテゴリ数tが大きくなるとtkt2で大
きくなり、処理時間Tが大きくなる。そこで本発明では
すでに説明したように距離値のサーチ全距離計算全実行
するときに同時に行うようにしてtkt2−0になるよ
うにしている。すなわち、1力テゴリ分の演算Σf(x
In this equation (2), nktl is the minimum necessary processing time and cannot be reduced. On the other hand, tkt2i
d: There is a possibility of decrease. Furthermore, when the number t of upper categories after classification increases to the number of categories before classification, tkt2 increases, and the processing time T increases. Therefore, in the present invention, as already explained, when the distance value search and all distance calculations are executed, they are performed at the same time so that tkt2-0 is reached. In other words, the operation Σf(x
.

y)を求める時間T2=Ω1.の処理実行中に時間T3
−tt2を実行してし捷う。特徴数口は分類後の上位カ
テゴリ数tよりも大きく、また本実施例の分類処理回路
ではj、=j2となる。従って1本実施例では時間T3
の実質的な1直はOと考えられるので2分類処理時間T
(/i次の(3)式のよってなる。
y) time T2=Ω1. At time T3 during the processing of
- Execute tt2 and exit. The number of features is larger than the number t of upper categories after classification, and in the classification processing circuit of this embodiment, j,=j2. Therefore, in this embodiment, time T3
Since the actual one shift is considered to be O, the two-class processing time T
(/i is obtained from the following equation (3).

T = n kt 1            −(3
)このように2本実施例によれば分類処理時間を大幅に
短縮させることができる。更に本実施例の分類処理回路
では、容量の大きな1つの辞−Jを分割し多重化された
2つの分類処理回路で処理することにより並列化処理が
行われる。一般には2以上の分類処理回路で並列処理が
行われる結果、処理時間Tは更に2倍以−Lに向−hす
ることが可能である。
T = n kt 1 - (3
) As described above, according to the two embodiments, the classification processing time can be significantly shortened. Further, in the classification processing circuit of this embodiment, parallel processing is performed by dividing one large-capacity word -J and processing it in two multiplexed classification processing circuits. Generally, as a result of parallel processing being performed by two or more classification processing circuits, it is possible to further increase the processing time T to -L by more than twice.

〔発明の効果〕〔Effect of the invention〕

このように2本発明では最大値メモリと最大直換出回路
とを利用して演算処理と上位カテゴリの選別処理とを同
時に行なうことが出来るので高速度の分類処理が可能に
なる効果がある。また9分類処理を1回目からN回目に
分けて大分類から細分類に分けて多数回に分散させるこ
とにより1分類処理の速度を更に向トさせることができ
る効果がある。
As described above, in the present invention, the maximum value memory and the maximum direct conversion circuit can be used to perform arithmetic processing and high-level category selection processing at the same time, which has the effect of enabling high-speed classification processing. In addition, by dividing the nine classification processing from the first to the Nth time, and dividing the classification from the major classification to the subclassification, and distributing it over multiple times, there is an effect that the speed of the one classification processing can be further increased.

【図面の簡単な説明】[Brief explanation of the drawing]

第1図は本発明の分類処理装置の一実施例のブロック図
である。 〔記号の説明〕 11・・・辞書メモリ、12・・・特徴メモリ、13・
・・演算回路、14・・・カウンタ回路、15・・・最
大値メモリ、16・・・最大値検出回路、17・・・比
較回路。 18・・・制御回路、19・・・分類結果メモリ、20
・・・2段階制御回路。
FIG. 1 is a block diagram of an embodiment of the classification processing device of the present invention. [Explanation of symbols] 11...Dictionary memory, 12...Characteristic memory, 13.
...Arithmetic circuit, 14...Counter circuit, 15...Maximum value memory, 16...Maximum value detection circuit, 17...Comparison circuit. 18... Control circuit, 19... Classification result memory, 20
...Two-stage control circuit.

Claims (1)

【特許請求の範囲】 1、k個のカテゴリの中から特徴抽出された特徴値(x
)と各カテゴリの辞書内容(y)とを比較して相違度Σ
f(x、y)を求め、相違度の小さい上位カテゴリをl
個選択する分類処理回路において、 各カテゴリごとに相違度Σf(x、y)を演算する複数
の演算部と、分類後のl個の上位カテゴリについてそれ
らの演算結果を格納する最大値メモリと、これら最大値
メモリに格納された演算結果の中で最大のものを求める
ために用意された最大値検出回路と、l個の上位カテゴ
リについてそれぞれの名称を格納する分類結果メモリと
、前記最大値メモリと分類結果メモリの両者を共用にア
ドレッシングするカウンタ回路と、分類処理を数回にわ
けて1回目からN回目までのN段階の処理をくりかえし
て行なう多段階制御回路とを具備することを特徴とする
分類処理装置。
[Claims] 1. Feature values (x
) and the dictionary content (y) of each category to calculate the degree of difference Σ
Find f(x, y) and choose the upper category with the smaller degree of difference as l
In the classification processing circuit for selecting the items, a plurality of calculation units that calculate the degree of dissimilarity Σf (x, y) for each category, and a maximum value memory that stores the calculation results for the l upper categories after classification; A maximum value detection circuit prepared to find the maximum among the calculation results stored in these maximum value memories, a classification result memory that stores the names of each of the l upper categories, and the maximum value memory. and a multi-stage control circuit that divides the classification process into several times and repeats the N-stage processing from the first time to the Nth time. classification processing device.
JP63222297A 1988-09-07 1988-09-07 Sorting processor Pending JPH0271381A (en)

Priority Applications (1)

Application Number Priority Date Filing Date Title
JP63222297A JPH0271381A (en) 1988-09-07 1988-09-07 Sorting processor

Applications Claiming Priority (1)

Application Number Priority Date Filing Date Title
JP63222297A JPH0271381A (en) 1988-09-07 1988-09-07 Sorting processor

Publications (1)

Publication Number Publication Date
JPH0271381A true JPH0271381A (en) 1990-03-09

Family

ID=16780152

Family Applications (1)

Application Number Title Priority Date Filing Date
JP63222297A Pending JPH0271381A (en) 1988-09-07 1988-09-07 Sorting processor

Country Status (1)

Country Link
JP (1) JPH0271381A (en)

Cited By (1)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
US5158156A (en) * 1990-05-14 1992-10-27 Mitsubishi Denki Kabushiki Kaisha Linear motor elevator with support wings for mounting secondary side magnets on an elevator car

Cited By (1)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
US5158156A (en) * 1990-05-14 1992-10-27 Mitsubishi Denki Kabushiki Kaisha Linear motor elevator with support wings for mounting secondary side magnets on an elevator car

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