JPH026346U - - Google Patents
Info
- Publication number
- JPH026346U JPH026346U JP8206588U JP8206588U JPH026346U JP H026346 U JPH026346 U JP H026346U JP 8206588 U JP8206588 U JP 8206588U JP 8206588 U JP8206588 U JP 8206588U JP H026346 U JPH026346 U JP H026346U
- Authority
- JP
- Japan
- Prior art keywords
- cpu
- input logic
- combination
- data bus
- soset
- Prior art date
- Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
- Pending
Links
- 238000012544 monitoring process Methods 0.000 claims description 4
- 230000005856 abnormality Effects 0.000 claims description 3
- 238000012806 monitoring device Methods 0.000 claims 1
- 238000010586 diagram Methods 0.000 description 2
Landscapes
- Debugging And Monitoring (AREA)
Priority Applications (1)
Application Number | Priority Date | Filing Date | Title |
---|---|---|---|
JP8206588U JPH026346U (en18) | 1988-06-21 | 1988-06-21 |
Applications Claiming Priority (1)
Application Number | Priority Date | Filing Date | Title |
---|---|---|---|
JP8206588U JPH026346U (en18) | 1988-06-21 | 1988-06-21 |
Publications (1)
Publication Number | Publication Date |
---|---|
JPH026346U true JPH026346U (en18) | 1990-01-17 |
Family
ID=31306832
Family Applications (1)
Application Number | Title | Priority Date | Filing Date |
---|---|---|---|
JP8206588U Pending JPH026346U (en18) | 1988-06-21 | 1988-06-21 |
Country Status (1)
Country | Link |
---|---|
JP (1) | JPH026346U (en18) |
-
1988
- 1988-06-21 JP JP8206588U patent/JPH026346U/ja active Pending