JPH0263225A - Echo controller - Google Patents
Echo controllerInfo
- Publication number
- JPH0263225A JPH0263225A JP21355388A JP21355388A JPH0263225A JP H0263225 A JPH0263225 A JP H0263225A JP 21355388 A JP21355388 A JP 21355388A JP 21355388 A JP21355388 A JP 21355388A JP H0263225 A JPH0263225 A JP H0263225A
- Authority
- JP
- Japan
- Prior art keywords
- output
- shift register
- multiplier
- calculation unit
- signal
- Prior art date
- Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
- Pending
Links
- 230000005540 biological transmission Effects 0.000 claims abstract description 16
- 238000009825 accumulation Methods 0.000 claims 1
- 230000003044 adaptive effect Effects 0.000 abstract description 5
- 230000003111 delayed effect Effects 0.000 abstract description 2
- 238000010586 diagram Methods 0.000 description 4
- 238000006243 chemical reaction Methods 0.000 description 2
- 230000000694 effects Effects 0.000 description 2
- 230000036461 convulsion Effects 0.000 description 1
- 230000001186 cumulative effect Effects 0.000 description 1
- 238000002592 echocardiography Methods 0.000 description 1
- 238000000034 method Methods 0.000 description 1
Landscapes
- Cable Transmission Systems, Equalization Of Radio And Reduction Of Echo (AREA)
Abstract
Description
【発明の詳細な説明】
[産業上の利用分野]
本発明はエコー制御装置、特に2114線変換等により
生じるエコーの制御装置に関する。DETAILED DESCRIPTION OF THE INVENTION [Field of Industrial Application] The present invention relates to an echo control device, and particularly to a control device for echoes generated by 2114 line conversion or the like.
[従来の技術]
従来、この種のエコーを制御する方法としては、受信入
力信号をもとに適応フィルタを通して擬似エコー信号を
生成して、送信入力から引き算することにより、エコー
を消去するエコーキャンセラがある。[Prior Art] Conventionally, as a method for controlling this type of echo, an echo canceler is used that generates a pseudo echo signal through an adaptive filter based on a received input signal, and subtracts it from the transmitted input to cancel the echo. There is.
[発明が解決しようとする課題]
第2図に示すように、二線四線変換器90では二線入出
力端子1に入力された信号を送信出力端子2に伝え、受
信入力端子3に入力された信号を完全に二線入出力端子
1に伝え送信出力端子21;まわり込むものがなければ
、エコー制御装置100は必要なくなる。[Problems to be Solved by the Invention] As shown in FIG. 2, in the two-wire/four-wire converter 90, a signal input to the two-wire input/output terminal 1 is transmitted to the transmission output terminal 2, and is input to the reception input terminal 3. If the transmitted signal is completely transmitted to the two-wire input/output terminal 1 and there is nothing that goes around to the transmission output terminal 21, the echo control device 100 is no longer necessary.
しかし、実際には変換部のインピーダンス整合は充分と
れない場合が多く、受信入力端子3に入力された信号が
送信出力端子2にまわり込んでしまうという欠点がある
。However, in reality, the impedance matching of the converting section is often insufficient, and there is a drawback that the signal input to the receiving input terminal 3 goes around to the transmitting output terminal 2.
このような欠点を解決するものとして、エコーサプレッ
サがある。しかし、エコーサプレッサは02号路の切断
を行なっているため、トギレや話頭、語尾切断が発生す
るという欠点がある。Echo suppressors are available as a solution to these drawbacks. However, since the echo suppressor cuts Route 02, it has the drawback of causing jerks and truncations at the beginning and end of speech.
本発明の目的は従来のもののこのような欠点を除去し、
信号路の切断を行なうことなく、従ってトギレや話頭、
語尾切断が発生しないエコー制御装置を提供することに
ある。The purpose of the present invention is to eliminate these drawbacks of the conventional ones,
Without cutting the signal path, there are
An object of the present invention is to provide an echo control device that does not cause word endings to be cut off.
[課題を解決するための手段]
本発明によれば、n個の連続時間の送信入力信号を保持
する第1のn段のシフトレジスタと、エコーパスの伝達
関数の逆特性を保持する第2のn段のシフトレジスタと
、最新の送信人力信号と前記第1のシフトレジスタの出
力を切り替え、該第1のシフトレジスタに入力する第1
の切り替え器と、前記第1のシフトレジスタの出力と第
2のシフトレジスタの出力を掛ける第1の乗算器と、該
第1の乗算器の出力をn個累積加算する累算器と、受信
入力信号を保持する第3の0段シフトレジスタと、前記
累算器の出力から前記第3のシフトレジスタの出力を引
き送信出力信号とする減算器と、送信入力信号の最新の
n個の2乗和を計算する第1の電力計算部と、該第1の
電力計算部の出力の逆数を求める逆数演算器と、前記減
算器の出力と逆数演算器の出力を掛ける第2の乗算器と
、該第2の乗算器の出力と零信号を切り替える第2の切
り替え器と、該第2の切り替え器の出力と前記第1のシ
フトレジスタの出力を掛ける第3の乗算器と、該第3の
乗算器の出力に前記第1の乗算器の出力を加える加算器
と、受信入力信号の最新のn個の2乗和を計算する第2
の電力計算部と、送信出力信号の最新のn個の2乗和を
計算する第3の電力計算部と、該第2及び第3の電力計
算部の出力を比較して第3の電力計算部の出力の方が大
きいとき前記第2の切替器を零信号に切り替える比較器
を含むことを特徴とするエコー制御装置が得られる。[Means for Solving the Problems] According to the present invention, there is provided a first n-stage shift register that holds n continuous time transmission input signals, and a second shift register that holds inverse characteristics of the transfer function of the echo path. an n-stage shift register; a first input signal that switches between the latest transmission human input signal and the output of the first shift register;
a first multiplier that multiplies the output of the first shift register and the output of the second shift register; an accumulator that cumulatively adds n outputs of the first multiplier; a third 0-stage shift register that holds the input signal; a subtracter that subtracts the output of the third shift register from the output of the accumulator to obtain a transmission output signal; a first power calculation unit that calculates a multiplicative sum; a reciprocal calculation unit that calculates the reciprocal of the output of the first power calculation unit; and a second multiplier that multiplies the output of the subtracter and the output of the reciprocal calculation unit. , a second switch that switches between the output of the second multiplier and a zero signal, a third multiplier that multiplies the output of the second switch and the output of the first shift register, and the third multiplier. an adder that adds the output of the first multiplier to the output of the multiplier of
a third power calculation unit that calculates the sum of squares of the latest n pieces of the transmission output signal, and a third power calculation unit that compares the outputs of the second and third power calculation units. There is obtained an echo control device characterized in that it includes a comparator that switches the second switch to a zero signal when the output of the second switch is larger.
〔実施例] 次に本発明について図面を参照して説明する。〔Example] Next, the present invention will be explained with reference to the drawings.
第1図は本発明の一実施例のブロック図、第2図はその
動作を説明するための本発明の原理的構成図を示す。FIG. 1 is a block diagram of an embodiment of the present invention, and FIG. 2 is a diagram showing the basic configuration of the present invention for explaining its operation.
第1図において、20はn個の連続時間の送信入力信号
を保持する第1のn段のシフトレジスタ、21はエコー
パスの伝達関数の逆特性を保持する第2のn段のシフト
レジスタ、10は最新の送信人力信号と第1のシフトレ
ジスタ20の出力を切り替え、第1のシフトレジスタ2
0に入力する第1の切り替え器、40は第1のシフトレ
ジスタ20の出力と第2のシフトレジスタ21の出力を
掛ける第1の乗算器、30は第1の乗算器4oの出力を
n個累積加算する累算器、22は受信入力信号を保持す
る第3のn段シフトレジスタ、51は累算器30の出力
から第3のシフトレジスタ22の出力を引き送信出力信
号とする減算器、72は送信入力信号の最新のn個の2
乗和を計算する第1の電力計算部、60は第1の電力計
算部72の出力の逆数を求める逆数演算器、42は減算
器51の出力と逆数演算器60の出力を掛ける第2の乗
算器、11は第2の乗算器42の出力と零信号を切り替
える第2の切り替え器、41は第2の切り替え器11の
出力と前記第1のシフトレジスタ20の出力を掛ける第
3の乗算器、50は第3の乗算器41の出力に第1の乗
算器40の出力を加える加算器、71は受信入力信号の
最新のn個の2乗和を計算する第2の電力計算部、70
は送信出力信号の最新のn個の2乗和を計算する第3の
電力計算部、80は第2及び第3の電力計算部の出力を
比較して、第3の電力計算部の出力の方が大きいとき、
第2の切替器を零信号に切り替える比較器である。In FIG. 1, 20 is a first n-stage shift register that holds n continuous time transmission input signals, 21 is a second n-stage shift register that holds the inverse characteristic of the transfer function of the echo path, and 10 switches the latest transmitted human input signal and the output of the first shift register 20, and switches the output of the first shift register 20.
40 is a first multiplier that multiplies the output of the first shift register 20 and the output of the second shift register 21; 30 multiplies the output of the first multiplier 4o by n times; an accumulator that performs cumulative addition; 22 is a third n-stage shift register that holds the received input signal; 51 is a subtracter that subtracts the output of the third shift register 22 from the output of the accumulator 30 to obtain a transmission output signal; 72 is the latest n number 2 of the transmission input signal
60 is a reciprocal calculator that calculates the reciprocal of the output of the first power calculator 72; 42 is a second power calculator that multiplies the output of the subtracter 51 and the output of the reciprocal calculator 60; a multiplier; 11 is a second switch that switches between the output of the second multiplier 42 and a zero signal; 41 is a third multiplier that multiplies the output of the second switch 11 and the output of the first shift register 20; 50 is an adder that adds the output of the first multiplier 40 to the output of the third multiplier 41; 71 is a second power calculation unit that calculates the sum of squares of the latest n received input signals; 70
80 is a third power calculation unit that calculates the latest sum of squares of n transmission output signals, and 80 compares the outputs of the second and third power calculation units to calculate the output of the third power calculation unit. When the larger
This is a comparator that switches the second switch to a zero signal.
第2図において二線四線変換器のまわり込みは線形変換
であるから、まわり込み信号y (z)は以下のように
あられされる。In FIG. 2, the wrap-around of the two-wire/four-wire converter is a linear conversion, so the wrap-around signal y (z) is expressed as follows.
Y (Z) −−−I((Z) −X (Z)
(1)まわり込み信号はアダプティブ・フ
ィルタ110で擬似受信信号父(Z)となる。Y (Z) ---I((Z) -X (Z)
(1) The wrap-around signal becomes a pseudo reception signal (Z) in the adaptive filter 110.
父(Z) −G (Z) −Y (Z)
(2)従って残差信号E (Z)は
E (Z)−父(Z) −Z” X(Z)
(3)−に(Z) −H(Z) X(Z) −Z”
X(Z) (4)となる。E(Z)−0となるには、
”go +g−、z−++・・・ (
5)弁Σ g+ 2’
と近似する事により、アダプティブ・フィルタは有限次
数インパルス応答となる。Father (Z) -G (Z) -Y (Z)
(2) Therefore, the residual signal E (Z) is E (Z) - Father (Z) - Z" X (Z)
(3) −(Z) −H(Z) X(Z) −Z”
It becomes X(Z) (4). To obtain E(Z)-0, ``go +g-, z-++... (
5) By approximating the valve Σ g+ 2', the adaptive filter becomes a finite-order impulse response.
第1図より、n段のシフトレジスタ20にはy(1)、
・・・y (1−n+1)のn個の送信信号が蓄えられ
、シフトレジスタ21に、エコー径路のインパルス応答
の逆特性G (Z)が蓄えられ、乗算器40と累算器3
0にてY (1)とg(1)がたたみ込まれて、
父(1)−Σ g (1) ・ y (1−j)
(7)」+0
となる。(7)式で求まった擬似受信信号からシフトレ
ジスタ22でn段遅れた受信信号を引くことで、エコー
は抑圧される。From FIG. 1, the n-stage shift register 20 has y(1),
...y (1-n+1) n transmission signals are stored, the inverse characteristic G (Z) of the impulse response of the echo path is stored in the shift register 21, and the multiplier 40 and the accumulator 3
Y (1) and g (1) are convolved at 0, and father (1) - Σ g (1) ・ y (1 - j)
(7)”+0. The echo is suppressed by subtracting the received signal delayed by n stages in the shift register 22 from the pseudo received signal determined by equation (7).
e (i) = ’2 (i)−χ(i−++)
(8)減算器51の出力は電力計算部72、
逆数演算器60を経た送信入力のパワーで乗算器42で
除算されて、シフトレジスタ21の内容は次のように修
正される。e (i) = '2 (i) - χ (i - ++)
(8) The output of the subtracter 51 is the power calculation unit 72,
The multiplier 42 divides the power of the transmission input that has passed through the reciprocal calculator 60, and the contents of the shift register 21 are modified as follows.
g (D −g (D+ “°e(i) °Y(トハ
(j −0・・・n ) (9)また
、シフトレジスタ21の内容は受信入力にのみ信号があ
る時にのみ更新すればよいので、受信人力レベルと送信
出力レベルを電力計算部70゜71で計算して、ダブル
トークを比較器8oで検出して、修正の停止を制御して
いる。g (D −g (D+ “°e(i) °Y(toha(j −0...n)) (9) Also, the contents of the shift register 21 only need to be updated when there is a signal at the receiving input. Therefore, the receiving power level and the transmitting output level are calculated by the power calculation units 70 and 71, double talk is detected by the comparator 8o, and the stop of correction is controlled.
[考案の効果]
以上説明したように本発明では、まわり込み信号のみを
消去することにより、エコーサプレッサのような信号路
の切断は行なわないため、トギレや話頭・語尾切断は発
生しないという効果がある。[Effects of the invention] As explained above, the present invention eliminates only the wrap-around signals and does not cut the signal path like an echo suppressor, so it has the effect of not causing jitter or cutting at the beginning or end of a speech. be.
41.42:乗算器、50,51:加算器、60:逆数
演算器、70,71.72:電力計算部、80:比較器
、90:二線四線変換器、100:エコー制御装置、1
10:適応フィルタ。41.42: Multiplier, 50, 51: Adder, 60: Reciprocal calculator, 70, 71.72: Power calculation unit, 80: Comparator, 90: Two-wire four-wire converter, 100: Echo control device, 1
10: Adaptive filter.
第1図は本発明の一実施例を示す、ブロック図、第2図
は本発明の原理図を示す。FIG. 1 is a block diagram showing an embodiment of the present invention, and FIG. 2 is a diagram showing the principle of the present invention.
Claims (1)
段のシフトレジスタと、エコーパスの伝達関数の逆特性
を保持する第2のn段のシフトレジスタと、最新の送信
入力信号と前記第1のシフトレジスタの出力を切り替え
、該第1のシフトレジスタに入力する第1の切り替え器
と、前記第1のシフトレジスタの出力と第2のシフトレ
ジスタの出力を掛ける第1の乗算器と、該第1の乗算器
の出力をn個累積加算する累算器と、受信入力信号を保
持する第3のn段シフトレジスタと、前記累算器の出力
から前記第3のシフトレジスタの出力を引き送信出力信
号とする減算器と、送信入力信号の最新のn個の2乗和
を計算する第1の電力計算部と、該第1の電力計算部の
出力の逆数を求める逆数演算器と、前記減算器の出力と
逆数演算器の出力を掛ける第2の乗算器と、該第2の乗
算器の出力と零信号を切り替える第2の切り替え器と、
該第2の切り替え器の出力と前記第1のシフトレジスタ
の出力を掛ける第3の乗算器と、該第3の乗算器の出力
に前記第1の乗算器の出力を加える加算器と、受信入力
信号の最新のn個の2乗和を計算する第2の電力計算部
と、送信出力信号の最新のn個の2乗和を計算する第3
の電力計算部と、該第2及び第3の電力計算部の出力を
比較して第3の電力計算部の出力の方が大きいとき前記
第2の切替器を零信号に切り替える比較器を含むことを
特徴とするエコー制御装置。1, a first n holding n continuous time transmit input signals
a second n-stage shift register that maintains an inverse characteristic of the transfer function of the echo path; and switching the latest transmission input signal and the output of the first shift register to the first shift register. a first switch for input; a first multiplier that multiplies the output of the first shift register and the output of the second shift register; and an accumulation that cumulatively adds n outputs of the first multiplier. a third n-stage shift register for holding the received input signal; a subtracter for subtracting the output of the third shift register from the output of the accumulator to obtain a transmission output signal; a first power calculation unit that calculates the sum of squares of n pieces; a reciprocal calculation unit that calculates the reciprocal of the output of the first power calculation unit; and a second power calculation unit that multiplies the output of the subtracter and the output of the reciprocal calculation unit. a multiplier; a second switch that switches between the output of the second multiplier and a zero signal;
a third multiplier that multiplies the output of the second switch by the output of the first shift register; an adder that adds the output of the first multiplier to the output of the third multiplier; a second power calculation unit that calculates the latest n sums of squares of the input signals; and a third power calculation unit that calculates the latest n sums of squares of the transmitted output signals.
and a comparator that compares the outputs of the second and third power calculation units and switches the second switch to a zero signal when the output of the third power calculation unit is larger. An echo control device characterized by:
Priority Applications (1)
Application Number | Priority Date | Filing Date | Title |
---|---|---|---|
JP21355388A JPH0263225A (en) | 1988-08-30 | 1988-08-30 | Echo controller |
Applications Claiming Priority (1)
Application Number | Priority Date | Filing Date | Title |
---|---|---|---|
JP21355388A JPH0263225A (en) | 1988-08-30 | 1988-08-30 | Echo controller |
Publications (1)
Publication Number | Publication Date |
---|---|
JPH0263225A true JPH0263225A (en) | 1990-03-02 |
Family
ID=16641111
Family Applications (1)
Application Number | Title | Priority Date | Filing Date |
---|---|---|---|
JP21355388A Pending JPH0263225A (en) | 1988-08-30 | 1988-08-30 | Echo controller |
Country Status (1)
Country | Link |
---|---|
JP (1) | JPH0263225A (en) |
-
1988
- 1988-08-30 JP JP21355388A patent/JPH0263225A/en active Pending
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