JPH0261891A - Dynamic memory circuit - Google Patents

Abstract

PURPOSE:To absorb fluctuation in the capacitance value of a storage cell capacitor and dispersion in the dielectric strength of a capacitor insulation film by enabling a voltage to be applied on the counter electrode of the capacitor to be selected after manufacturing a memory circuit. CONSTITUTION:Output from plural counter electrode potential generation circuits 9 are connected to the counter electrode of the capacitor 9 in a memory cell 4 via fuses 10. After the memory circuit is manufactured, the optimum potential out of the plural counter electrode output is decided after confirming an element characteristic, and the remaining fuses except for the fuse 10 connected to a circuit to generate the optimum potential are fused. In such a way, it is possible to absorb the fluctuation in the capacitance value of the storage cell capacitor due to the dispersion in manufacturing and the dispersion in the dielectric strength of the capacitor insulation film.

Description

[Detailed Description of the Invention] [Field of Industrial Application] The present invention relates to a dynamic memory circuit, and in particular to a memory in which a voltage applied to an electrode facing a semiconductor substrate of a capacitor for storing information can be selected. Regarding circuits.

[Prior Art] A typical conventional dynamic memory cell is composed of one transistor used for reading and writing and one capacitor for storing information. A conventional example of this type of memory circuit is shown in FIG. As shown in the figure, the memory cell 4 is composed of a MOS transistor and a capacitor 8, the transistor is connected to a word line 5 and a bit line 6, and a MOS transistor of a capacitor 8 The electrode (hereinafter referred to as the counter electrode) opposite to the one pole on the side connected to
It is fixed at a constant potential such as /2 power supply voltage.

[Problems to be Solved by the Invention] A constant potential supplied to or through the memory circuit is supplied to the opposing electrode of the capacitor which is the storage element of the conventional dynamic memory circuit described above. Therefore, it is not configured to be able to cope with fluctuations in the capacitance value of the capacitor and a decrease in its reliability caused by manufacturing variations in the memory circuit. In dynamic memory circuits, as the capacity of memory increases, the configuration of the capacitor that is the storage element has changed in various ways, such as the Brenna type, stack type, and trench type. In order to improve the noise resistance of the readout signal amount and to prevent soft errors caused by alpha rays, it is necessary to maintain the capacitance value of the capacitor above a certain level.

Therefore, in order to meet this demand, it is necessary to make the dielectric film that constitutes the capacitor thinner.On the other hand, there is a demand for larger memory capacity, and in order to meet this demand, microfabrication and capacitor Miniaturization is required. Due to this thinning and microfabrication processing technology, variations in capacitor breakdown voltage and capacitance become noticeable, and as a result, it is difficult to simply supply a predetermined -potential to the capacitor counter electrode.
It has become difficult to realize memory circuits that are highly reliable and resistant to soft errors. In other words, if a high voltage is applied between the electrodes of a capacitor, there is a risk that the parts with low withstand voltage will be destroyed due to large manufacturing variations in the dielectric film, and if a voltage is used that reduces the capacitance value. In this case, there is a possibility of malfunction occurring due to soft errors or lack of signal charge.

The present invention has been made to address this problem, and its purpose is to make it possible to select the voltage to be applied to the opposing electrode of the capacitor after manufacturing the memory circuit, thereby eliminating manufacturing variations. The aim is to increase the capacitance value within the range of the capacitor's withstand voltage.

[Means for Solving the Problems] The dynamic memory circuit of the present invention has a plurality of counter electrode potential generation circuits capable of generating different voltages, and selects one of them according to manufacturing variations of memory cells. The optimum potential generation circuit is selected and the potential can be supplied to the opposite electrode of the capacitor.

[Example] Next, an example of the present invention will be described with reference to the drawings.

FIG. 1 is a block diagram of a capacitor type memory circuit which is an embodiment of the present invention. In the figure, 1 is a memory cell matrix consisting of a plurality of memory cells 4, 2 is a memory cell peripheral circuit, and 3 is a memory cell input/output circuit. Within the memory cell 4, the same number as in FIG. Items with ``mark'' mean the same thing. This circuit further includes a plurality of counter electrode potential generation circuits 9, and the outputs of the plurality of counter electrode potential generation circuits 9 are connected to the counter electrodes of the memory cells via fuses 10.

After manufacturing the memory circuit, check the characteristics of the manufactured element, determine the potential that is considered to be optimal among the multiple opposing @pole potential outputs, and select only the fuse 10 that is connected to the circuit that generates the optimal potential. , and blow out the remaining fuses. This selected potential is commonly used for all memory cells. This process is performed using large capacity memory I.
C is easily implemented using redundancy techniques that are implemented as standard processes.

FIG. 2 is a block diagram of another embodiment of the invention. In this embodiment, a series-connected diode 11 is used in place of the fuse used in the previous embodiment.

Once the potential generating circuit to be used is determined, the diode connected to that circuit is destroyed, and only that circuit is connected to the opposing electrode of the capacitor.

In the above embodiments, a one-element type memory cell has been described, but the present invention can also be applied to other types of memory cells, such as a three-element type.

[Effects of the Invention] As explained above, the present invention provides a plurality of counter electrode potential generation circuits in advance together with a plurality of memory cells, and selectively connects the outputs of the plurality of counter electrode potential generation circuits with a fuse or the like. By connecting to the capacitor counter electrode of a capacitor type memory circuit through a connecting means, and making it possible to arbitrarily select and supply the optimal counter electrode potential after the memory circuit is manufactured, microfabrication technology can be used. It is possible to absorb variations in the capacitance value of the storage element capacitor and variations in the withstand voltage of the capacitor insulating film caused by manufacturing variations. Therefore, according to the present invention, it is possible to realize a memory cell having a high insulating film breakdown voltage, excellent soft error resistance, and a wide noise margin in a capacitor type memory circuit whose capacity has been increased.

G line, 9... Counter electrode potential generation circuit.

Claims (1)

[Scope of Claims] A plurality of word lines, a plurality of bit lines intersecting with the plurality of word lines, a MOS transistor connected to each intersection of the plurality of word lines and the plurality of bit lines, and a MOS transistor connected to each intersection of the plurality of word lines and the plurality of bit lines; A dynamic memory circuit comprising: a capacitor having an electrode connected to a transistor and a counter electrode facing the electrode; A dynamic memory circuit, characterized in that one circuit can be selected and connected to a counter electrode of the capacitor.