JPH0261047B2 - - Google Patents
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- Publication number
- JPH0261047B2 JPH0261047B2 JP58044871A JP4487183A JPH0261047B2 JP H0261047 B2 JPH0261047 B2 JP H0261047B2 JP 58044871 A JP58044871 A JP 58044871A JP 4487183 A JP4487183 A JP 4487183A JP H0261047 B2 JPH0261047 B2 JP H0261047B2
- Authority
- JP
- Japan
- Prior art keywords
- power supply
- output
- voltage
- current
- output current
- Prior art date
- Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
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- 238000001514 detection method Methods 0.000 claims description 27
- 238000000034 method Methods 0.000 claims description 14
- 238000010586 diagram Methods 0.000 description 6
- 230000007423 decrease Effects 0.000 description 2
- 102220083971 rs34543395 Human genes 0.000 description 2
- 102220058910 rs786201402 Human genes 0.000 description 2
- 238000012935 Averaging Methods 0.000 description 1
- 239000012141 concentrate Substances 0.000 description 1
- 230000000694 effects Effects 0.000 description 1
- 238000012423 maintenance Methods 0.000 description 1
- 238000004519 manufacturing process Methods 0.000 description 1
- 102220007331 rs111033633 Human genes 0.000 description 1
- 102220008337 rs1437698471 Human genes 0.000 description 1
- 239000007787 solid Substances 0.000 description 1
Classifications
-
- G—PHYSICS
- G05—CONTROLLING; REGULATING
- G05F—SYSTEMS FOR REGULATING ELECTRIC OR MAGNETIC VARIABLES
- G05F1/00—Automatic systems in which deviations of an electric quantity from one or more predetermined values are detected at the output of the system and fed back to a device within the system to restore the detected quantity to its predetermined value or values, i.e. retroactive systems
- G05F1/10—Regulating voltage or current
- G05F1/46—Regulating voltage or current wherein the variable actually regulated by the final control device is dc
- G05F1/56—Regulating voltage or current wherein the variable actually regulated by the final control device is dc using semiconductor devices in series with the load as final control devices
- G05F1/59—Regulating voltage or current wherein the variable actually regulated by the final control device is dc using semiconductor devices in series with the load as final control devices including plural semiconductor devices as final control devices for a single load
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- Engineering & Computer Science (AREA)
- Physics & Mathematics (AREA)
- Electromagnetism (AREA)
- General Physics & Mathematics (AREA)
- Radar, Positioning & Navigation (AREA)
- Automation & Control Theory (AREA)
- Direct Current Feeding And Distribution (AREA)
- Continuous-Control Power Sources That Use Transistors (AREA)
Description
【発明の詳細な説明】
本発明は、一般に工業用として、例えば制御用
マイクロコンピユータ用などとして用いられる安
定化電源の並列運転方式に関するものである。DETAILED DESCRIPTION OF THE INVENTION The present invention relates to a parallel operation system for stabilized power supplies generally used for industrial purposes, for example, for control microcomputers.
一般に、電源装置を複数台並列に接続して電源
システムとして用いることの目的としては、第1
の電源供給の信頼性を高めること、そして第2に
電源容量の増大を図ること、の二つを挙げること
ができる。 Generally, the purpose of connecting multiple power supplies in parallel and using them as a power supply system is to
There are two ways to improve the reliability of the power supply, and second, to increase the power supply capacity.
第1図はダイオードつき合わせ方式と称される
従来の電源システムの一例を示したブロツク図で
ある。 FIG. 1 is a block diagram showing an example of a conventional power supply system called a diode matching system.
同図において、電源1,電源2は、並列運転を
行なわんとする電源装置である。D1,D2は、
出力つき合わせ用ダイオードであり、電源運転
中、二つの電源間での出力電圧の誤差により、出
力電圧の高い方の電源から出力電流が、出力電圧
の低い方の電源へ流れ込むのを防ぐためのもので
ある。 In the figure, power supply 1 and power supply 2 are power supply devices that are intended to operate in parallel. D1 and D2 are
This is an output matching diode that prevents the output current from flowing from the power supply with a higher output voltage to the power supply with a lower output voltage due to an error in the output voltage between the two power supplies during power supply operation. It is something.
このように2台の電源が並列運転している場
合、出力電圧の高い方の電源が、ほぼ100%の負
荷電流を供給することになる。この状態で出力電
圧の低い方の電源がダウンすると、出力電圧の高
い方の電源が依然として負荷に電源の供給を続
け、負荷先側への影響はない。一方、出力電圧の
高い方の電源がダウンすると、出力電圧の低い方
の電源が、あらたに負荷に電源を供給し始めるの
で、この場合も負荷側はダウンしい。 When two power supplies are operated in parallel like this, the power supply with the higher output voltage will supply almost 100% of the load current. If the power supply with the lower output voltage goes down in this state, the power supply with the higher output voltage continues to supply power to the load, and there is no effect on the load destination side. On the other hand, if the power supply with a higher output voltage goes down, the power supply with a lower output voltage starts supplying power to the load again, so the load side is likely to go down in this case as well.
このように、ダイオードつき合わせ方式による
電源の並列運転は、必要な部品点数が少なく簡便
であるが、以下に示す欠点がある。 In this way, the parallel operation of power supplies using the diode matching method requires fewer parts and is simple, but it has the following drawbacks.
(1) 並列運転している電源間の出力電圧誤差が零
になることは実際問題としてあり得ないため、
両電源間の負荷バランスをとることが困難であ
り、負荷電流が一方の電源に集中してしまう。
従つて、負荷電流が集中した側の電源の温度上
昇が大となり、この電源単体ひいては電源シス
テムとしての信頼性が低下する。電源システム
としての信頼性が負荷電流の集中した側の電源
により支配されるため、並列運転する電源の台
数を増加しても信頼性の改善に結びつかない。(1) In practice, it is impossible for the output voltage error between power supplies operating in parallel to become zero, so
It is difficult to balance the load between the two power supplies, and the load current concentrates on one power supply.
Therefore, the temperature of the power supply on the side where the load current is concentrated increases, and the reliability of the power supply alone and as a result of the power supply system decreases. Since reliability as a power supply system is dominated by the power supply on the side where the load current is concentrated, increasing the number of power supplies operating in parallel does not lead to improvement in reliability.
(2) 並列運転を出力容量の増大を目的として行う
場合、負荷バランスが悪いため、片方の電源に
負荷電流が集中する関係で、電源を構成するト
ランジスタの容量も大きくしなければならず、
出力電圧対負荷電流の関係がフの字特性となる
過電流保護方式を採用してトランジスタ容量の
低減を図ろうとしても、それができない。(2) When performing parallel operation for the purpose of increasing output capacity, the load balance is poor, and the load current is concentrated on one power supply, so the capacity of the transistors that make up the power supply must also be increased.
Even if an attempt is made to reduce the transistor capacitance by adopting an overcurrent protection method in which the relationship between output voltage and load current has a fold-back characteristic, it is not possible.
(3) 負荷バンスが悪いため、出力電圧の高い方の
電源がダウンし、もう一方の電源に切り換わる
際、出力電圧に大きなデイツプを生じる場合が
ある。(3) Due to poor load bounce, when the power supply with the higher output voltage goes down and switches to the other power supply, a large dip may occur in the output voltage.
(4) つき合わせ用ダイオードD1,D2の特性に
より、出力電圧が負荷電流、周囲温度等により
変動し、出力電圧を高精度に一定に保つことが
困難である。(4) Due to the characteristics of the matching diodes D1 and D2, the output voltage fluctuates depending on the load current, ambient temperature, etc., and it is difficult to keep the output voltage constant with high precision.
(5) 負荷電流が大きな場合、つき合わせ用ダイオ
ードD1,D2における電力損失が大きくな
り、効率が低下する。(5) When the load current is large, the power loss in the matching diodes D1 and D2 becomes large, and the efficiency decreases.
第2図はマスタ・スレーブ方式と称される従来
の電源システムを示した回路図である。 FIG. 2 is a circuit diagram showing a conventional power supply system called a master-slave system.
同図において、Mはマスタ型の電源装置、Sは
スレーブ型の電源装置、Tr1,Tr2は出力電圧制
御用トランジスタ、A1,A2は誤差増幅器、
ZD1は基準電圧用ツエナーダイオード、R14,
R24は出力電領流検出用抵抗である。 In the figure, M is a master type power supply device, S is a slave type power supply device, Tr 1 and Tr 2 are output voltage control transistors, A1 and A2 are error amplifiers,
ZD1 is a Zener diode for reference voltage, R14,
R24 is an output current detection resistor.
マスタ電源Mは通常の安定化電源であり、誤差
増幅器A1の―入力側電圧(Vc=R13・EO/R12+R13)
と+入力側電圧(基準電圧となるツエナー電圧
VZD1)とが等しくなるように該誤差増幅器A1の
出力によりトランジスタTr1の導通を制御し、出
力電圧EOを一定に維持している。 The master power supply M is a normal stabilized power supply, and the - input side voltage (Vc = R13・EO/R12+R13) and the + input side voltage (Zener voltage, which is the reference voltage) of the error amplifier A1.
The conduction of the transistor Tr 1 is controlled by the output of the error amplifier A1 so that the output voltage EO becomes equal to V ZD1 ), and the output voltage EO is maintained constant.
一方、スレーブ電源Sにおいては、誤差動増幅
器A2の+側入力電圧(b点電圧)が一側入力電
圧(a点電圧)と等しくなるように、該誤差増幅
器A2の出力によりトランジスタTr2の導通を制
御し、出力電圧EO一定化を図つている。従つて
マスタ電源Mから負荷へ供給される電流をi1、ス
レーブ電源Sから負荷へ供給される電流をi2とす
ると、a点電圧とb点電圧が等しいという条件か
ら次の式が成立する。 On the other hand, in the slave power supply S, the transistor Tr 2 is turned on by the output of the error amplifier A2 so that the positive input voltage (voltage at point b) of the error dynamic amplifier A2 becomes equal to the input voltage on one side (voltage at point a). is controlled to keep the output voltage EO constant. Therefore, if the current supplied from the master power supply M to the load is i1, and the current supplied from the slave power supply S to the load is i2, then the following equation holds true under the condition that the voltage at point a and the voltage at point b are equal.
i2・R24=i1・R14
ここでR24=R14とすると
i2=i1
すなわち、マスタ電源Mとスレーブ電源Sから
それぞれ負荷に供給される電流は等しくなる。従
つて、第1図を参照して説明したダイオードつき
合せ方式の欠点や、マスタ・スレーブ方式では、
一部を除いてほとんど解消されている。しかし、
マスタ・スレーブ方式では新たにつぎのような欠
点が生じる。 i2·R24=i1·R14 Here, if R24=R14, i2=i1 That is, the currents supplied to the load from the master power supply M and the slave power supply S are equal. Therefore, the disadvantages of the diode matching method explained with reference to FIG. 1 and the master-slave method,
Most of the problems have been resolved except for a few. but,
The master-slave system has the following new drawbacks.
(1) スレーブ電源がダウンした場合には、他のス
レーブおよびマスタの電源によりバツクアツプ
されるが、マスタ電源がダウンした場合には、
スレーブ電源も共にダウンしてしまう。そのた
め、並列運転している電源全体の信頼性がマス
タ電源によつて支配されてしまう。従つて、こ
の方式では、スレーブ電源を増やすことによ
り、出力容量の増大は可能であるが、信頼性の
向上は期待できない。(1) If the slave power supply goes down, it will be backed up by the power supplies of other slaves and the master, but if the master power supply goes down,
The slave power supply also goes down. Therefore, the reliability of the entire power supplies operating in parallel is dominated by the master power supply. Therefore, in this method, although it is possible to increase the output capacity by increasing the number of slave power supplies, it is not possible to expect an improvement in reliability.
(2) マスタ電源とスレーブ電源で回路構成が異な
るため、両者の回路構成が同じ場合に比し、量
産化、それに伴なうコスト低減、保守管理の容
易性等が図り難い。(2) Since the master power supply and the slave power supply have different circuit configurations, it is difficult to achieve mass production, the associated cost reduction, and ease of maintenance management, compared to when both circuit configurations are the same.
この発明は、上述の客欠点をすべて除去し、特
に異つた出力容量の電源装置の組合せにおいて
も、その出力容量に比例した出力電流の配分を行
わせつつ、電源システムとしての総出力容量の増
大、および信頼性の向上が達成可能な安定化電源
の並列運転方式を提供することを目的とする。 This invention eliminates all of the above-mentioned drawbacks, and increases the total output capacity of the power supply system while distributing the output current proportional to the output capacity even when power supplies with different output capacities are combined. The object of the present invention is to provide a parallel operation method for stabilized power supplies that can achieve improved reliability.
本発明の構成の第1の要点は、或る基準電圧と
電源回路の出力電圧とを比較し、両者間の誤差電
圧を検出して電流設定値として出力する誤差電圧
検出手段と、分圧比の配分比が当該の安定化電源
の出力容量の配分比に等しくなるように、前記電
流設定値を分圧し出力電流設定値として出力する
分圧手段と、当該の安定化電源の出力電流を検出
する出力電流検出手段と、該出力電流検出手段に
おける検出電圧が前記出力電流設定値に等しくな
るように電源回路の出力電流を調節する電流調節
手段とを有して成る安定化電源を複数個並列に接
続し、各安定化電源における誤差電圧検出手段の
出力側を共通母線で接続し、各安定化電源に対し
出力容量に比例した出力電流の配分を行つた点に
ある。また、第2の要点は、電流設定値を安定化
電源の出力容量に応じて分圧するかわりに、各安
定化電流の出力電流検出手段の検出電圧を出力容
量に対応した出力電流において等しくなるように
した点にある。 The first main point of the configuration of the present invention is that it includes an error voltage detection means that compares a certain reference voltage and the output voltage of a power supply circuit, detects an error voltage between the two, and outputs it as a current setting value; voltage dividing means for dividing the current set value and outputting it as an output current set value so that the distribution ratio is equal to the distribution ratio of the output capacity of the stabilized power source; and detecting the output current of the stabilized power source. A plurality of stabilized power supplies are connected in parallel, each comprising an output current detection means and a current adjustment means for adjusting the output current of the power supply circuit so that the detected voltage in the output current detection means becomes equal to the output current setting value. The output side of the error voltage detection means in each stabilized power supply is connected by a common bus line, and the output current is distributed to each stabilized power supply in proportion to the output capacity. The second point is that instead of dividing the current setting value according to the output capacity of the stabilized power supply, the detection voltage of the output current detection means for each stabilized current is made equal at the output current corresponding to the output capacity. It is in the point that I made it.
次に図を参照して本発明を説明する。 Next, the present invention will be explained with reference to the drawings.
第3図は本発明の基礎原理および後述の他の実
施例を示す回路図であり、これによりまず各電源
の出力容量が等しい場合を説明する。同図におい
て、電源1,電源2…電源Nは、いずれも同一構
成の安定化電源であり、この場合、N台の電源の
並列運転方式が示されている。そして各電源は、
おのおのの+出力,−出力が共通接続されると共
に共通母線Bによつて図示の如く結合されてい
る。電源1におけるTr1は出力電流i1を操作
し、出力電圧EOを制御する出力電圧制御用トラ
ンジスタ、11は電流調節用増幅器、A12は、
ボルテージ・フオロア(一種のインピーダンス変
換器)、A13は電圧誤差増幅器、R11は電流
設定値混合用抵抗、R15は出力電流検出用抵
抗、ZD1は基準電圧用ツエナーダイオードであ
る。 FIG. 3 is a circuit diagram showing the basic principle of the present invention and other embodiments to be described later. First, a case in which the output capacities of the power supplies are equal will be explained. In the figure, power supply 1, power supply 2, . . . power supply N are all stabilized power supplies having the same configuration, and in this case, a parallel operation system of N power supplies is shown. And each power supply is
The respective + and - outputs are commonly connected and coupled by a common bus line B as shown. Tr 1 in the power supply 1 is an output voltage control transistor that operates the output current i1 and controls the output voltage EO, 11 is a current adjustment amplifier, and A12 is
A voltage follower (a type of impedance converter), A13 is a voltage error amplifier, R11 is a current setting value mixing resistor, R15 is a resistor for output current detection, and ZD1 is a Zener diode for reference voltage.
なお、電源2〜電源Nについては、電源1と同
じ構成であるため、特に説明しない。ただし、電
流調節用増幅器A11の入力インピーダンスが電
流設定値混合用抵抗R11に比較して十分大の場
合、ボルテージ・フオロアA12は不要である。 Note that the power supplies 2 to N have the same configuration as the power supply 1, and therefore will not be particularly described. However, if the input impedance of the current adjustment amplifier A11 is sufficiently large compared to the current setting value mixing resistor R11, the voltage follower A12 is unnecessary.
まず、本方式で用いる電源を単体(電源1の
み)で運転した時の動作を考えると、その出力電
圧EOは、第2図を参照して先に説明したのと同
様にして次の式で表わせる。 First, considering the operation when the power supply used in this method is operated alone (power supply 1 only), its output voltage EO can be calculated using the following formula in the same way as explained earlier with reference to Figure 2. Express.
EO=R13+R14/R14・VZD1
(但しVZD1はダイオードZD1のツエナー電圧)
もし、出力電圧がこの値からずれると、電圧誤
差増幅器A13から電圧誤差に見合つた出力電圧
Vi1が、出力点の電流設定値として、抵抗R1
1、ボルテージ・フオロアA12を介し電流調節
用増幅器A11に入力点の電流設定値Vis1として
入力される。電流調節用増幅器A11は、出力電
流の設定値である電流設定値Vis1が出力電圧誤差
に見合つた値だけ変化するので、電源の出力電流
i1を、従つて出力電流検出用抵抗R15における
検出電圧i1・R15を電流設定値Vis1と一致さ
せるように、トランジスタTr1を制御し、それに
よつて出力電圧EOを調節する。従つて、出力電
圧の基準電圧からのずれである誤差はキヤンセル
される。この場合、出力電流検出用抵抗R15部
分における電圧降下、すなわち前記検出電圧i
1・R15の大きさは数10〜100mV程度であり、
出力電圧EOや出力電圧誤差に比し充分小さく、
出力電圧EOの検出値に対する影響を無視して考
えることができる。 EO=R13+R14/R14・V ZD1 (However, V ZD1 is the Zener voltage of diode ZD 1 ) If the output voltage deviates from this value, the output voltage from the voltage error amplifier A13 is adjusted to match the voltage error.
Vi 1 is the current setting value at the output point, and resistance R1
1. It is input as the current setting value Vis 1 at the input point to the current adjustment amplifier A11 via the voltage follower A12. The current adjustment amplifier A11 changes the current setting value Vis 1 , which is the setting value of the output current, by a value commensurate with the output voltage error, so the output current of the power supply
The transistor Tr 1 is controlled so as to make the detected voltage i 1 ·R 15 at the output current detection resistor R 15 coincide with the current setting value Vis 1 , thereby adjusting the output voltage EO. Therefore, the error, which is the deviation of the output voltage from the reference voltage, is canceled. In this case, the voltage drop at the output current detection resistor R15, that is, the detection voltage i
The magnitude of 1.R15 is about several tens to 100 mV,
Sufficiently small compared to the output voltage EO and output voltage error,
This can be considered by ignoring the influence of the output voltage EO on the detected value.
次に、N台の電源を第3図に示すような構成で
並列接続した場合を考える。各電源は、電流調節
毛用増幅器A11,A21,AN1の+入力側に
入力される電流設定値と同じ値の電流が出力され
るようにトランジスタTr1,Tr2,TrNを制御する
ことにより出力電圧を調節する。ただし、N台の
電源の並列運転の場合、各電源における電流調節
用増幅器に入力される電流設定値は、単独運転の
場合と異なり、各電源の電流設定値を電流設定値
混合用抵抗R11,R21…RN1により混合し
て平均をとつた値となる。並列母線Bは、各電源
の電流設定値と混合してその平均をとるための役
割を果すラインである。 Next, consider a case where N power supplies are connected in parallel in a configuration as shown in FIG. Each power supply controls the transistors Tr 1 , Tr 2 , Tr N so that the same value of current as the current setting value inputted to the + input side of the current adjustment amplifiers A11, A21, AN1 is outputted. Adjust the output voltage. However, in the case of parallel operation of N power supplies, the current setting value input to the current adjustment amplifier in each power supply is different from the case of individual operation. R21...This is the value obtained by mixing and averaging by RN1. The parallel bus line B is a line that serves to mix the current setting values of each power source and average them.
ここで、各電源における出力点の電流設定値を
Vi1,Vi2…ViN各ボルテージ・フオロアの入力イ
ンピーダンスをZi1,Zi2,…ZiNとすると電源1
の電流誤差増幅器A11に入力される入力点の電
流設定値はVis1は、次式で表わされる。 Here, the current setting value of the output point of each power supply is
V i1 , V i2 ...V iNIf the input impedance of each voltage follower is Zi 1 , Zi 2 , ...Zi N , power supply 1
The current setting value of the input point input to the current error amplifier A11 is expressed by the following equation.
Vis1
=R21R31……RN1Zi/R21R31……RN1
Zi+R11・Vi1
+R11R31……RN1Zi/R11R31……RN1
Zi+R21・Vi2
+ ……
+R11R21……R(N-1)1Zi/R11R21……
R(N-1)1AZi+RN1・
ViN
となる(ただしZi=Zi1Zi……ZiNとする)。 Vis 1 = R21R31……R N1 Zi/R21R31……R N1
Zi+R11・Vi 1 +R11R31……R N1 Zi/R11R31……R N1
Zi+R21・Vi 2 +……+R11R21……R (N-1)1 Zi/R11R21……
R (N-1)1 AZi+R N1・Vi N (however, Zi=Zi 1 Zi...Zi N ).
なお、一般に、R1R2と記したら、それは
(1/1/R1+1/R2)を意味している。また上記
の式は重ねの理を用いて算出できるものである
が、その算出過程は繁雑になるので記さない。 In general, when R1R2 is written, it means (1/1/R1+1/R2). Furthermore, although the above formula can be calculated using the superposition principle, the calculation process will be complicated, so it will not be described.
ここで、R11=R21=……RN1=Rとする。ま
た、ボルテージ・フオロア12,A22……AN2
の入力インピーダンスが上記抵抗Rにくらべて十
分大きければ上式は、次のように変形できる。 Here, R11=R21=...R N1 =R. Also, voltage follower 12, A22...A N2
If the input impedance of R is sufficiently larger than the resistance R, the above equation can be transformed as follows.
Vis1=1/N(Vi1+Vi2B+……+ViN)
従つて電源1の入力点の電流設定値は、各電源
の出力点の電流設定値の平均値となる。また電源
2〜電流Nの電流設定値も電源1の入力点の電流
設定値Vis1と同じ値となるため、各電源の負荷バ
ランスがとれる。このため、各電源の温度上昇
も、ダイオードつき合わせ方式の場合と比較し
て、平等に小さく信頼性の点から有利である。Vis 1 = 1/N (Vi 1 +Vi 2 B+...+Vi N ) Therefore, the current setting value at the input point of power supply 1 is the average value of the current setting values at the output points of each power supply. Further, since the current set value of the power source 2 to the current N is also the same value as the current set value Vis 1 at the input point of the power source 1, the load of each power source can be balanced. Therefore, the temperature rise of each power source is equally small compared to the case of the diode combination method, which is advantageous in terms of reliability.
さて、電源N台の並列運転中、出力電流の合計
をIとすると、各電源の出力はI/Nとなる。こ
こで、並列運転中の電源の1台がダウンすると、
残つた(N―1)台の電源は、それぞれI/N
(N―1)だけ、出力電流を増し、ダウンした電
源の出力分をおぎなう。従つて、個々の電源の出
力容量が1/N+I/N(N―1)=N(N―1)+1
/N(N―1)I
あれば1台の電源のダウンに対応できる。さらに
並列運転台数Nをふやせば同時に複数台の電源が
ダウンしても、残つた電源によりバツクアツプ可
能な高信頼性電源を構成できる。 Now, when N power supplies are operating in parallel, if the total output current is I, then the output of each power supply is I/N. Here, if one of the power supplies running in parallel goes down,
The remaining (N-1) power supplies each have an I/N
The output current is increased by (N-1) to cover the output of the downed power supply. Therefore, the output capacity of each power supply is 1/N+I/N(N-1)=N(N-1)+1
/N(N-1)I, it can cope with the power failure of one unit. Furthermore, by increasing the number N of parallel operating units, even if multiple units are powered down at the same time, a highly reliable power source that can be backed up using the remaining power source can be constructed.
また、電源N台の並列運転で、電源ダウン時の
バツクアツプが不要であれば、(N×i)まで出
力を取り出すことが可能である(但しiは電源1
台当りの出力容量)。従つて、出力容量の増大が
必要な場合、それに見合つた台数の電源を加えれ
ば良い。もちろん、電源ダウン時のバツクアツプ
機能を有したまま、出力容量を増大させることも
可能である。 In addition, if N power supplies are operated in parallel and backup is not required when the power goes down, it is possible to take out the output up to (N x i) (where i is the power supply 1).
output capacity per unit). Therefore, if it is necessary to increase the output capacity, it is sufficient to add an appropriate number of power supplies. Of course, it is also possible to increase the output capacity while maintaining the backup function during power down.
次に本発明の主眼である出力容量の異なる電源
の並列運転方式について説明する。第4図は本発
明の一実施例を示すもので、第3図と異なるとこ
ろは各ボルテージ・フオロアA12〜AN2の出
力電圧をそれぞれ分圧用の抵抗R1a〜RNaお
よびR1b〜RNbで分圧した新たな電流設定値
である出力電流設定値Vjs〜VjsNを電流調節用増
幅器A11〜AN1の入力としている点である。
このような構成とすれば、前述の平均の電流設定
値Vis1分圧し、改めて各電源の出力容量に応じた
出力電流設定値Vjs1〜VjsNを比例配分して与える
ことができる。すなわちN台の電源を本方式で並
列運転する場合各電源の出力容量に対応する出力
電流をI1,I2,……,INとすると、各電源
(番号K)における分圧用の抵抗RKa,RKbを次
式を満たすように設定しておけば、効率的な並列
運転が可能である。 Next, a method of parallel operation of power supplies with different output capacities, which is the main focus of the present invention, will be explained. FIG. 4 shows an embodiment of the present invention, and the difference from FIG. The point is that the output current set values Vjs to Vjs N, which are the current set values, are input to the current adjustment amplifiers A11 to AN1.
With such a configuration, the average current setting value Vis 1 described above can be divided and the output current setting values Vjs 1 to Vjs N according to the output capacity of each power source can be given again by proportional distribution. In other words, when N power supplies are operated in parallel using this method, if the output current corresponding to the output capacity of each power supply is I1, I2, ..., IN, then the voltage dividing resistors RKa and RKb in each power supply (number K) are Efficient parallel operation is possible if the settings are made to satisfy the following equation.
I1:I2:…:N=Vji1:Vjs2:…:VjsN
=R1b/R1a+R1b
:R2b/R2a+R2b:…:RNb/RNa+RNb
この場合各電流調節用増幅器(A11〜AN
1)は各電源の、その時々の出力電流をil〜iNと
すると、
前述と同様に
Vjs1=i1・R15
:
VjsN=iN・RN5
となるように出力電流i1〜iNを調節する。従つ
て各電源の出力電流検出用抵抗が等しく、すなわ
ち
R15=…=RN5 であれば
I1:I2:…:IN=i1:…:N
となつて各電源は常にそれぞれ出力容量に比例し
た出力電流を分担することができる。 I1:I2:…:N=Vji 1 :Vjs 2 :…:Vjs N =R1b/R1a+R1b:R2b/R2a+R2b:…:RNb/RNa+RNb In this case, each current adjustment amplifier (A11 to AN
1) Assuming that the output current of each power supply at any given time is il~iN, the output currents i1~iN are adjusted as described above so that Vjs 1 = i1·R15 : Vjs N = iN·RN5. Therefore, if the output current detection resistances of each power supply are equal, that is, R15=...=RN5, then I1:I2:...:IN=i1:...:N, and each power supply always has an output current proportional to its output capacity. can be shared.
なお上記の実施例のように出力電流検出用抵抗
R15〜RN5が全て等しい構成の場合は、前記
分圧用の抵抗RKa,RKbは小容量のもので足り、
従つてこれらに代る小形の半固抵抗などを用いる
ことにより、出力電流の設定を、電源の出力容量
に合わせ、可変とすることが容易となる。すなわ
ち同一の部品構成として標準化できる利点があ
る。 Note that if the output current detection resistors R15 to RN5 are all equal in configuration as in the above embodiment, the voltage dividing resistors RKa and RKb may be of small capacity.
Therefore, by using a small semi-solid resistor or the like instead of these, it becomes easy to make the setting of the output current variable in accordance with the output capacity of the power supply. That is, there is an advantage that it can be standardized as having the same component configuration.
しかし比較的容量の大きいものではあるが、前
記出力電流検出用抵抗R15〜RN5を変えるこ
とによつても出力電流の配分は可能でありこれも
本発明に包含される。この場合の回路構成は外見
上第3図と同じであり前記分圧用の抵抗RKa,
RKbは不要となる。この場合は各電源の出力容
量に対応する出力電流I1〜INと、出力電流検
出用抵抗R15〜RN5について、
1・R15=…=IN・RN5 すなわち
I1:II2:…:IN=1/R15:1/R25:…:1/RN5
の関係を満たすように出力電流検出用抵抗を選べ
ばよいことは前述の説明から容易に推察できるで
あろう。 However, although the capacitance is relatively large, it is also possible to distribute the output current by changing the output current detection resistors R15 to RN5, and this is also included in the present invention. The circuit configuration in this case is visually the same as that shown in Fig. 3, and the voltage dividing resistor RKa,
RKb becomes unnecessary. In this case, for the output currents I1 to IN corresponding to the output capacity of each power supply and the output current detection resistors R15 to RN5, 1・R15=…=IN・RN5, that is, I1:II2:…:IN=1/R15: It can be easily inferred from the above explanation that the output current detection resistor should be selected so as to satisfy the relationship 1/R25:...:1/RN5.
この発明によれば、ダイオードつき合せ方式、
マスタ・スレーブ方式等における欠点をすべて除
去して、共通部を必要とせず全くか、もしくはほ
ぼ同一の回路構成により、出力容量の異なる複数
の電源の効率的な並列運転が可能となる。 According to this invention, a diode matching method,
All the drawbacks of the master-slave system are eliminated, and multiple power supplies with different output capacities can be efficiently operated in parallel without requiring any common parts or with almost the same circuit configuration.
この発明は、すでに説明したシリーズ・レギユ
レータの他、スイツチング・レギユレータにも応
用できる。 This invention can be applied to switching regulators as well as the series regulators already described.
第1図および第2図はそれぞれ従来の電源シス
テムの一例を示すブロツク図、第3図は本発明の
基礎原理および他の実施例を示す回路図、第4図
は本発明の一実施例を示す回路図である。
符号説明、1,2,N……電源、B……並列母
線、A11,A21,AN1……電流調節用増幅
器、A13,A23,AN3……電圧誤差増幅
器、R15,R25,RN5……出力電流検出用
抵抗、R1a,R2a,RNa,R1b,R2b,
RNb……抵抗。
1 and 2 are block diagrams showing an example of a conventional power supply system, FIG. 3 is a circuit diagram showing the basic principle of the present invention and another embodiment, and FIG. 4 is a circuit diagram showing an embodiment of the present invention. FIG. Description of symbols, 1, 2, N...Power supply, B...Parallel bus, A11, A21, AN1...Current adjustment amplifier, A13, A23, AN3...Voltage error amplifier, R15, R25, RN5...Output current Detection resistor, R1a, R2a, RNa, R1b, R2b,
RNb...Resistance.
Claims (1)
し、両者間の誤差電圧を検出して電流設定値とし
て出力する誤差電圧検出手段と、分圧比の配分比
が当該の安定化電源の出力容量の配分比に等しく
なるように、前記電流設定値を分圧し出力電流設
定値として出力する分圧手段と、当該の安定化電
源の出力電流を検出する出力電流検出手段と、該
出力電流検出手段における検出電圧が前記出力電
流設定値に等しくなるように電源回路の出力電流
を調節する電流調節手段とを有して成る安定化電
源を複数個並列に接続し、各安定化電源における
誤差電圧検出手段の出力側を共通母線で接続し、
各安定化電源に対し出力容量に比例した出力電流
の配分を行つたことを特徴とする安定化電源の並
列運転方式。 2 或る基準電圧と電源回路の出力電圧とを比較
し、両者間の誤差電圧を検出して電流設定値とし
て出力する誤差電圧検出手段と、当該の安定化電
源の出力電流を検出し、当該の安定化電源の出力
容量に対応した出力電流において等しい検出電圧
を出力する出力電流検出手段と、該出力電流検出
手段における検出電圧が前記電流設定値に等しく
なるように電源回路の出力電流を調節する電流調
節手段とを有して成る安定化電源を複数個並列に
接続し、安定化電源における誤差電圧検出手段の
出力側を共通母線で接続し、各安定化電源に対し
出力容量に比例した出力電流の配分を行つたこと
を特徴とする安定化電源の並列運転方式。[Claims] 1. Error voltage detection means that compares a certain reference voltage and the output voltage of a power supply circuit, detects an error voltage between the two, and outputs it as a current setting value; voltage dividing means for dividing the current set value and outputting it as an output current set value so as to be equal to the distribution ratio of the output capacity of the stabilized power supply; and output current detection means for detecting the output current of the stabilized power supply. and current adjustment means for adjusting the output current of the power supply circuit so that the detected voltage in the output current detection means becomes equal to the output current setting value, a plurality of stabilized power supplies are connected in parallel, and each stabilized power supply is connected in parallel. Connect the output side of the error voltage detection means in the stabilized power supply with a common bus,
A parallel operation method for stabilized power supplies characterized by distributing output current to each stabilized power supply in proportion to its output capacity. 2 Error voltage detection means that compares a certain reference voltage and the output voltage of a power supply circuit, detects the error voltage between the two, and outputs it as a current setting value; output current detection means for outputting an equal detection voltage at an output current corresponding to the output capacity of the stabilized power supply; and adjusting the output current of the power supply circuit so that the detection voltage in the output current detection means becomes equal to the current setting value. A plurality of stabilized power supplies each having a current adjustment means are connected in parallel, and the output side of the error voltage detection means in the stabilized power supplies is connected through a common bus, and a voltage proportional to the output capacity of each stabilized power supply is connected in parallel. A parallel operation method for stabilized power supplies characterized by distribution of output current.
Priority Applications (1)
Application Number | Priority Date | Filing Date | Title |
---|---|---|---|
JP58044871A JPS59170916A (en) | 1983-03-17 | 1983-03-17 | Parallel operation system of stabilized power source |
Applications Claiming Priority (1)
Application Number | Priority Date | Filing Date | Title |
---|---|---|---|
JP58044871A JPS59170916A (en) | 1983-03-17 | 1983-03-17 | Parallel operation system of stabilized power source |
Publications (2)
Publication Number | Publication Date |
---|---|
JPS59170916A JPS59170916A (en) | 1984-09-27 |
JPH0261047B2 true JPH0261047B2 (en) | 1990-12-19 |
Family
ID=12703554
Family Applications (1)
Application Number | Title | Priority Date | Filing Date |
---|---|---|---|
JP58044871A Granted JPS59170916A (en) | 1983-03-17 | 1983-03-17 | Parallel operation system of stabilized power source |
Country Status (1)
Country | Link |
---|---|
JP (1) | JPS59170916A (en) |
Families Citing this family (5)
Publication number | Priority date | Publication date | Assignee | Title |
---|---|---|---|---|
JPS63172238U (en) * | 1987-04-28 | 1988-11-09 | ||
JPH0545080Y2 (en) * | 1987-04-28 | 1993-11-17 | ||
FR2618922A1 (en) * | 1987-07-28 | 1989-02-03 | Thomson Csf | Method of matching a power generator to a load |
JPS6440241U (en) * | 1987-09-04 | 1989-03-10 | ||
JPH0613588Y2 (en) * | 1987-10-05 | 1994-04-06 | 横河電機株式会社 | Parallel operation power supply |
-
1983
- 1983-03-17 JP JP58044871A patent/JPS59170916A/en active Granted
Also Published As
Publication number | Publication date |
---|---|
JPS59170916A (en) | 1984-09-27 |
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