JPH0256010A - Constant-voltage reference power source circuit - Google Patents

Constant-voltage reference power source circuit

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Publication number
JPH0256010A
JPH0256010A JP63207595A JP20759588A JPH0256010A JP H0256010 A JPH0256010 A JP H0256010A JP 63207595 A JP63207595 A JP 63207595A JP 20759588 A JP20759588 A JP 20759588A JP H0256010 A JPH0256010 A JP H0256010A
Authority
JP
Japan
Prior art keywords
voltage
circuit
temperature
resistor
constant
Prior art date
Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
Granted
Application number
JP63207595A
Other languages
Japanese (ja)
Other versions
JP2745553B2 (en
Inventor
Misao Furuya
操 古谷
Current Assignee (The listed assignees may be inaccurate. Google has not performed a legal analysis and makes no representation or warranty as to the accuracy of the list.)
Mitsumi Electric Co Ltd
Original Assignee
Mitsumi Electric Co Ltd
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Filing date
Publication date
Application filed by Mitsumi Electric Co Ltd filed Critical Mitsumi Electric Co Ltd
Priority to JP20759588A priority Critical patent/JP2745553B2/en
Publication of JPH0256010A publication Critical patent/JPH0256010A/en
Application granted granted Critical
Publication of JP2745553B2 publication Critical patent/JP2745553B2/en
Anticipated expiration legal-status Critical
Expired - Lifetime legal-status Critical Current

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Abstract

PURPOSE:To obtain a zero temperature coefficient by executing a control so that an output voltage becomes lower than a voltage corresponding to a band gap of a P-N junction element by an output of a differential amplifying circuit by which a voltage across a first resistance, etc., become an input voltage. CONSTITUTION:The constant-voltage reference power source circuit is constitut ed of a differential amplifying circuit 16, a constant-current power source C.C, and also, a first resistance R4, a second resistance R5, a third resistance R1 and a fourth resistance R2, and a transistor (Tr) Q1 as a P-N junction element. In this state, a voltage of a junction part of the P-N junction element Q1 becomes a function of a voltage Vg0 corresponding to a temperature T and a band gap of its semiconductor, and also, a voltage difference of base - emitter voltages of two Trs Q2 - Q3 of the differential amplifying circuit 16 is also shown in the same way, and becomes a function of the temperature T. Accord ingly, this output circuit is shown as a potential difference of the base - emitter voltages of the TRs Q2 - Q3 and becomes a function of the temperature and the voltage Vg0, therefore, the resistances R1 - R4 are selected so that an expres sion which is brought to partial differential by the temperature T becomes zero.

Description

【発明の詳細な説明】 産業上の利用分野 本発明は低電圧基準電源回路に係り、特に零、温度係数
を有し、温度変化に伴う出力電圧の変動を抑え得る低電
圧基準電源回路に関する。
DETAILED DESCRIPTION OF THE INVENTION Field of the Invention The present invention relates to a low voltage reference power supply circuit, and more particularly to a low voltage reference power supply circuit having a zero temperature coefficient and capable of suppressing fluctuations in output voltage due to temperature changes.

従来の技術 本出願人は特公昭55−18928号公報において低電
圧基準電源回路を提案した(第5図にその原理回路図を
示す)。同図において1は互いに電流密度の異なるトラ
ンジスタよりなる差動増幅回路であり、その出力は増幅
器2によって増幅され出力端子T3に接続されている。
Prior Art The present applicant proposed a low voltage reference power supply circuit in Japanese Patent Publication No. 55-18928 (the principle circuit diagram thereof is shown in FIG. 5). In the figure, reference numeral 1 denotes a differential amplifier circuit composed of transistors having mutually different current densities, the output of which is amplified by an amplifier 2 and connected to an output terminal T3.

又抵抗RI2の両端における電圧は上記差動増幅回路1
の2つの入力に夫々供給されている。
Also, the voltage across the resistor RI2 is equal to the voltage across the differential amplifier circuit 1.
are supplied to the two inputs of .

第5図の回路では端子T2と13間の電圧vrefをダ
イオードDを構成するシリコンのエネルギーバンドギャ
ップに相当する電圧vgoと等しくすることによってv
refが零温度係数を有する温度特性とすることができ
、温度が変動した場合にもVrefを安定に保つことが
できる。
In the circuit shown in FIG.
ref can have a temperature characteristic having a zero temperature coefficient, and Vref can be kept stable even when the temperature fluctuates.

また、本出願人は特願昭63−20895号(発明の名
称「低電圧基準電源回路」)において、レベル変換手段
を設けることによって1.2■以下の低電圧・であって
も零温度係数を有する低電圧基準電源回路を提案した。
In addition, in Japanese Patent Application No. 63-20895 (title of the invention "Low Voltage Reference Power Supply Circuit"), the present applicant has disclosed that by providing a level conversion means, the temperature coefficient can be reduced to zero even at a low voltage of 1.2■ or less. We proposed a low voltage reference power supply circuit with

発明が解決しようとする課題 第5図に示す回路の出力電圧Vretは温度の変動に対
して安定であり員好な定電圧電源となるが、vrefは
シリコンのエネルギーバンドギャップに相当する約1.
2vに設定しなければならない。したがって近年増加し
つつある1、2v以下の低電圧で動作する種々の機器に
対しては第5図の回路はこのままでは対応できず、上記
特公昭55−18928号公報における実施例で示した
ようにvrefを抵抗を介してボルテージフォロワ型に
構成された演算増幅器の非反転入力端子に接続するなど
の措置が必要となる。
Problems to be Solved by the Invention Although the output voltage Vret of the circuit shown in FIG. 5 is stable against temperature fluctuations and serves as a convenient constant voltage power supply, vref is approximately 1.0 mm, which corresponds to the energy band gap of silicon.
Must be set to 2v. Therefore, the circuit shown in Fig. 5 cannot be used as it is for various devices that operate at low voltages of 1 to 2 V or less, which have been increasing in recent years. Therefore, it is necessary to take measures such as connecting vref to a non-inverting input terminal of an operational amplifier configured as a voltage follower type via a resistor.

しかし、もともとの基準電圧Vrerがバンドギャップ
電圧でないと安定に動作しないため、Vrefそのもの
を1.2v以下の電圧にして使用することはできない。
However, if the original reference voltage Vrer is not a bandgap voltage, it will not operate stably, so Vref itself cannot be used at a voltage of 1.2 V or less.

また特願昭63−20895において提案した回路は1
.2V以下の低電圧を得るために出力段にレベル変換手
段を設けなければならないという問題があった。
In addition, the circuit proposed in Japanese Patent Application No. 63-20895 is 1
.. There is a problem in that in order to obtain a low voltage of 2V or less, a level conversion means must be provided at the output stage.

本発明は、上記の点に鑑みてなされたものであり、シリ
コンのエネルギーバンドギャップに相当する電圧(約1
.2V)以下の電圧であって、零温度係数を有する出力
電圧が得られる低電圧基準電源回路を提供することを目
的とする。
The present invention has been made in view of the above points, and is based on a voltage corresponding to the energy band gap of silicon (approximately 1
.. An object of the present invention is to provide a low voltage reference power supply circuit that can obtain an output voltage of 2 V) or lower and has a zero temperature coefficient.

課題を解決するための手段 本発明になる低電圧基準電源回路は、差動増幅回路と、
この差動増幅u路をバイアスするとともに第1の抵抗の
両端間電圧を差動増幅回路の入力電圧とし第1の抵抗と
直列に接続された第2の抵抗を有し出力端子間に接続さ
れた第1の直列回路と、直列に接続された第3の抵抗及
びPN接合素子からなり第1の直列回路と並列に接続さ
れた第2の直列回路と、第1の直列回路中箱1及び第2
の抵抗の間の点と第2の直列回路中PN接合素子のP側
及び第3の抵抗の接続点との間を結ぶよう設けられた第
4の抵抗とからなり、差動増幅回路の出力によって出力
端子間に発生する出力電圧がPN接合素子を構成する半
導体のバンドギャップに相当する電圧以下の一定電圧と
なるよう制御する。
Means for Solving the Problems A low voltage reference power supply circuit according to the present invention includes a differential amplifier circuit,
This differential amplification circuit is biased and the voltage across the first resistor is used as the input voltage of the differential amplifier circuit. a first series circuit, a second series circuit including a third resistor and a PN junction element connected in series, and connected in parallel to the first series circuit; Second
A fourth resistor is provided to connect the point between the resistors in the second series circuit and the connection point between the P side of the PN junction element and the third resistor in the second series circuit, and the output of the differential amplifier circuit. The output voltage generated between the output terminals is controlled to be a constant voltage below the voltage corresponding to the bandgap of the semiconductor forming the PN junction element.

作用 PN接合素子の接合部の電圧は周知の公式によって表わ
され、温度T及びPN接合素子を構成する半導体(通常
はシリコン)のバンドギャップに相当する電圧V、。の
関数となっている。また差動増幅回路を構成する2つの
トランジスタのベース・エミッタ間電圧の電圧差も周知
の公式によって表わされ、温度Tの関数となっている。
The voltage at the junction of a working PN junction device is expressed by the well-known formula: temperature T and voltage V, which corresponds to the bandgap of the semiconductor (usually silicon) constituting the PN junction device. It is a function of Further, the voltage difference between the base-emitter voltages of two transistors constituting the differential amplifier circuit is also expressed by a well-known formula, and is a function of temperature T.

上記低電圧基準電源回路の出力電圧は、PN接合素子の
接合部の電圧及び差動増幅回路を構成する2つのトラン
ジスタのベース・エミッタ間電圧の電圧差として表われ
る。従ってこのように表わされた出力電圧はT及び■g
oの関数となっており、この式を温度Tで偏微分した式
がゼロとなるように第1及び第2の直列回路を構成する
抵抗の値を選択することにより、出力電圧がvg。以下
であって零温度係数を有するように設定することができ
る。
The output voltage of the low voltage reference power supply circuit is expressed as a voltage difference between the voltage at the junction of the PN junction element and the base-emitter voltage of two transistors constituting the differential amplifier circuit. Therefore, the output voltage expressed in this way is T and g
By selecting the values of the resistors constituting the first and second series circuits so that the partial differentiation of this equation with respect to temperature T becomes zero, the output voltage becomes vg. or less and can be set to have a zero temperature coefficient.

実施例 第1図は本発明の原理回路図を示す。第1図においてA
l11)は第2図以降における差動増幅回路16であり
、具体的には第2図に示す構成とされている。以下この
第2図の第1実施例について説明する。第2図中抵抗R
4は特許請求の範囲に記載した第1の抵抗、抵抗Rsは
同様に第2の抵抗、抵抗R+は第3の抵抗、抵抗R2は
第4の抵抗に対応し、トランジスタQ1がPN接合素子
に対応する。またC9Cは定電流電源であり出力端子v
outのラインに一定電流を供給する。
Embodiment FIG. 1 shows a circuit diagram of the principle of the present invention. In Figure 1, A
11) is the differential amplifier circuit 16 shown in FIG. 2 and thereafter, and specifically has the configuration shown in FIG. The first embodiment shown in FIG. 2 will be described below. Resistance R in Figure 2
4 corresponds to the first resistor described in the claims, the resistor Rs similarly corresponds to the second resistor, the resistor R+ corresponds to the third resistor, the resistor R2 corresponds to the fourth resistor, and the transistor Q1 is a PN junction element. handle. Also, C9C is a constant current power supply and the output terminal v
Supply a constant current to the out line.

抵抗R2を流れる電流を12、抵抗R3を流れる?IH
FEをI3とすると、トランジスタQIのベース・エミ
ッタ間電圧VBEIは、 VBEI−R2Iz+Rs(12+Ia)   (1)
と表わされ、トランジスタQ2 、Qlのベース・エミ
ッタ間電圧を夫々VBE2 、 VBE3とし、抵抗R
4の両端閤電圧をΔVBEとした場合にΔV BL−V
 BF2− V B[3(2)であり、電流■3は [1=AVBE/ R4(3) と表され、(1)(3)式より電流!2はVBEl −
−AVBE 12”                  (4)R
2+R5 と表わされる。
The current flowing through resistor R2 is 12, and the current flowing through resistor R3? IH
If FE is I3, the base-emitter voltage VBEI of transistor QI is: VBEI-R2Iz+Rs(12+Ia) (1)
The base-emitter voltages of transistors Q2 and Ql are VBE2 and VBE3, respectively, and the resistor R is
When the voltage across both ends of 4 is ΔVBE, ΔV BL-V
BF2-V B[3(2), and the current ■3 is expressed as [1=AVBE/R4(3), and from equations (1) and (3), the current! 2 is VBEl −
-AVBE 12” (4)R
It is expressed as 2+R5.

であり、 (3)(4)(6)式より Rs (VBEl ・ΔVBE) + (R3 +R4 +Rs +Rs となる。ここで■2 〉〉I3となるようにR3 + R4+Rs  >>R1 +82 とすれば、 出力端子V。、tから基準電源として取り出される電圧
をvr8rとすると、 ΔVBE + (R3]+R4 Vre(−Rs (I z ” I s )+ (Rs
 +R4+R6)  I3     (5)−Rslz
+ (Rs +R4+R5+Rs  )  13  (6)
と表わされる た)。
From equations (3), (4), and (6), it becomes Rs (VBEl ・ΔVBE) + (R3 +R4 +Rs +Rs.Here, if we set R3 + R4+Rs >>R1 +82 so that ■2 〉〉I3, , If the voltage taken out from the output terminal V., t as a reference power supply is vr8r, then ΔVBE + (R3] + R4 Vre (-Rs (I z ” I s ) + (Rs
+R4+R6) I3 (5)-Rslz
+ (Rs +R4+R5+Rs) 13 (6)
).

(ここで、 1−Rz +−Rs とおい またトランジスタQ1のベース・エミッタ間電圧をVB
EIとすると ■ VBEO()          (9)T。
(Here, 1-Rz +-Rs and the voltage between the base and emitter of transistor Q1 is VB
Assuming EI, ■ VBEO() (9)T.

と表わされることが知られている。ここでvgoはトラ
ンジスタQIを構成するシリコンのエネルギーバンドギ
ャップに相当する電圧(約1.2V )、王は温度、T
oは基準となる動作温度、V BEGはT=Toのとき
のトランジスタQIのベース・エミッタ問電圧である。
It is known that it can be expressed as Here, vgo is the voltage (approximately 1.2V) corresponding to the energy bandgap of silicon constituting transistor QI, and king is temperature, T
o is the reference operating temperature, and V BEG is the base-emitter voltage of the transistor QI when T=To.

また差動増幅回路16の入力電圧となるΔVBEとなる
ことが知られている。ここで01はトランジスタQ3の
トランジスタQ2に対する電流密度化(又は接合部の面
積比)nzはトランジスタQ4のトランジスタQsに対
する電流密度化であり、kは、ボルツマン定数、qは電
子電荷である。
It is also known that the input voltage of the differential amplifier circuit 16 is ΔVBE. Here, 01 is the current density of the transistor Q3 with respect to the transistor Q2 (or the area ratio of the junction part), nz is the current density of the transistor Q4 with respect to the transistor Qs, k is the Boltzmann constant, and q is the electronic charge.

(9)(10)式を(8)式に代入するとT。(9) Substituting equation (10) into equation (8) yields T.

+ (1+ R30kr □)□乏n 4   Q となる。+ (1+ R30kr □)□Poor n 4 Q becomes.

ここで(11)式を温度下で偏微粉し、A VBE−V
BE2− VBE3 T ・雷       fln  n+ ・n2       (10) に2 +Ks R刀  k +  (1+     )−fl n  n 1  ・
n24   q となる。これをゼロとおいてv、oを求めるとであり、
これは抵抗R2、Rs 、 Rs 、 R3)を(13
)式を満たすよう設定すればvrefの温度係数はぜ口
となることを示している。
Here, formula (11) is pulverized under temperature, and A VBE-V
BE2- VBE3 T ・Lightning fln n+ ・n2 (10) ni 2 +Ks R sword k + (1+ )-fl n n 1 ・
It becomes n24 q. Setting this as zero and finding v and o, we get
This reduces the resistance R2, Rs, Rs, R3) to (13
) shows that if the temperature coefficient of vref is set to satisfy the equation, the temperature coefficient of vref becomes a gap.

またT = T oにおけるVrefの値は(11)式
よりR刀 kT。
Also, the value of Vref at T = To is R kT from equation (11).

(1+ 之nnl  ・ n2 と表わされる。(15)式は温度TがT=Toのときに
出力端子10.11間に生じる電圧vrefがシリコン
のバンドギャッ゛プに相当する1、2■よりも低い低電
圧となることを示しており、しかもこれは零温度係数を
有するため温度変化に対して安定な出力となっている。
It is expressed as (1+~nnl・n2).Equation (15) shows that when the temperature T is T=To, the voltage vref generated between the output terminals 10 and 11 is greater than 1 or 2■, which corresponds to the band gap of silicon. This indicates a low voltage, and since it has a zero temperature coefficient, the output is stable against temperature changes.

第3図及び第4図は、夫々本発明の第2実施例、第3実
施例の回路図を示しており、これらの回路中箱2図と同
一構成部分には同一符号を付し、その説明を省略する。
Figures 3 and 4 show circuit diagrams of the second and third embodiments of the present invention, respectively, and the same components as those in Box 2 in these circuits are given the same reference numerals. The explanation will be omitted.

第2図の回路は本発明の主目的である温度変動に対して
安定な低電圧出力を与えることができるが、第3図、第
4図の回路はこの他に電w電圧変動及び負荷変動等によ
って生ずる出力電圧の変動を防止するために第2図の回
路の周辺に必要な回路を設けたものであり、両回路とも
低電圧基準電源回路16(第2図の回路に対応)の左側
が、第2図の定電流電源C9Cの役割を果す。
The circuit shown in Fig. 2 can provide a stable low voltage output against temperature fluctuations, which is the main purpose of the present invention, but the circuits shown in Figs. Necessary circuits are provided around the circuit shown in Figure 2 in order to prevent fluctuations in the output voltage caused by plays the role of constant current power supply C9C in FIG.

第3図では、Vioに電源が投入されると定電流回路1
5によって略一定の電流がトランジスタQ8に供給され
、トランジスタQ9がオンとなることによって低電圧基
準電源回路16が動作し、これに伴ってPNPトランジ
スタQ1・がオンとなる。この状態から、負荷変動等に
よって出力電圧voUtが例えば増大する方向に変化す
るとPNPトランジスタQ+oはより強くオンになりエ
ミッタ電流が増えるため、トランジスタQ8のベースに
供給される電流は減少する。これによってトランジスタ
Q9のコレクタから供給される出力電圧■oIItは下
げられる。一方、出力電圧V。utが減少する方向に変
化すると上記とは逆に■。utを上げるよう動作し、出
力電圧■。utを一定に保とうとする。
In Figure 3, when the power is turned on to Vio, the constant current circuit 1
5, a substantially constant current is supplied to the transistor Q8, and the transistor Q9 is turned on, thereby operating the low voltage reference power supply circuit 16, and accordingly, the PNP transistor Q1 is turned on. From this state, when the output voltage voUt changes, for example, in an increasing direction due to a load change or the like, the PNP transistor Q+o is turned on more strongly and the emitter current increases, so that the current supplied to the base of the transistor Q8 decreases. As a result, the output voltage ■oIIt supplied from the collector of the transistor Q9 is lowered. On the other hand, the output voltage V. When ut changes in the decreasing direction, contrary to the above, ■. It operates to raise the output voltage■. Try to keep ut constant.

第4図の回路は、Vioに電源が投入されてトランジス
タQI2がオンとされるとカレントミラー回路17に電
流が流れ、トランジスタQI3.QI3がオンとされる
ことによりPNPトランジスタQ+sから低電圧基準電
源回路16に電流が供給され回路動作が開始される。低
電圧基準電源回路16が動作してトランジスタQI6が
オンとされるとトランジスタQnもオンとされ、これに
よってトランジスタQI2はオフとなる。このためカレ
ントミラー回路17を構成するトランジスタQI7のコ
レクタ電流は全てトランジスタ021のコレクタに供給
される。このトランジスタQ21はそのコレクタ電流を
一定とする働きがあることからカレントミラー回路17
を構成するトランジスタQ+gのコレクタ電流も一定と
なる。出力電圧V。、tが変動した場合はQ16のエミ
ッタ電圧の高低によりQ10の電流をコントロールして
出力電圧が一定となる様に動作する(出力が上がった場
合Q+sのエミッタの電圧が上昇してQ)4の電流を低
下させてQ+sのベース電流を少なくし、出力電圧を低
くして一定になる様に制御する)。
In the circuit shown in FIG. 4, when power is applied to Vio and transistor QI2 is turned on, current flows through current mirror circuit 17, and transistors QI3. When QI3 is turned on, current is supplied from the PNP transistor Q+s to the low voltage reference power supply circuit 16, and circuit operation is started. When the low voltage reference power supply circuit 16 operates to turn on the transistor QI6, the transistor Qn is also turned on, thereby turning off the transistor QI2. Therefore, all the collector current of the transistor QI7 constituting the current mirror circuit 17 is supplied to the collector of the transistor 021. Since this transistor Q21 has the function of keeping its collector current constant, the current mirror circuit 17
The collector current of the transistor Q+g constituting the transistor Q+g also remains constant. Output voltage V. , when t fluctuates, the current of Q10 is controlled by the level of the emitter voltage of Q16 to keep the output voltage constant (if the output increases, the emitter voltage of Q+s increases and Q).4. The current is lowered to reduce the base current of Q+s, and the output voltage is lowered and controlled to be constant).

第4図の回路は第3図の回路に比し、021のコレフタ
ー電流の安定性が高いので第3図の回路の特性より安定
性が高い。
The circuit of FIG. 4 has higher stability of the corefter current of 021 than the circuit of FIG. 3, so the circuit of FIG. 4 has higher stability than the characteristics of the circuit of FIG.

発明の効果 上述の如く、本発明によれば、比較的簡単な回路構成に
よりシリコンのエネルギーバンドギャップに相当する電
圧以下の零温度係数を有する安定な低電圧を取り出すこ
とができ、バッテリ駆動の電気製品の増加に伴って拡大
しつつある低電圧の基準電源に対する需要に応えること
でができ、更に容易に集積回路化が可能なことから信頼
性、緩流性の点で有利であるという特長を有する。
Effects of the Invention As described above, according to the present invention, a stable low voltage having a zero temperature coefficient below the voltage corresponding to the energy band gap of silicon can be extracted with a relatively simple circuit configuration, and battery-powered electricity can be It can meet the growing demand for low-voltage reference power supplies as the number of products increases, and it also has advantages in terms of reliability and slow flow because it can be easily integrated into circuits. have

【図面の簡単な説明】[Brief explanation of the drawing]

第1図は本発明の原理回路図、第2図は本発明の第1の
実施例の回路図、第3図は本発明の第2実施例の回路図
、第4図は本発明の第3実施例の回路図、第5図は従来
回路の原理回路図である。 15・・・定電流回路、16・・・定電圧基準電源回路
、17・・・カレントミラー回路、C0C・・・低電流
回路、R+ 〜Rs 、 Rn 、 R12=抵抗、Q
 I−Q s *Q8〜QI8.ON・・・トランジス
タ。
FIG. 1 is a circuit diagram of the principle of the present invention, FIG. 2 is a circuit diagram of a first embodiment of the present invention, FIG. 3 is a circuit diagram of a second embodiment of the present invention, and FIG. 4 is a circuit diagram of a second embodiment of the present invention. The circuit diagram of the third embodiment and FIG. 5 are the principle circuit diagrams of the conventional circuits. 15... constant current circuit, 16... constant voltage reference power supply circuit, 17... current mirror circuit, C0C... low current circuit, R+ ~ Rs, Rn, R12=resistance, Q
I-Qs *Q8~QI8. ON...transistor.

Claims (1)

【特許請求の範囲】 差動増幅回路と、 該差動増幅回路をバイアスするとともに第1の抵抗の両
端間電圧を該差動増幅回路の入力電圧とし該第1の抵抗
と直列に接続された第2の抵抗を有し、出力端子間に接
続された第1の直列回路と、直列に接続された第3の抵
抗及びPN接合素子からなり、該第1の直列回路と並列
に接続された第2の直列回路と、 該第1の直列回路中該第1及び第2の抵抗の間の点と、
該第2の直列回路中該PN接合素子のP側及び該第3の
抵抗の接続点との間を結ぶよう設けられた第4の抵抗と
からなり、該差動増幅回路の出力によって、該出力端子
間に発生する出力電圧が該PN接合素子を構成する半導
体のバンドギャップに相当する電圧以下の一定電圧とな
るよう制御する低電圧基準電源回路。
[Scope of Claims] A differential amplifier circuit, a circuit connected in series with the first resistor that biases the differential amplifier circuit and uses a voltage across a first resistor as an input voltage of the differential amplifier circuit. A first series circuit having a second resistor and connected between output terminals, and a third resistor and a PN junction element connected in series, and connected in parallel with the first series circuit. a second series circuit; a point between the first and second resistors in the first series circuit;
a fourth resistor provided to connect the P side of the PN junction element in the second series circuit and the connection point of the third resistor, and A low voltage reference power supply circuit that controls an output voltage generated between output terminals to be a constant voltage that is lower than a voltage corresponding to a bandgap of a semiconductor forming the PN junction element.
JP20759588A 1988-08-22 1988-08-22 Low voltage reference power supply circuit Expired - Lifetime JP2745553B2 (en)

Priority Applications (1)

Application Number Priority Date Filing Date Title
JP20759588A JP2745553B2 (en) 1988-08-22 1988-08-22 Low voltage reference power supply circuit

Applications Claiming Priority (1)

Application Number Priority Date Filing Date Title
JP20759588A JP2745553B2 (en) 1988-08-22 1988-08-22 Low voltage reference power supply circuit

Publications (2)

Publication Number Publication Date
JPH0256010A true JPH0256010A (en) 1990-02-26
JP2745553B2 JP2745553B2 (en) 1998-04-28

Family

ID=16542375

Family Applications (1)

Application Number Title Priority Date Filing Date
JP20759588A Expired - Lifetime JP2745553B2 (en) 1988-08-22 1988-08-22 Low voltage reference power supply circuit

Country Status (1)

Country Link
JP (1) JP2745553B2 (en)

Cited By (2)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
JPH02285408A (en) * 1989-03-30 1990-11-22 Texas Instr Inc <Ti> Band gap voltage reference with advanced temperature correction
WO2010058858A1 (en) 2008-11-21 2010-05-27 ラクオリア創薬株式会社 Novel pyrazole-3-carboxamide derivative having 5-ht2b receptor antagonist activity

Cited By (2)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
JPH02285408A (en) * 1989-03-30 1990-11-22 Texas Instr Inc <Ti> Band gap voltage reference with advanced temperature correction
WO2010058858A1 (en) 2008-11-21 2010-05-27 ラクオリア創薬株式会社 Novel pyrazole-3-carboxamide derivative having 5-ht2b receptor antagonist activity

Also Published As

Publication number Publication date
JP2745553B2 (en) 1998-04-28

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