JPH0254697A - Transmitter - Google Patents

Abstract

PURPOSE:To attain nonpolar wiring and transmission by an AMI system and a CSMA/CD system by providing a polarity detection circuit of a transmission signal of each transmitter and a switch deciding a reference transmitter and sending a signal between the transmitters in matching with the polarity of the transmitters. CONSTITUTION:A transmission switch 16 of a transmitter is turned on and a reference transmission interface is set. When the transmission signal sent from the reference transmission interface reaches other transmission interface, at first after the reception start of a start bit, a polarity detection circuit 17 detects the polarity. Then the positive or negative polarity is set to the transmission signal. Thus, the other transmission interface is sent or received in matching with the signal polarity of the referenced transmission interface. Thus, wiring is attained without confirming the polarity of the transmission line and a transmission error or defective transmission due to miswiring is prevented.

Description

[Detailed Description of the Invention] [Field of Industrial Application] The present invention defines a state in which either the r+J or r-J signal is output to the transmission line as a logical value "0", and the state in which no signal is output. The present invention relates to a transmission device using the AMI method in which the logical value rlJ is taken as the logical value rlJ.

[Conventional technology]

FIG. 5 is a block diagram showing a transmission interface that is a conventional transmission device KTo. In the figure, 1 is a data bus that inputs and outputs data sent and received from the host computer (not shown), 2 is a control path that determines the timing of data input and output, 3 is an address setting unit of the transmission interface, and 4 is the host computer A CPU that converts the parallel data input from the AMI into an AMI transmission signal and transmits it, converts the received data into parallel data and outputs it to the host computer, and performs transmission control such as signal collision detection and false detection. 6 is a transmitter that generates an AMI transmission signal based on the signal from the CPU; 6 is a receiver circuit that constantly monitors the transmission path and sends this signal to the CPO 5 when a transmission signal is input; 7 is an isolation circuit from the transmission path. This is a pulse transformer that performs

Further, FIG. 6 is a circuit diagram of a part of the transmission interface in FIG. 5. In the figure, 4a is a logical value “0”
The NRZ output terminal outputs "L" when the logic value is "L", and outputs the ruJ signal when the logic value is "L", and 4b outputs the ruJ signal when the logic value is "0" at the even number of times counted by the start bit in order to generate the AMI transmission signal. Only [AMI output terminal that outputs LI,
4C is a receiving input terminal into which a signal from the receiving circuit 6 is input. Also, 5a is for NRZ output terminal 4 and AMI output terminal 4b
Logic circuits 5b and 5c input the AMI transmission signal from the logic circuit 5m to generate the AMI transmission signal, transistors 6m and 6b input the AMI transmission signal from the logic circuit 5m and drive the pulse transformer 7; This is a voltage comparator which converts the logic value "O" into a signal "L" and the logic value rlJ into a signal raJ and inputs the signal to the receiving input terminal 4C. Note that R in the figure represents a resistor and D represents a diode.

Next, the operation of the transmission interface will be explained according to the flowcharts shown in FIGS. 6 and 7. First, the seventh
The figure is a flowchart showing the transmission operation in 1-bit units during transmission. When transmission of 1 bit starts (S71)
, determine whether the transmitted bit is a logical value “0” (872
). Here, if the logical value is "1", step 87
2 is No, NRZ output terminal 4a and AMI output terminal 4
"H" is output to the corresponding bit of b (873). On the other hand, in the case of the logical value rOJ, output "L" to the corresponding bit of the NRZ output terminal 4a (874), and determine the number from the start bit at which the logical value "O" is transmitted (874).
875).

Here, when the logical value "0" is transmitted at an even number from the start bit, "0" is sent to the corresponding bit of the AMI output terminal 4b.
87 (5), and when it is an odd number, AMI
Output rrxJ to the corresponding bit of output terminal 4b (8
77). Then, the NRZ output terminal 4a and the AMI output terminal 4
b is output at the same time (878).

In addition, when transmitting the logical value "1" in Fig. 6, "1" is sent to the NRZ output terminal 4h and the AMI output terminal 4h as described above.
Outputs “H”. The logic circuit 5a inputs this signal and outputs "H" to the bases of the transistors 5b and 5e via the resistor R.
Output. Therefore, both transistors 5b and 5e are turned off, and no signal is output onto the transmission path. next,
When the logical value rOJ is output as an odd number, "L" is output to the NRZ output terminal 4a.

Since H is output to the AMI output terminal 4b, the logic circuit 5&
Two signals are output, [J and rLJ, respectively,
Transistor 5b is turned off and transistor 5c is turned on. Therefore, the current in the pulse transformer 7 flows in the direction of the broken line, and a 1-'' square wave is output on the transmission path. Furthermore, when the logic value "0" is output at an even number, "L" is output to both the NRZ output terminal 4a and the AMI output terminal 4b, so the output of the logic circuit 51 is when the logic value is output at an odd number. Conversely, transistor 5b is turned on and transistor 5c is turned off. Therefore, the current in the pulse transformer 7 flows in the direction of the solid line, and a "+" square wave is output to the transmission path. On the other hand, when the receiving circuit 6 receives a signal on the transmission path, the voltage comparator 6
Since the "H" signal is input to the "-" input of one of the terminals m and 6b, KrLJ when transmitting and receiving the logical value rOJ and KrHJ when transmitting and receiving the logical value "l" are respectively input to the receiving terminal 4.
c. Then, the CPU 4 constantly monitors this human input signal, and if "L" is input to the receiving input terminal 4c when transmitting a bit with a logical value "L" (collision detection), or when the received human input signal is in the state of waiting for reception. It was configured to immediately start receiving when rLJ is input to the end 4c.

, [Problem to be Solved by the Invention] Since the conventional transmission interface is configured as described above, the transmission direction of the AMI waveform, that is, the logical value "0" K
Since the directions of the odd-numbered and even-numbered waveforms are fixed, there is a drawback that polarity occurs in the connection of the transmission line. For this reason, if the polarity is incorrectly connected during wiring work, signals will collide, leading to transmission errors and transmission failures and significantly reducing the reliability of the transmission system. In order to solve this problem, methods have been proposed to eliminate the polarity of the transmission line, such as applying frequency modulation and transmitting, but this method has the disadvantage of requiring a complex modulation/demodulation circuit and resulting in an expensive system. Furthermore, due to the time loss in one demodulation, the configuration of the collision detection reception priority method (C8MA/CD method) is unworkable at a certain transmission speed or higher, and a fundamental solution has not yet been reached.

The present invention has been developed to solve the above-mentioned drawbacks, and it uses a transmitting/receiving circuit with a simple configuration, allows non-polar wiring, and enables transmission in the AMI system and C8MA/CD system. The purpose is to obtain a transmission device that is

[Means to solve the problem]

In the transmission device according to the present invention, each transmission device is provided with a polarity detection circuit that detects the polarity of a transmission signal and a switch that determines a reference transmission device, and the reference transmission device is always allowed to transmit, and other transmission devices are always allowed to transmit. The transmission devices perform transmission between the transmission devices in accordance with the polarity of the reference transmission device.

[Effect]

By turning on the transmission switch, a polarity detection circuit provided in another transmission device receives the transmission signal sent from the reference transmission device, and starts transmission in accordance with the polarity of this transmission signal.

〔Example〕

Embodiments of the present invention will be described below with reference to the drawings.

FIG. 1 is a block diagram of a transmission interface showing an embodiment according to the present invention. In the figure, the same parts as in FIG. 5 are given the same reference numerals. 16 is a transmission switch that sets that this transmission interface is used as a reference transmission device and permits transmission; 17 is a transmission switch that determines whether the transmission interface is connected with the correct polarity with respect to the polarity of the reference transmission device; This is a polarity detection circuit for detection.

Further, FIG. 2 is a circuit diagram of a part of the transmission interface in FIG. 1. In the figure, the same parts as in FIG. 6 are given the same reference numerals. This is a polarity input terminal into which a signal from the 4dd polarity output 17 is input.

Now, the operation of the transmission interface in the above configuration will be explained. Normally, a transmission interface is installed and operated for each of a plurality of devices), and in this embodiment, one transmission interface serving as a reference and a plurality of other transmission interfaces will be distinguished and explained. FIG. 3 is a flowchart showing the transmission operation in 1-bit units during transmission.

First, as an initial setting before transmission, the timing of transmission is determined by the equipment (remote control,
Turn on the transmission switch 16 of the transmission device attached to device X, such as a controller, which performs transmission at regular intervals. In this case, one transmission interface is set as a reference, and only this transmission interface can transmit. Now, when transmission of one bit is started (831), it is determined whether the transmitted bit is a logical value rOJ (S32).

Here, in the case of the logical value "1", step 32 becomes NO, and rnJ is output to the corresponding bits of the NRZ output terminal 4a and the AMI output terminal 4b (S40, 541). Therefore, as explained in FIG. 6, when transistors 5b and 5c are off, no signal is output on the transmission path. On the other hand, if the logical value is "0", the corresponding bit KrLJ of the NRZ output terminal 4& is outputted (533), and it is determined whether the transmission switch is on (S34). Here, since the transmission switch is on, the answer is YES, and it is determined what number from the start bit the logical value rOJ is transmitted (835
). Here, when the logical value rOJ is transmitted at an even number from the start bit, the corresponding bit KrLJ of the AMr output terminal 4b is output (836, 54o), and a signal in the direction of the solid line is sent to the pulse transformer 7 in FIG. on the other hand,
If it is an odd number, output "H" to the corresponding bit of the AMI output terminal 4b 837.

540), and sends a signal in the direction of the broken line to the pulse transformer 7.

Next, when the transmission signal transmitted from this reference transmission interface reaches another transmission interface, it is determined according to the receiving operation flowchart of FIG. First, after starting to receive a start bit, polarity is set (841).

Normally, the polarity of the first signal from the reference transmission interface is undetermined, so the polarity direction is detected (
842). The series of operations for setting the polarity of the transmission signal as "normal" or "-" (843, 844) can be explained with reference to FIG. 2. For example, when the start bit is received, the pulse transformer 7 is ” signal (current) is input, rHJ,
rLJ is input to the "-" input, and as a result, [HJ is input to the polarity input terminal 4d, and the CPU 4 outputs "+".
signal and recognition. Furthermore, when a signal (current) in the direction of the transformer 7KW line is input, the opposite result is obtained.

Now, when a transmission signal is received from the reference transmission interface as described above and then transmitted from another transmission interface to the reference transmission interface again, the operation is performed according to the flowchart of FIG. 3. First, steps up to step 33 are the same as the reference transmission interface. Next, in step 34, the result is No because the transmission switch is off. Then, the polarity of the transmission signal in transmission is determined (838). Here, if the polarity is undetermined, that is, if the reference transmission interface is not activated and the polarity cannot be determined, the NR
"H" should be output to the corresponding bits of the Z output terminal 41 and the AMI output terminal 4b (840, 541), and the transistor 5b
, 5c are turned off and no signal is output to the transmission line. Also,
If the polarity is "+", as described above, it is necessary to determine which number from the start bit the logical value rOJ is transmitted.83
5), AMI output terminal 4 according to odd or even number
Output the corresponding bit KrLJ or raJ of b (
836,837°841). Furthermore, if the polarity is "-", it is determined in the same way as step 35 what number the logical value rOJ is transmitted (839), and when it is an even number, the AM
I bit output terminal 4blc[t, J should be output 836,8
41), and when it is an odd number, the AMI bit output terminal 4b
"H" is output to (837, 841).

Next, when the reference transmission interface described above receives a transmission signal transmitted from zero and one other transmission interface, it operates according to the flowchart of FIG. 4. First, in step 41 [, the polarity has already been set, so it is determined. The polarity is compared with the already set setting value and the detected polarity (845), and if the polarities are the same, reception continues as is. On the other hand, if the polarities are different, the polarity setting is set as undetermined (846), transmission is prohibited, and the polarity setting is performed again upon reception of the start bit of the next packet.

In this way, the transmission interface in this embodiment selects a reference transmission interface, and is equipped with a transmission switch that allows only this interface to transmit and a polarity detection circuit that detects the polarity of the transmission signal, so that it can be used as a reference. Transmission and reception of other transmission interfaces can be performed in accordance with the signal polarity of the transmission interface. Thereby, wiring can be performed without checking the polarity of the transmission path, and transmission errors and transmission failures due to incorrect wiring can be prevented.

〔Effect of the invention〕

As described above, the present invention includes a transmission switch that sets a reference transmission device and permits transmission, and a polarity detection circuit that detects the polarity of a transmission signal, so that the signal of the reference transmission device is Transmission between transmission devices can be performed according to the polarity. This way, you can wire without checking the polarity of the transmission line, and you can make mistakes in wiring.
This has the remarkable effect of being able to prevent transmission errors and transmission defects due to

[Brief explanation of the drawing]

FIG. 1 is a block diagram of a transmission interface showing one embodiment of the present invention, FIG. 2 is a partial circuit diagram of FIG. 1,
FIG. 3 is a flowchart showing the transmission operation in 1-bit units during transmission, FIG. 4 is a flowchart showing the reception operation, FIG. 5 is a conventional block diagram, and FIG. 6 is a partial circuit diagram of FIG. FIG. 7 is a flowchart showing the transmission operation in 1-bit units during transmission. 4...-CPU, 5"・Fist・Transmission circuit, 6...
Receiving circuit, 7...Pulse transformer, 16...Transmission switch, 17...Polarity detection circuit.

Claims (1)

[Claims] Consisting of a transmission system that controls or manages the operating status of a plurality of devices such as air conditioners, refrigerators, and lighting via a two-core transmission line, and is provided for each device, The control data and measurement data of each device are transmitted using the AMI method, and the transmission procedure is such that the transmission path is constantly monitored even during transmission, and reception begins immediately when a transmission signal from another device is detected. The transmission device is equipped with a circuit that detects the polarity of the transmission signal and a switch that sets the transmission device as a reference, and the transmission device that is set as the reference by the switch is always allowed to transmit, and other transmission devices The transmission device is characterized in that transmission between the transmission devices is performed in accordance with the polarity of the reference transmission device.