JPH0254624A - Digital/analog conversion circuit - Google Patents

Abstract

PURPOSE:To facilitate the realization of an economical low pass filter by using a digital analog conversion circuit formed so as to convert a digital signal into a primary hold waveform. CONSTITUTION:An integration device 11 is discharged for each sampling period by an internal switch 10 and always restored to the initial value. An operational amplifier 9 adds an output D' of the integration device 11 and a signal E' of zero-th hold waveform being the result of converting a digital signal B' retarded by one sampling period at a delay element 4 by means of a DAC 8 into an analog signal to obtain an output F'. Thus, an undesired harmonic component is decreased and the requirement to the low pass filter is relaxed.

Description

DETAILED DESCRIPTION OF THE INVENTION (Technical field to which the invention pertains) The present invention relates to a digital-to-analog conversion circuit, and particularly to a digital-to-analog conversion circuit having a circuit configuration that facilitates the removal of harmonic components.

(Prior art and its problems) In recent years, elements for digital signal processing have become widely available, and complex analog signal waveforms can now be easily converted into digital signals and processed digitally. Ta. In particular, it is difficult to realize non-linear conversion using only analog processing, but it has become easier to realize it using digital processing by using memory as a table. A digital-to-analog (DA) converter is a circuit that converts a signal subjected to such digital signal processing into an analog signal. Generally, the output of a DA converter has a stepped waveform and contains many unnecessary harmonic components, so it cannot be used as an analog signal as is. For this purpose, it is necessary to insert a wave reducer on the output side to remove unnecessary harmonic components. Such a system block diagram is shown in FIG. Further, waveforms of various parts in this system diagram are shown in FIG. Digital signal processor 1
The processed binary signal A is converted into an analog signal B (solid line) by a DA converter 2, and unnecessary harmonic components are removed by a low-frequency 7-channel wave generator 3 to obtain an output C.

The frequency spectrum of the stepped analog waveform B output from the DA converter 2 is shown in FIG. As shown in Figure 3, D
The output waveform B of the A converter 2 consists of a necessary frequency component a whose upper limit frequency is set to 1, and unnecessary harmonic components centered around the frequency fi12'5..., b,... In other words, the frequency component of the desired analog signal waveform C is only a.Therefore, a low frequency waveform generator 3 having characteristics as shown by the dotted line C in FIG. 3 is inserted on the output side of the DA converter 2. By doing so, unnecessary harmonic components are removed.
, are removed to obtain the desired analog signal waveform C.

This low frequency waveform generator 3 is very important, but in order to obtain the desired attenuation characteristics, there are problems such as a large number of elements and a complicated circuit. The problem is that it is expensive because it requires careful attention to its characteristics and changes over time.

(Object of the Invention) The object of the present invention is to provide a digital-to-analog converter circuit equipped with an additional circuit to alleviate the severe technical conditions imposed on a low-frequency converter connected to the output side of a conventional DA converter. It is about providing.

(Structure of the Invention) The stepped output waveform B shown in FIG. 2 of the DA converter 2 using the conventional circuit system is called a "zero-order hold waveform." On the other hand, the waveform shown by H (dotted line) in Figure 2 is obtained by sequentially connecting the highest rising level points of the step-like waveform of this zero-order hold waveform B with straight lines, and sequentially connecting the lowest falling level points with straight lines. is called the "primary hold waveform." If we look at these two frequency components on the frequency spectrum of Figures 3 and 6, in the case of stepped zero-order hold waveform B, as mentioned earlier, a, b++t)z+... in Figure 3. It consists of the ingredients of
In addition, in the case of the primary hold waveform H, a+dl+ in FIG.
The required fundamental wave component a is the same for both, but the unnecessary harmonic component is smaller in the primary hold waveform H shown in FIG. 6. This has been confirmed theoretically [for example, E, 1. “9ampled Data Control 4B” by Fury
System) 1958, John Wiley &
5ons, etc.], in order to compare the two, the ratios of the maximum amplitude value of the fundamental wave component a and the maximum amplitude value of the first harmonic (f,), which has the largest amplitude among the harmonic components, are respectively compared. Then, in the case of zero-order hold waveform B in Figure 3, 1
3dB, 26.5 for the primary hold waveform H in Figure 6.
dB, and the difference between the two is 13.5 dB. Therefore,
It is easy to see that if the output waveform of the digital-to-analog converter circuit could be made into the primary hold waveform H, unnecessary harmonic components would be reduced, and the requirements for the low-frequency converter 3 in Figure 1 could be eased. .

Unnecessary harmonic signal components other than the desired analog signal a appearing on the frequency spectrum (bl, b2°...)
and (d++dz+...) are unique to digital signals, and are called "aliasing noise."

In the present invention, by adding some circuits to the conventional DA converter, the primary hold waveform H with few harmonic components is created.
This is to realize the following.

The present invention will be explained in detail below with reference to the drawings.

An embodiment of the analog-to-digital conversion circuit according to the present invention is shown in FIG. 4, and FIG. 5 shows a time chart of signals of each part of this embodiment. The embodiment shown in FIG. 4 replaces the DA converter 2 in the overall system diagram shown in FIG.

In FIG. 4, 4 is a digital delay element or circuit with one sampling period (T=t/f). 5 is a subtracter, which calculates the difference between the input and output signals of the delay element 4. 6 and 8 are digital-to-analog converters (DAC), which operate in the same way as the DA converter 2 in FIG. 7 is an operational amplifier, to which a resistor R3 and a capacitor CI are added, and operates as an integrator 11. This integrator 11 is discharged every sampling period by an internal switch 10 so that it always returns to its initial value (zero in this embodiment). 9 is an analog adder using an operational amplifier, which converts the output D of the integrator 11 and the digital signal B' delayed by one sample period by the delay element 4 into a DAC.
Signal E of the zero-order hold waveform converted to an analog signal in step 8
' to obtain the output F'.

In FIG. 5, A' represents a digital signal input to the digital-to-analog conversion circuit of FIG. 4 according to the present invention. B' is a digital signal obtained by delaying the input signal A° by one sample time by the delay element 4. Here, the human input signal A° is delayed by 1S, and the digital signal B is delayed by 1.1 sampling period.
゛ is denoted by rsi and J. Here, S indicates a signal, and i indicates the number of the sample value. Therefore, the output E'' of the DAC 8 in FIG. 4 is the zero-order hold waveform of the signal B'', and the waveform E'' shown by the broken line in FIG.
becomes. Since the subtracter 5 is the difference between the input signal A' and the signal B° delayed by one sampling period, it becomes "Si3.-Ij," and the zero-order hold waveform converted by the DAC 6 becomes C' in Figure 5. It is easy to see that if this waveform C' is integrated and discharged by the switch 10 every sampling period at the time point shown by G in FIG. 5, the waveform shown by D' in FIG. 5 will be obtained.Therefore, Waveform E° and waveform D′ are added to analog adder 9
By adding them, the output waveform F'', that is, the primary hold waveform of the digitally processed signal S, is obtained as an output.

(Effects of the Invention) As explained in detail above, by using the digital-to-analog conversion circuit according to the present invention configured to convert a digital signal into a primary hold waveform, a digital signal subjected to digital signal processing can be converted into an analog signal. It is possible to extremely relax the technical requirements imposed on the low-frequency converter for eliminating aliasing noise, which is always used when converting, and to fully satisfy the required performance with a simple structure. This has a great effect in making it easier to realize a wave device.

￥11] Diagram

[Brief explanation of the drawing]

Figure 1 is a block diagram of an analog signal generator system using digital signal processing, Figure 2 is a signal waveform diagram of each part in Figure 1, Figure 3 is the frequency spectrum of output waveform B in Figure 2, and Figure 4 is a diagram of the signal waveform of each part in Figure 1.
5 is a block diagram showing an embodiment of the digital-to-analog converter according to the present invention, FIG. 5 is a signal waveform diagram of each part of FIG. 4, and FIG. 6 is a frequency spectrum of the output waveform of FIG. 5. 1...Digital signal processor, 2.6.8...D
A converter, 3...Low pass filter, 4...Digital delay circuit, 5...Subtractor, 7...Operation amplifier, 9...Analog adder, 10...Switch, 1
1...Analog integrator. Car 2

Claims (1)

[Scope of Claims] A delay circuit that delays a digital input signal by one sample period, a first digital-to-analog (DA) converter that converts the output of the delay circuit into a zero-order hold waveform signal, and an input of the delay circuit. a subtracter that subtracts the output side from the signal and takes a difference; a second DA converter that converts the output of the subtracter into an analog signal; and an analog signal that is reset every sampling period and is extracted as a primary hold waveform signal. It is characterized by comprising an integrator and an analog adder that adds the signal of the first-order hold waveform and the signal of the zero-order hold waveform, and converts the digital input signal into an analog output signal of the first-order hold waveform. Digital to analog conversion circuit.