JPH0252260A - Digital electric energy integrating meter - Google Patents

Abstract

PURPOSE:To reduce the cost by converting a clock of a crystal oscillator and digital value of a voltage to a frequency being in proportion to the voltage and a current respectively by two rate multipliers. CONSTITUTION:Inputs 1, 2 of the voltage and the current are converted into the digital value respectively by A/D convertors 3, 4. The output of this convertor 3 and the clock of a crystal oscillator 5 are inputted into a first rate multiplier 6, and converted here to the frequency being in proportion to a voltage input. This frequency and the output of the convertor 4 are inputted into a second rate multiplier 7 and if it is converted to the frequency being in proportion to the current then the output of the multiplier 7 is allowed to be an electric power. Although this is inputted in an up-down counter 12, before that, executing the discrimination of both effective and reactive powers at a FOR (exclusive OR) circuit 8, the output of the multiplier 7 is switched to the up side and down side by AND circuits 10, 11 and integrated. By this method, inputting it into the counter 12 then an integrated value is obtained.

Description

DETAILED DESCRIPTION OF THE INVENTION [Field of Industrial Application] The present invention relates to an integrator that digitally integrates electric energy.

[Conventional technology]

Converting voltage and current into digital quantities and integrating them is
This is possible using a microcomputer and its calculations. The microcomputer operates by reading the current and voltage converted into digital quantities by the A/D converter, multiplying them together to calculate the amount of electricity, and
Add it up to get the total amount of electricity.

When arithmetic processing is performed by such a microcomputer, multiplication and summation calculations are performed for each sampling.

[Problem to be solved by the invention]

As described above, the microcomputer must perform multiplication and sum calculations for each sampling, which becomes quite a busy process if it is necessary to perform this in parallel with other processing.

An object of the present invention is to eliminate such inconveniences and provide a digital power amount integrator that can easily perform digital processing without using a microcomputer.

[Means to solve the problem]

In order to achieve the above object, the present invention includes a first rate multiplier that receives a voltage value digitally converted by an A/D converter, and an output from the first rate multiplier and the A/D converter. a second rate multiplier receiving the digitally converted current value;
The gist of the system is that it consists of a counter that receives the output of the rate multiplier.

[Effect]

According to the invention, the crystal oscillator clock and voltage digital quantities are input to a first rate multiplier, where they are converted to a frequency proportional to the voltage. This frequency and the digital amount of current are input to a second rate multiplier where they are converted to a frequency proportional to the current.

This frequency is obtained by calculating the product of voltage and current, and by inputting this frequency to a counter, an integrated value of power can be obtained.

〔Example〕

Embodiments of the present invention will be described in detail below with reference to the drawings.

FIG. 1 is a block circuit diagram showing one embodiment of the digital power integrator of the present invention, in which 3.4 is an A/D converter;
These convert voltage input 1 and current input 2 into digital quantities, respectively.

The clock output of the crystal oscillator 5 and the output of the A/D converter 3 are introduced into a first rate multiplier allo, and the output of this first rate multiplier allo and the output of the A/D converter 4 are It is introduced into the second rate multiplier 7, and the output of this second rate multiplier is introduced into the up/down counter 12.

As is well known, a rate multiplier performs frequency conversion on a digital input, and can be easily manufactured using a counter CT and a D latch DFF, for example, as shown in FIG. FIG. 2 shows the configuration of the rate multiplier allo. The rate multiplier 7 replaces the crystal oscillator 5 in FIG. 2 with a rate multiplier,
The A/D converter 3 may be replaced with an A/D converter 4.

In addition, in order to make active power and reactive power correspond to power integration, the outputs of A/D converters 3 and 4 are
The output of this EOR circuit 8 is introduced into an AND circuit 10 via a NOT circuit 9, and directly into an AND circuit 11. 7 is introduced, and the outputs of these AND circuits 10 and 11 are input to counter 1.
I decided to introduce it in 2.

In this way, the voltage input 1 is converted into a digital quantity by the A/D converter 3, and the current input 2 is converted into a digital quantity by the A/D converter 4.

By inputting the digital output of the A/D converter 3 and the clock of the crystal oscillator 5 to the first rate multiplier, the first rate multiplier allo converts it into a frequency proportional to the voltage input. Ru.

If this frequency and the digital amount of current from the A/D converter 4 are input to the second rate multiplier and converted to a frequency proportional to the current, the output of the second rate multiplier 7 will be electric power. .

This is input to the up/down counter 12. In this case, the EOR circuit 8 discriminates between active power and reactive power, and the output of the rate multiplier 7 is input to the AND circuit 10.
．． 11, the integration is performed by switching to the up side and down side. In this way, the output of the counter 12, in which active power and reactive power can be determined based on the direction of voltage and current, becomes the amount of electric power.

〔Effect of the invention〕

As described above, the digital power amount integrator of the present invention can be created using a simple digital circuit other than a microcomputer, and can realize cost reduction.

[Brief explanation of the drawing]

FIG. 1 is a block circuit diagram showing one embodiment of the digital power integrator of the present invention, and FIG. 2 is a circuit diagram showing a rate multiplier. 1... Voltage input 2... Current input 3.4
...A/D converter 5...Crystal oscillator 6.7...
・Rate multiplier 8...EOR circuit 9...NOT circuit 10
．． 11...AND circuit 12-...Counter r C'J
(Y)U) To ω■U

Claims (1)

[Claims] A first rate multiplier receives the clock of the crystal oscillator and the voltage value digitally converted by the A/D converter, and outputs the output from the first rate multiplier and the A/D converter.
1. A digital power amount integrator comprising: a second rate multiplier that receives a current value digitally converted by a /D converter; and a counter that receives an output of the second rate multiplier.