JPH0250716A - Clock fault processing system - Google Patents

Abstract

PURPOSE:To rapidly restart normal use by providing the title system with a means for detecting a clock fault, a means for informing the clock fault to software and a means for switching a clock source by software control. CONSTITUTION:A clock fault detecting part 10 monitors clocks, and at the time of detecting the generation of a clock fault, generates the interruption of clock fault information to the software. The software knowing the generation of the clock fault from the clock fault information 20 executes the clock fault processing of a clock fault processing software 30 and generates a clock source switching instructing command 40 to a hardware in the process of the execution. A clock source switching part 50 receiving the command 40 generates a clock switching signal to a selector 70 in accordance with the contents of the command 40. After the clock is switched by the selector 70, an information processing system body 80 restarts the processing.

Description

DETAILED DESCRIPTION OF THE INVENTION [Field of Industrial Application] The present invention relates to a clock fault handling method for an information processing system, and more particularly to a clock fault handling method for an information processing system having two or more different clock sources.

[Conventional technology]

Conventional clock failure processing automatically stops the system when it recognizes some kind of failure, manually analyzes the failure, and if it determines that a clock failure is the cause, manually switches the clock source and starts the system. It was done in the way you said.

[Problem to be solved by the invention]

The conventional clock fault handling method described above cannot directly recognize clock faults and relies on manual clock switching, so it has the disadvantage that it takes time to recover when a clock fault occurs.

[Means to solve the problem]

The clock failure handling method of the present invention is applicable to an information processing system having two or more different clock sources, which includes a means for detecting a clock failure, a means for notifying software of the clock failure, and a means for detecting a clock failure by controlling the clock source by software control. and means for switching.

〔Example〕

Next, the present invention will be explained with reference to the drawings.

FIG. 1 is a block diagram showing an embodiment of the present invention. In the figure, a clock failure detection section 10 detects a clock failure. The specific configuration of the clock failure detection unit 10 is as follows.
For example, there is a method in which if the clock period deviates by a certain amount from the specified period, it is regarded as a clock failure. The clock failure notification 20 is a notification means for software, and in this example, an interrupt is used. The clock failure processing software 30 is software processing for clock failure interrupts from hardware. The clock source switching instruction command 40 is executed by the clock failure processing software 30.
issued to the hardware during processing. The clock source switching unit 50 operates according to the contents of the clock source switching instruction command 40. The clock source switching selector 70 selects one of the clock sources 61 and 62 according to the signal from the clock source switching section 50. The information processing system main body 80 is the main body of an information processing system that operates with the clock selected by the clock source switching selector 70.

FIG. 2 is a flow diagram illustrating the operation of the clock failure handling scheme. In the figure, a clock failure detection unit 10 monitors the clock, and when a clock failure occurs, an interrupt of a clock failure notification 20 is generated to software (step 101). The software that learns of the occurrence of a clock failure from the clock failure notification 20 executes clock failure processing by the clock failure processing software 30 (step 10).
2) In the process, a clock source switching instruction command 40 is issued to the hardware. The clock source switching unit 50 that receives the clock source switching instruction command 40 generates a clock switching signal to the selector 70 according to the contents of the command (step 103). After the clock is switched by the clock source switching selector 70, the information processing system The main body 80 resumes processing (step 104).

〔Effect of the invention〕

As explained above, the present invention has means for detecting a clock failure, means for notifying software of the clock failure, and means for switching the clock source under software control, thereby significantly improving system recovery time due to a clock failure. This has the effect of quickly resuming normal use.

Part 1 circle

[Brief explanation of the drawing]

FIG. 1 is a block diagram showing an embodiment of the clock failure handling method of the present invention, and FIG. 2 is a flow chart. 10... Clock failure detection unit, 20... Clock failure notification, 30... Clock failure processing software, 4
0... Clock source switching instruction command, 50...
. . . Clock source switching unit, 61. 62 . . . Clock source, 70 . . . Clock source switching selector, 80 .

Claims (1)

[Claims] An information processing system having two or more different clock sources, characterized by comprising means for detecting a clock failure, means for notifying software of the clock failure, and means for switching the clock source under software control. Clock failure handling method.