JPH0247776B2 - - Google Patents

Description

[Detailed Description of the Invention] [Technical Field of the Invention] The present invention provides a small electronic device with a data storage function in which data such as a telephone number is preset and the data is read out and displayed as necessary. Regarding equipment.

[Prior art]

2. Description of the Related Art Conventionally, various small-sized electronic devices with data storage functions have been developed that store data in a plurality of data storage sections, and read and display data arbitrarily as needed. In this type of device, data stored in a plurality of data storage sections are sequentially switched and displayed on a display section each time a display changeover switch is operated.

[Problems with conventional technology]

Therefore, as a method for sequentially reading out and displaying a large number of data stored in the data storage section for each data item each time a switch is operated,
A method is known in which all data storage areas in the data storage section are addressed, regardless of whether or not they contain data, but with this method, all the contents of the storage section where no data is stored are also addressed and displayed. This has the drawback of requiring unnecessary operations and wasting time.

Another known method is to search only the storage area where data is stored and display the contents of that storage area each time a switch is operated. Since data from one of the storage sections is always displayed every time an operation is performed, it is possible to continue searching even though the desired data is not stored without noticing that the data has been displayed all the time. There were some drawbacks.
In particular, if the search results show that the desired data is not stored, it is necessary to input and store the new data.
With the above method, it is necessary to repeat the switch operation many times to find out that the desired data is not stored, which is a waste of time.

Furthermore, there are two types of data input: one is to correct data that has already been stored, and the other is to register new data in addition to the previously stored data. However, in the above method of displaying only the stored data, since the stored data is displayed in both cases, if you input the data as is, the displayed data cannot be displayed. There was a drawback that it was difficult to judge whether to make a correction or to input new data, and there was a risk of such input.

[Purpose of the invention]

The present invention has been made in view of the above points, and
The purpose of the present invention is to provide a small electronic device with a data storage function that allows checking of already stored data in an extremely short time without unnecessary switch operations, and also allows new data to be easily entered without erroneously inputting the data. .

[Key points of the invention]

In order to achieve the above object, the present invention provides a data storage means having a large number of data storage sections for storing data consisting of a plurality of characters, and a data storage means that stores data in each of the data storage means each time a display changeover switch is operated. In a small electronic device with a data storage function, which is equipped with a display means for sequentially switching and displaying data stored in a storage section, the data of the last data storage section in which data is stored among the plurality of data storage sections is a separator display control means for causing the display means to display a separator instead of data display by the next operation of the display changeover switch when the display is displayed on the display means; After the delimited display is performed, each time the display changeover switch is operated, the display means sequentially switches and displays the data from the first data storage section in which data is stored among the plurality of data storage sections. a display control means; a data input means for inputting new data when a divided display is being displayed on the display means by operating the display changeover switch; and new data input by the data input means. and editing means for rearranging the data already stored in the data storage section of the data storage means in a predetermined order and storing the rearranged data in the data storage section of the data storage means.

〔Example〕

Hereinafter, an embodiment in which the present invention is applied to an electronic wristwatch will be described with reference to the drawings. FIG. 1 shows the external appearance of an electronic wristwatch. A display section 2 is provided in the center of the top surface of the case 1, and push-type switches S _A (+ direction search) and S _B (one direction search) are provided at the bottom for searching data such as phone numbers preset in the memory. Search) is provided. There is also a switch for setting data such as phone numbers on the right side of case 1.
S _L , number of memory used (one memory is 1 as described later)
A switch S ₁ is provided to instruct the display of the maximum number of pages) and the maximum number of pages, and a switch S ₂ is provided on the left side to specify the data read mode and write mode, and a switch S 2 to specify the clock mode and memory mode. A switch _S3 is provided for each. Inside the case 1, LSI components, batteries, etc. are arranged.

FIG. 2 shows the configuration of the display section 2. As shown in FIG. This display unit 2 consists of a liquid crystal display device, and 3 in the figure is 6
The digits are a character display section in which each digit is a dot display of 5.times.5 dots, 4 is a numeral display section consisting of Japanese character segments, 5 is a colon display section, and 6 is a PM display section. However, the numeric display section 4 shows the time, date,
A telephone number and the like are displayed, and the colon display section 5 blinks at one-second intervals in the clock mode, and the PM display section 6 is lit during the afternoon time period in the clock mode.

FIG. 3 shows the entire circuit. The reference frequency signal outputted by the oscillator 7 is divided by the frequency dividing circuit 8,
The signal is applied to the timing signal generation circuit 9. and created there. Various basic timing signals are
ROM (read only memory) 10, RAM (random access memory) 11, instruction decoder 12,
The address control unit 13 is given the address control unit 13 to drive each of them.

The ROM 10 stores microprograms that control all operations of this electronic wristwatch, and each microprogram is read out from the area addressed by the address control section 13 and executed. The operation code of the microprogram to be read out is input from the terminal OP to the instruction decoder 12, and the numerical data and address data are input from the terminal DO to the data bus to the address input terminal Addr of the RAM 11 and the address control unit 13. , are input to the input terminal DI2 of the arithmetic unit 14, and the next address data is input to the address control unit 13.

The instruction decoder 12 decodes the operation code and provides a read/write control signal to the RAM 11, and also provides a calculation command to the calculation section 14. In addition, the terminals DI1 and DI2 of the calculation unit 14 have RAM
The data read from the terminal DO of 11 is input and the calculation is executed according to the calculation command at that time. The calculation result data is then sent to the terminal DI of the RAM 11 and written therein. Further, the "0" signal and the carry signal generated by the calculation of the calculation section 14 are given to the address control section 13, so that the address of the ROM 10 can be changed based on the calculation result of the calculation section 14. In addition, the 32Hz clock clock output from the frequency dividing circuit 8 is also input to the address control section 13.
Accordingly, the address control unit 13
The address data for reading the program of the time measurement processing flow that is executed once every 32 seconds is given to the ROM 10, and the arithmetic unit 14 accordingly executes an operation to obtain new time measurement data, and the resulting data is transferred to the RAM 11. Store.

The data read from the RAM 11 is also input to the decoder 15, converted into display data, and displayed on the display section 2. In addition, the input section 16 is connected to the switch.
S _L , S _A , S _B , S ₁ , S ₂ , S ₃ and the input data from these switches is sent to the data bus.
Written to RAM11.

FIG. 4 is a configuration diagram of the RAM 11. As shown, T, D, M, L, n, N, P, S, F _SE
It has at least each register and data storage registers for 50 pages numbered 1 to 50. The T and D registers respectively store time data and date data in the clock mode. The M register is a flag register that is set to "0" in clock mode and "1" in memory mode. L
The register is a flag register that is set to "0" in read mode and "1" in write mode.
The n register is a register that stores the number of pages containing data (number of registers), the N register is a register where the maximum number of pages is set, the P register is a register where the number of display pages is set, and the S register is a register where the maximum number of pages is set.
The register is a register in which the top page of the set pages is set, and the _FSE register is an editing flag register. Data such as a telephone number is set in each of the data storage registers 1 to 50, each forming one page. In this case, up to 6 digits of alphanumeric characters and 12 digits of numbers can be set on each page.

Next, the operation of the above embodiment will be explained with reference to FIGS. 5 to 9. First, the overall operation will be explained with reference to the general flow shown in FIG. 5 and the state transition diagram shown in FIG. 8. When the arithmetic unit 14 outputs a signal of 32 Hz and supplies it to the address control unit 13, the address control unit 13 reads a timekeeping processing program from the ROM 10 and causes the arithmetic unit 14 to execute a timekeeping operation (step G ₁ ). In that case, the previous time data and date data are read from the T and D registers of the RAM 11, a predetermined value is added thereto, and new data is set in the T and D registers again.

When the time measurement process is completed, it is determined whether the switch _S3 for changing the clock mode or memory mode has been operated (step _G3 ), and if it has not been operated, the process jumps to step _G6 and the data in the M register is changed. Determine whether it is “0” or not. However, “0”
If it is, you are in clock mode, so step
Display processing is executed at _G7 , and the data in the T and D registers are sent to the display section 2 to display the time and date, as shown at A in FIG. Next, it is determined whether or not there is a predetermined interrupt process (step _G8 ), and if there is, it is executed, and if not, it waits until the next execution of this general flow.

On the other hand, if it is determined in step _G2 that the switch _S3 has been operated, the process advances to step G3 and the switch _S3 is operated.
Determine whether the data in the register is "1" or not. If it is "1", it means that it is currently in memory mode, so proceed to step _G4 and set the flag "0" to the M register.
and set the clock mode. On the other hand, “1”
If not, the clock mode is "0", so proceed to step _G5 , set "1" in the M register, and set the memory mode. Then, if the display processing proceeds to step _G7 via step _G6 , as shown in _FIG . will be displayed, and the telephone number will be displayed. Furthermore, if B's telephone number had been displayed until then, the display is switched to A's clock mode by operating the switch _S3 .

In step _G6 , if the data in the M register is not "0", that is, if it is "1" and the memory mode is set, the process advances to step _G9 ;
It is determined whether the switch _S2 for switching between the write mode and the read mode has been operated. If no operation has been performed, the process jumps to step _G14 , where it is determined whether the L register is "0" or not.
If so, it is in read mode, so step _G15
It is determined whether the editing flag register _FSE is "0" or not, and when it is "0", the process proceeds to step _G8 after executing the read process (step _G16 ). On the other hand,
If it is not "0", after executing the write process (step _G17 ), the process advances to step _G8 .

On the other hand, if the data in the L register is not "0" in step _G14 , the write mode is "1", so the program immediately proceeds to step _G17 to execute the write process.

Next, according to FIGS. 6 and 9, the step G ₁₇
The operation of the write process will be explained. When writing data, as shown in B in Figure 8, if data is displayed, first operate switch S _A or switch _B to move data storage registers 1 to 50 of RAM 11 in the positive or negative direction. Search in the direction to find an area where no data is written. At this time, first, in step _W1 , data ``51'', which is obtained by adding 1 to the data ``50'' in the N register storing the maximum number of pages ``50'', is set in the S register.

Next is P where the current number of displayed pages is set.
RAM 11 is addressed by the data in the register (step W ₂ ). Then, the presence or absence of a key input is determined (step W ₃ ), and if the switch S _A or S _B is operated, the process proceeds to step W ₄ where it is determined whether it is the switch S _L or not. Since there is, the process proceeds to step _W21 , where it is determined whether it is switch S _A or not. Ima Switch S _A
If this is the operation, the process advances to step _W22 , the P register is incremented by 1, and the register is advanced by one page.
Then, in step _W23 , the data "50" in the N register and the data in the P register are compared, and N≧P.
If so, the process returns to step _W2 . On the other hand, if N<P, the current displayed page has exceeded the 50th page, so the process proceeds to step _W24 , where the P register is set to "1" and the first page is displayed. The display page is then returned to step _W2 .

On the other hand, when switch S _B is operated, the process proceeds from step W ₂₁ to step W ₂₅ and switch S _B is operated.
The operation of P is determined, and then in step _W26 P
The register is incremented by 1 and one page is returned. And whether or not the data in the P register has become “0”,
That is, it is determined whether or not the page has reached the 0th page (step _W27 ), and if it is not the 0th page, the process returns to step _W2 ; on the other hand, if it is the 0th page, the
The data "50" of the N register is set in the register, and the 50th page is set. and step
Return to _W2 .

The data written in the page corresponding to the data in the P register which has been incremented by 1 or -1 by the above operation of switch S _A or S _B is read out from the register and displayed on the display section 2 . Then, by repeatedly operating the switch S _A or S _B , the display section 2 shows that no data (telephone number) is written in the current page of the P register, as shown in A of Fig. 9. When this is done, the operation of switch S _A or S _B is stopped. As a result, as shown in B of FIG.
A cursor is displayed at the digit. So Switch S
When you operate ``A'' once, the alpha alphabet "A" is automatically displayed in the first digit. in this case,
The operation of switch _S1 is determined by each process of steps _W3 , _W4 , _W21 , and _W25 , and then step
The character "A" is displayed by the process of _W29 , and the process returns to step _W3 .

Here, to input a telephone number, the last name and abbreviation are set within six characters in the character display section 3, and the actual telephone number is set in the numeric display section 4. However, now the surname is "SUZUKI" and the phone number is "0123-45-"
7890'', switch _S1 is operated successively until the first letter ``S'' is displayed in alphabetical order. Then, as shown in FIG. 9C, when the letter "S" is displayed, the switch S _L is operated to input that letter.

At this time, the operation of switch S _L is determined in step W ₄ , and then in step W ₅ , the S register and P
Data in registers are compared. Then, when S>P, the data of the currently displayed page of the P register is set to the S register (step W ₆ ),
The data "S" is transferred to the register of the current page of the RAM 11 (step W ₇ ), and the display cursor is moved to the next second digit (step W ₈ ), as shown in FIG. 9D. Said data “S”
is stored in the register of the current page (step W ₉ ). Then return to step _W3 . The input of other characters "UZUKI" is exactly the same, and the switch
This is done by operating S ₁ and S _L. Then, as shown at E in Figure 9, the last letter "I" appears and the switch is pressed.
When it is memorized by S _L , the cursor moves to the first digit on the upper side of the number display section 4, as shown in F in _FIG . The numbers 1, . . . , 9 are displayed in this order, so when the desired number is displayed, operate switch S _L to store it in the register of the current page. G, H, and I in FIG. 9 show this process. When you have finished entering data for one page, use switch S _A or S _B to specify the next page.
Switch the next data to the specified register S ₁ ,
It is memorized in the same way by S _L.

As described above, once you have input the required number of data into the data storage registers 1 to 50 of the RAM 11, you will no longer have to press any keys, so you can return to the steps.
Proceeding from _W3 to step _W10 , it is determined whether the editing flag _FSE is "1" or not. However, since the write process is currently being executed, the flag _FSE has already been set to " ₁ " at step _G15 in FIG. 50'' is compared. In this case, if the data input operation has been executed, the value of register P of the current display page is set in register S at step _W6 in FIG. The editing work of step _W12 is started, but if no data input operation is performed, S>N has been established since the processing of step _W1 , and this writing processing is completed.

In the editing work at step _W12 , six character data in the data in each of the 1 to 50 data storage registers are arranged in alphabetical order. When the work is completed, the editing flag F _SE is set to “0” in step _W13 .
Then, by repeating steps _W14 to _W20 , the actual number of data in the RAM 11, that is, the number n of registers 1 to 50 used is calculated.

That is, first, by steps _W1D and _W15 , data "0" is written to the N register and data "1" is written to the P register.
is set. Then, the P page of RAM 11, that is, the first page is specified (step
W ₁₆ ), and it is determined whether there is data there (step W ₁₇ ). If there is data, the n register is incremented by 1, and if not, the process proceeds to step _W19 without incrementing it by 1. And the data in the P register is N
Whether it is equal to the register data "50", that is,
It is determined whether the search for the presence or absence of data has been performed up to the 50th page, and until the 50th page is reached, the process proceeds to step _W20 , where the P register is incremented by 1 and the next page is designated. In this way, steps _W16 to _W20 are repeated 50 times to obtain the number n of registers used, and when N=P, the process ends.

Next, with reference to FIGS. 7 and 10, the read processing in step _G16 will be explained. In this case, when the data in the registers 1 to 50 are to be sequentially read and displayed, the switch S _A or S _B is operated, and when the number of used registers is to be displayed, the switch S ₁ is kept pressed.

For example, if you operate switch S _A , that operation will be determined at step _R1 , and step _R2 will be executed.
The process proceeds to step 1, and it is determined whether the data of the n register (the number of registers in which data is written) is not "0", and if n = "0", the above-mentioned 1--
Since no data is stored in any of the 50 data storage registers, the process advances to step _R7 and data display processing for the current page is performed. However, in this case, since no data has been written to this page, delimiter data indicating no data is displayed as shown in D in FIG. 10.

On the other hand, if n≠0, proceed to step _R3 and P
Compare register and n register. And P<
If n, the process advances to step _R4 , advances the currently displayed page to the next page, and displays the data of that page (step _R7 ). If P=n, proceed to step _R4 and check whether the data in the n register is equal to the data "50" in the N register, that is, 1 to 5.
Determine whether data has been written to all registers of 0. If data has been written to all pages ("YES"), proceed to step _R6 and change the current display to 1. Return to the page and display the data (step R ₇ ). If there is an empty page ("NO"), proceed to step _R5 to specify the next page and display its data (step R5).
_R7 ). Further, when P>n, the process advances to step _R6 , returns to the first page, and displays the data (step _R7 ).

In this way, each time switch S _A is operated, the necessary steps _R1 to _R7 are executed based on the relationship between the currently displayed page and the number of n registers used, and the next page is sequentially executed. If specified, that data will be displayed. 10th
A→B→C→D→A→... in the figure shows this situation, for example, 1 to 2 of registers 1 to 50.
Assuming that data has been written in the registers up to 0, and that the P register has page 3 when this read process is started, first,
The third page of data is displayed, and then the switch is pressed.
Each time you operate S _A , 4, 5, 6, ...19, 20
Each data of the page is displayed, and when the 21st page has no data written, the delimited data of no data is displayed as shown in D in FIG. 10.
Then it goes back to page 1, 1, 2, 3, 4...
Each piece of data on 20 pages is displayed, and then the process from displaying no data on page 21 to returning to page 1 is repeated.

In this way, in the data read process, the data written by the operation of switch S _A is displayed sequentially, and the delimiter display is
Since the process is repeated once and returns to the data display again, desired data can be searched with a simple operation.
Also, if the desired data has not been written in the above search, that data will be newly written, but when the above separator is displayed after all data is displayed, the switch If you enter the write process by operating _S2 , an area with no data has already been specified in the separator display above, so search for an area with no data by operating the write process switches S _A and S _B (see Figure 6). Steps W ₂₁ to W ₂₈ ) can be omitted. In addition, in read mode, the display section displays delimiters that are not data, then enters write mode and inputs data, so it is clearly recognized that new data is being written, rather than data being corrected, thereby preventing malfunctions. I can do it.

Note that switch S _B uses RAM, contrary to switch S _A.
Since this is a switch that addresses 11 in the negative direction, each process of steps R ₈ to _{R 14} is self-evident, so a description thereof will be omitted.

Next, when you want to know the number of registers used, press switch _S1 .
For example, as shown in E in the figure, 27/50 is displayed. However, in this case, "27" indicates the number of registers used, and "50" indicates the maximum number of pages.

That is, when switch S ₁ is pressed, step R ₁ ,
The process advances to step _R15 via _R8 , and the pressing operation is determined. Then, the number display process (step R ₁₆ ) as shown in FIG. 10E is performed.

Although the number of used pages is displayed in the above embodiment, the number of remaining pages may be displayed. In addition, when data is read out sequentially for each switch operation, in the above embodiment, when the last data of the data written in the data storage registers 1 to 50 in alphabetical order is read out and displayed, the data is stored in the next register. We have displayed delimited data to show that it has not been written, but in addition to this, for example, data is currently being stored in registers 1 to 10.
If the data in register 5 is displayed first after switching to memory mode, each switch operation will change the data from 5 → 6 → 7 → 8 → 9 → 10 → 1 → 2 → 3 → 4 →
The delimited data may be displayed as delimited data → 5 → 6 → . . . . Furthermore, it goes without saying that the arrangement order performed when editing data is not limited to alphabetical order. Further, the present invention is applicable not only to electronic wristwatches but also to any small electronic device having a memory.

〔Effect of the invention〕

As explained above, in this invention, after all the data is displayed, a separate display different from the data is displayed, so that new data can be input and data edited immediately in this separated display state. It has the advantage of allowing quick and reliable data entry.

[Brief explanation of the drawing]

FIG. 1 is an external view of an electronic wristwatch according to an embodiment of the present invention, FIG. 2 is a configuration diagram of the display section 2, FIG. 3 is a circuit configuration diagram, FIG. 4 is a configuration diagram of the RAM 11, and FIG. Figure 6 is a diagram showing the write processing flow, Figure 7 is a diagram showing the read processing flow, Figure 8 is a diagram showing the transition between clock mode and memory mode, and Figure 9 is a diagram showing the write mode transition. FIG. 10 is a diagram showing state transition in read mode. 2...Display section, 3...Character display section, 4...Numeric display section, 7...Oscillator, 8...Frequency dividing circuit, 9...
Timing signal generation circuit, 10...ROM, 11
... RAM, 12 ... Instruction decoder, 13 ... Address control section, 14 ... Arithmetic section, 15 ... Decoder, 16 ... Input section, S ₁ , S ₂ , S ₃ , S _A , S _B , S _L
...Switch.

Claims (1)

[Claims] 1. A data storage means having a large number of data storage sections for storing data consisting of a plurality of characters, and each time a display changeover switch is operated, the data stored in each data storage section of the data storage means is sequentially switched and displayed. In the small electronic device with a data storage function, when the data of the last data storage unit in which data is stored among the plurality of data storage units is displayed on the display unit, a separator display control means for causing the display means to perform a separator display instead of data display by the next operation of the display changeover switch; and after the separator display is performed by the separator display control means, the display switching switching display control means for causing the display means to sequentially switch and display data from the first data storage section in which data is stored among the plurality of data storage sections each time a switch is operated;
a data input means for inputting new data when a divided display is being displayed on the display means by operating the display changeover switch; and new data input by the data input means and the data storage means. 1. A small electronic device with a data storage function, comprising editing means for rearranging data already stored in a data storage section of the data storage section in a predetermined order and storing the rearranged data in the data storage section of the data storage section.