JPH0247706B2 - - Google Patents

Description

DETAILED DESCRIPTION OF THE INVENTION The present invention relates to an electronic multi-phase watt-hour meter, and more particularly to a multi-phase watt-hour meter that eliminates offset voltage errors that affect light loads.

As shown in Figure 1, a conventional electronic watt-hour meter consists of a time-sharing multiplier circuit 1 that calculates power, and a power-frequency converter 2 (hereinafter referred to as a V-F converter) that converts the power into a frequency proportional to the power. ). This time-division multiplier circuit 1 is a pulse width modulation circuit that performs pulse width modulation using a voltage signal e _v proportional to the load voltage of a power supply line to convert the magnitude of the voltage signal into a pulse width duty cycle signal D. 3, a switch S which is controlled to open and close by the duty cycle signal D and which introduces a voltage signal e _i proportional to the consumption current when closed, and this voltage signal e _i
It is comprised of an operational amplifier 4, a low-pass filter 5, etc., which outputs an output voltage e _p in response to a supply of voltage e p.

In such a power meter, when a switch S is opened and closed in response to a duty cycle signal D output from a pulse width modulation circuit 3 and a voltage signal e _i is supplied to an arithmetic amplifier 4, the output section of the amplifier 4 receives e. _p =D・e _i =e _v・e _i Thus, a voltage proportional to power consumption is obtained. This output voltage e _p is applied to the V-F converter 2, where it is converted into a frequency proportional to the electric power, and then this frequency signal is counted by a counter (not shown) to obtain the integrated electric energy.

However, with the configuration of the watt-hour meter as described above, when the load is light, that is, when only 1/30 or 1/50 of the current consumption is flowing compared to the rated power of the watt-hour meter, the offset voltage is lowered by the operational amplifier 4 and the V-F converter 2. occurs, and this is a major cause of error.

The drift error will be explained in more detail below. In general, electricity meters are treated as absolute errors relative to the measured true value, rather than relative errors relative to the full scale (rated), and their accuracy is
100%), 1/30 (3.33%) input, 1/50
(2%) input, 1/100 (1%) input, etc. For example, a voltage signal proportional to the current consumption
Assuming that the rating of e _i is 5V and allowing an error of up to 0.5% at 100% rating, this corresponds to 25mV in terms of input. Therefore, for a 1//50 input, a permissible absolute error of 0.5% corresponds to 0.5mV in terms of input. This means that to keep the error within 0.5% at 1/50 input, it is necessary to suppress the offset voltage to within 0.5mV.

However, with the configuration of the electricity meter as shown in FIG. 1, it is extremely difficult to suppress the offset voltage generated in the operational amplifier 4 and the VF converter 2 to 0.5 mV.

Furthermore, conventionally, in order to convert electric power into an accurate frequency, a VF converter 2 has a configuration as shown in FIG. 2. This includes a polarity inversion circuit 6 that inverts the polarity of a voltage signal e _pp (a voltage signal proportional to instantaneous power) which is the product of e _v and e _i , and a hysteresis circuit connected to an integrator circuit 7 via a switch S at the subsequent stage. It is connected to a comparator circuit 8 having characteristics. In other words, in order to obtain an accurate frequency, the V-F converter 2 shown in FIG. The output polarity is reversed and the switch S is selectively closed to introduce a voltage proportional to the instantaneous power.

However, in this V-F converter, the polarity inverting circuit 6 in the previous stage generates an inherent offset voltage when the load is light, and this causes a large error, especially in a device such as a watt-hour meter that handles with absolute error rather than full-scale accuracy. This appears as follows, and high accuracy cannot be achieved under light loads.

The present invention has been made in view of the above-mentioned circumstances, and it obtains signals having equal absolute values and opposite polarities at each multiplication stage of voltage signals proportional to the load voltage and current consumption of the power supply line, respectively. By polyphase addition of the signals of e _pP , eo _N
In this way, offset drift is ignored and measurement errors are significantly reduced over the entire range from light loads to rated power, allowing for highly accurate measurements of polyphase power. It provides a meter.

Embodiments of the present invention will be described below with reference to the drawings. FIG. 3 is a diagram showing, for example, the configuration of a balanced three-phase watt-hour meter, and in this case, it is necessary to extract voltage signals e _pP and e _pN proportional to the instantaneous power from each of the two phases. Note that these voltage signals e _pP , e _pN
Since the two phases of the extraction means have the same configuration, one phase will be specifically explained, and detailed explanation of the other phase will be omitted. In the figure, e _v1 is a voltage signal proportional to the load voltage of the power supply line, and this signal e _v1 is pulse width modulated by a pulse width modulation circuit 11 and converted into a pulse width duty cycle signal D.
12 is an inverter circuit, and S ₁ to S ₄ are analog switches, among which a positive voltage signal +e _i1 proportional to the consumption current is applied to switches S ₁ and S ₂ , and a positive voltage signal +e i1 proportional to the consumption current is applied to switches S ₃ and S ₄ . Introduce a proportional negative polarity voltage signal - e _i1 . Switches S ₁ , S ₂ , S ₃ and S ₄ constitute a first switch group. The voltage signals +e _i1 and -e _i1 proportional to the consumed current are generated by using a transformer 20 as shown in Fig. 4, for example, by grounding the intermediate tap of the secondary winding, and having equal absolute values and phases from both ends of the winding. Extract as an AC signal with a 180° difference. The duty cycle signal D controls the opening and closing of the switches S ₁ and S ₃ , and the duty cycle signal inverted by the inverter circuit 12 controls the opening and closing of the switches S ₁ and S _4, respectively. The switches _S1 to _S4 are normally semiconductor switching elements, and are closed when the signal D is "1" and open when the signal D is "0". Furthermore, the output parts of switches S ₁ and S ₃ are commonly connected to a low-pass filter consisting of a resistor R _1P and a capacitor C _1P , and similarly the output parts of switches S ₂ and S ₄ are connected in common to a resistor R _1N and a capacitor C 1P.
Connected to a low pass filter consisting of C _1N .
Therefore, with the above configuration, the voltage signal +
e _i1 , -e _i1 are pulse width modulated by the pulse width modulation circuit 11 and the pulse width duty cycle signal D,
Switches S ₂ and S ₃ and switches S ₁ and S ₄ are controlled to open and close alternately at D, and as a result, a DC signal e _pP , which has the same absolute value and different polarity between positive and negative, is passed through a low-pass filter.
e _pN can be obtained. The DC signals e _pP and e _pN are the product of the voltage signals e _v1 and e _i1 , that is, voltage signals proportional to the instantaneous power. Similarly, a DC voltage signal proportional to the product of e _v2 and e _i2 is extracted from the other phase, and the voltage signals extracted from these two phases are added and synthesized to obtain e _pP and e _pN . It is.

Furthermore, the output parts of the plurality of low-pass filters are connected in common via analog switches S _a and S _b, respectively, and a resistor R ₂ and a capacitor are connected to this common connection.
A comparator circuit 14 with hysteresis characteristics is connected via an integrating circuit 13 having _C2 . These integrator circuit 13 and comparator circuit 14 are V-F
Configure the converter. This comparator circuit 1
A part of the signal obtained at the output side of the comparator circuit 14 is used as an opening/closing control signal for the analog switches S _a and S _b , and is also fed back to the negative input section, which is the other input section of the comparator circuit 14 . 15 and 16 are inverter circuits. That is, the comparator circuit 14 is the integrator circuit 13
Each time the output voltage reaches a certain voltage, it is inverted and output, whereby the switches S _a and S _b are alternately closed and the voltage signals e _pP and e _pN are selectively introduced into the integrating circuit 13 . In this case, the output of the integrating circuit 13
The time for e _Q to reach a constant value is proportional to the magnitudes of e _pP and e _pN , and it is possible to accurately determine the frequency _p that is proportional to the power.

The operation of the watt-hour meter shown in FIG. 3 will be described in detail below. The pulse width modulation circuit 11 is a voltage signal
e _v1 is pulse width modulated to obtain a pulse width duty cycle signal D proportional to the voltage signal e _v1 . now,
As shown in Figure 5, if the interval of the logic signal "1" is t _a and the interval of the logic signal "0" is t _b , then if we look at the vicinity of e _v1 = OV, then for a duty cycle signal D of 50%, t _a = t _b . If the voltage signal e _v1 is positive then t _a
<t _b , and when the voltage signal e _v is negative, t _a >t _b .

And this duty cycle signal D,
Expressed as a formula, D=t _a /T= _er −e _v1 /2e _r (1) =t _b /T=e _r +e _v1 /2e _r (2). Here, e _r is the reference voltage of the pulse width modulation circuit 11. Therefore, in Fig. 3, if the duty cycle signal controls the opening and closing of switches S ₁ and S ₄ , and the duty cycle signal D controls the opening and closing of switches S ₂ and S ₃ , the output section of the low-pass filter consisting of a resistor and a capacitor will have the following output. The voltage signals e _pP , e _pN shown in
is obtained.

e _pP = e _i1・+(−e _i )・D = e _i1 e _r +e _v1 ／2e _r +(−e _i1 e _r −e _v1 ／2e _r ) =e _i1・e _v1 ／e _r ...( 3) e _pN =e _i1・D+(−e _i1 )・=e _i1 e _r −e _v1 ／2e _r +(−e _i1 e _r +e _v1 ／2e _r ) =−e _i1・e _v1 ／e _r … ...(4) In other words, the voltage signals e _pP and e _pN are positive and negative DC voltages (positive and negative DC voltages proportional to the instantaneous power) with different polarities and the same absolute value, respectively. One more
In the two phases, e _pP and e _pN can be obtained using the same method. Therefore, in the case of a balanced three-phase three-wire watt-hour meter, it has two pulse width modulation circuits 11, 11,
A first switch group S ₁ to S ₄ and a second switch group S ₁ introduce voltage signals e _i1 , e _i2 proportional to the current consumption of each phase with the output of the duty cycle signal.
~Open and close _S4 , add and synthesize using a low-pass filter.
e _pP and e _pN are obtained.

On the other hand, switches S _a and S _b operate asynchronously with switches S ₁ to _{S 4} . Now, if R _1P = R _1N ≪R ₂ , then
By opening and closing switch S _a or S _b , both switches S _a ,
As the voltage signal e _n of the common output section of S _b , voltage signals of e _pP and e _pN are obtained alternately.

Next, the case of converting the voltage signals e _pP and e _pN into frequencies will be explained with reference to FIG. 6. As is clear from the figure, switch S _a is closed in interval t _c , and switch S _b is closed in interval t _d (see Figure 6b).
The common output section of switches S _a and S _b alternately receives voltage signals.
e _pP and e _pN are obtained and supplied to the integrating circuit 13. On the other hand, a reference voltage e _c =±e _p /2 is applied to the comparator circuit 14 for comparison.

That is, a voltage of e _c =-e _p / ₂ is applied to the negative input portion of the comparator circuit 14 in the interval t c and a voltage of e _c = + e _p /2 in the interval t _d .

Therefore, when the voltage signal e _pP is supplied to the integrating circuit 13 in the interval t _c , the integrated output e _Q of the circuit 13 decreases from +e _p /2 (see FIG. 6c). When this integral output e _Q reaches -e _p /2, the comparator circuit 14 performs an inversion operation. Here, it switches to section _td .

In this interval t _d , the voltage signal e _pN is
is supplied to In this case, the output of the integrating circuit 13 starts to rise from -e _p /2 as shown in FIG. 6c.

Then, when the integral output e _Q reaches +e _p /2, the comparator circuit 14 is inverted. At this point, the section again
I will return to t _c .

Therefore, the inversion period of this comparator circuit 14
T _f is, T _f =t _c +t _d =e _p・R ₂ C ₂ /e _pP +e _p・R ₂ C ₂ /e _pN =2e _p・e _r・R ₂・C ₂ /e _il・e _v1 +e _i2・e _v2 ...(5), and the output frequency ₀ of the comparator circuit 14 is
From equation (5), f ₀ =1/T _f =e _i1・e _v1 +e _i2・e _v2 /2e _p・e _r・R ₂・C ₂ . Here, since e _p and e _r are each constant reference voltage, the output frequency ₀ is e _i1・e _v1 + e _i2・e _v2
That is, the value is proportional to the current consumption of the power supply line, and by counting this with a counter, the integrated power amount can be obtained.

Therefore, if you configure the electricity meter as described above,
At each multiplication stage of voltage signals proportional to the load voltage and current consumption of the power supply line, signals having equal absolute values and opposite polarities are obtained, and these signals are multiphase synthesized to obtain e _pP , e _pN Since the offset voltage can be ignored, an accurate amount of power can be obtained even under light load.

Next, we will discuss the offset voltage error at light loads. First, since the watt-hour meter shown in FIG. 3 does not have a polarity reversal circuit like that shown in FIG. 2, its inherent offset voltage is eliminated. However, as in the conventional case, there are concerns about the offset voltages of the integrating circuit 13 and the comparator circuit 14. In this case, in the integrating circuit 13, the offset voltage e _pS1 remains in the capacitor _C2 as an initial value, but as shown in FIG. In the integral output e _Q , the time errors of the positive direction integration and the negative direction integration cancel each other out, and therefore only a small second-order error appears. Therefore, depending on the offset voltage,
Although t _c and t _d change, the period T hardly changes.

Regarding the offset voltage of the comparator circuit 14, although the level of the comparison voltage itself changes as shown in FIG.
Since it is determined by e _p , it is not affected by offset voltage. In Fig. 8, ○C is the integral process when there is no offset voltage error, and ○D is the integral process with offset voltage e _pS2 , which is (+e _p /2 + e _pS2 ) - (-e _p /
2 +e _pS2 )=e _p . In this manner, even when the load is light, the circuit of this configuration does not cause any errors due to the offset voltages of the circuits 13 and 14.

In addition, in FIG. 3, a transformer 20 with an intermediate tap is used to generate a voltage signal ±
e _i1 , ±e _i2 are obtained, but as shown in Fig. 9, the voltage signals ±e _i1 , ±e _i2 are switched by using a transformer 20 without an intermediate tap in _the secondary winding _. and low-pass
It is also possible to extract them as e _pP and e _pN through a filter. However, in this configuration, e _pP ,
e The amplitude of _pN is 1/2 smaller than that in Figure 3.

Moreover, contrary to FIGS. 3 and 9, voltage signals ±e _i1 and ±e _i2 proportional to the consumption current are guided to the pulse width modulation circuit 11, and signals e _v1 and e _v2 proportional to the load voltage are sent to the switch group. It is clear that equivalent functions can be obtained even if the configuration is introduced in S ₁ to _{S 4} .

As described in detail above, according to the present invention, at each multiplication stage of two signals proportional to the load voltage and current consumption, the section voltages e pP , which have the same absolute value and different polarities, e _pP ,
Since e _pN is obtained through a transformer and a group of switches and introduced into the subsequent integration circuit and hysteresis characteristic comparator circuit, its inherent offset voltage can be ignored by eliminating the polarity inversion circuit. In addition, offset drift, which is variation in offset voltage, can also be reduced. Furthermore, by offsetting the offset voltage of an integrating circuit, etc., it is possible to obtain an accurate amount of power even when the load is light.

[Brief explanation of drawings]

1 and 2 are configuration diagrams of a conventional watt-hour meter, FIG. 3 is a configuration diagram showing an embodiment of a polyphase watt-hour meter according to the present invention, and FIG. 4 is a voltage signal shown in FIG. 3. A diagram showing an example of a configuration for extracting +e _i1 and -e _i1 , Figures 5 and 6 are diagrams explaining the operation of the watt-hour meter shown in Figure 3, and Figures 7 and 8 are diagrams showing an integration circuit and a comparator. FIG. 9, which is a diagram for explaining the offset voltage of the circuit, is a configuration diagram for explaining another embodiment of the present invention. e _v ...Voltage signal proportional to the load voltage of the feeder line,
e _i ...Voltage signal proportional to the current consumption of the feeder line, 1
1...Pulse width modulation circuit, D...Duty cycle signal, _S1 to _S4 ...First switch group, S _a ,
S _b ... second switch group, R _1P −C _1P , R _1N −C _1N
...Low-pass filter, 13...Integrator circuit, 1
4...Comparator circuit.

Claims (1)

[Claims] 1 A bipolar first duty cycle signal is generated by performing pulse width modulation with a first signal proportional to the load voltage of the feeder line of a certain phase or a second signal proportional to the consumption current of the feeder line of the certain phase. and a third signal proportional to the load voltage of the feeder line other than the certain phase or a fourth signal proportional to the consumption current of the feeder line other than the certain phase. a second pulse width modulation circuit that obtains a bipolar second duty cycle signal; and a first duty cycle signal output from the first pulse width modulation circuit that controls a first switch group. a first multiplier circuit that converts the second signal or the first signal introduced into the switch group into DC voltages having equal absolute values and different polarities through a pair of low-pass filters by controlling opening and closing; The second duty cycle signal output from the second pulse width modulation circuit controls the opening and closing of the second switch group, and the fourth signal or third signal introduced into this switch group is controlled by a pair of low-pass signals. a second multiplier circuit that converts the outputs of the first and second multiplier circuits into DC voltages that have the same absolute value and different polarities through a filter; A switch circuit that alternately outputs DC voltages with different polarities obtained from the above circuit, and a switch circuit that double-integrates the DC voltage taken out from this circuit, and when this integrated output reaches a predetermined positive or negative voltage, reverses the polarity and outputs it. And this output drives the switch circuit V-
A multiphase watt-hour meter characterized by comprising an F converter.