JPH0247173B2 - - Google Patents

Description

DETAILED DESCRIPTION OF THE INVENTION The present invention relates to a busbar protection relay for detecting a busbar fault in a power system.

A conventional device of this type is shown in FIG. In the figure, 1 is a bus bar, 2-1 to 2-n are power transmission lines connected to bus 1, current transformers (hereinafter abbreviated as CT) installed at the terminals of transformers, etc., 3-1 to 3-
n is an input device for taking out an output signal proportional to the secondary current of CT2-1 to CT2-n, and is composed of the following items. That is, 4 and 5 are transformers, transformer 4 is called a differential transformer, and transformer 5 is called a suppression transformer. 6 is a resistor, 7 is a full-wave rectifier circuit, and the portion consisting of the transformer 5, resistor 6, and full-wave rectifier circuit 7 is called a suppression output circuit.

CT2 of each line of all transmission lines connected to bus 1
-1 to 2-n have an input device with the same configuration as input device 3-1, and subsequent input devices 3-2 to
It is indicated by 3-n. 8 is a bus protection relay, which is composed of the following items. That is, 9 and 10 are transformers, transformer 9 is a differential transformer, and transformer 10
is called a suppression control transformer. 11 and 12 are full-wave rectifier circuits, 13 to 16 are resistors, 17 is a capacitor, and 18 is a level detection circuit.

Next, the operation will be explained. Input device 3-1~
All the output signals of the differential transformer 4 built in 3-n are connected in parallel, and this output signal (hereinafter referred to as differential current) is sent to the transformer 9 of the bus protection relay 8,
Each of the 10 primary windings is introduced into a series circuit. Next, all the output signals of the built-in suppression output circuit are connected in parallel to the input devices 3-1 to 3-n, and this output signal (hereinafter referred to as suppression voltage) is applied to the resistor 1 of the bus protection relay 8.
Introduce it at both ends of 4. With the above circuit configuration, the differential current introduced into the transformers 9 and 10 is calculated as CT2-1 to CT2-n so that Kirchhock's first law is satisfied.
Since the total current transformation ratio is made to be the same for all lines in transformer 4, it is zero during normal times and when a fault occurs outside the bus, and when a fault occurs inside the bus, the current becomes proportional to the fault current, which is the basic value for bus fault detection. This is the result. The above principle holds true in CT2-1
~2-n or transformer 4 is not saturated, but due to an external fault on the bus, a large current can cause CT2-1 to CT2-2-n
If the current passes through CT2-1 to CT2-n, the differential current may not become zero due to saturation of CT2-1 to CT2-n. This situation will be explained with reference to FIG.

In FIG. 2a, ΣI _IN is the sum of the current flowing into the bus, and in FIG. 2b, I _OUT represents the current waveform flowing out from the bus toward the external fault point. CT2
-1 to 2-If n is not saturated, the current I _OUT is the second
The magnitude is the same as ΣI _IN in Figure a, only the phase is different by 180°, but in the example shown in Figure 2 b, the external fault end
This shows a case where CT2-1 to CT2-2-n are saturated and the voltage I _OUT becomes extremely small midway through. Therefore, the vector current composite value I _D of the currents ΣI _IN and I _OUT is applied to the transformers 9 and 10 of the bus protection relay 8 as the waveform shown in Figure 2c, and this is called the error differential current. It's going to happen. If CT2-1 to 2-n or transformer 4 are not saturated, the differential current I _D at the time of an external fault will be zero as described above, so there will be no malfunction, but in reality, as shown in Figure 2, CT saturation occurs. Therefore, countermeasures are required. Conventionally, the following countermeasures have been taken: The suppression output signal derived via the transformer 5, resistor 6, and full-wave rectifier circuit 7 of the input devices 3-1 to 3-n is CT2.
It is a full-wave rectified voltage proportional to each secondary current of CT2-1 to CT2-n of each line, and since all lines are connected in parallel, the voltage proportional to the secondary current of CT2-1 to CT2-n of each line is the highest It uses a maximum value suppression method that derives an output signal proportional to a large current. Therefore, at the time of an external fault, the current value at the external fault end is the largest, so it can be considered that the current value is proportional to this. This suppression voltage | E _T |
is introduced across the resistor 14 of the bus protection relay 8,
Furthermore, the suppression voltage |E _R | shown in FIG. 2d is derived across the resistor 16 via the resistor 15.

On the other hand, error current due to saturation of CT2-1 to 2-n
I _D flows into the transformer 9, and an output proportional to this is generated across the resistor 13 via the full-wave rectifier circuit 11 as an operating voltage |E _O |. The busbar protection relay 8 operates when the operating voltage |E _O | becomes greater than the _suppression voltage | _ER
The suppression output voltage value is set to be sufficiently larger than the operating voltage |E _O | due to the error current _ID of n.
In order to prevent malfunctions due to external accidents, it is advantageous for this suppression voltage |E _R | to be as large as possible.
If this is too large, there is a risk that it will not work in the event of an internal accident, so as a countermeasure,
0, a suppressing control voltage |E _P The suppressing force is controlled so that the suppressing voltage generated at both ends is not transmitted to the resistor 16. The problem with this circuit is that when an external fault occurs, CT2-1 to CT2-2-n are saturated and an error differential current is generated, and when the suppression control voltage |E _P | occurs, the suppression voltage |E introduced into the resistor 14 The point is that _T | is not canceled by the suppression control voltage |E _P |, but this is taken care of as shown in FIG.

As mentioned above, the suppression voltage derived from the input devices 3-1 to 3-n is proportional to the maximum of the CT secondary currents, so in the event of an external fault, it will be proportional to the secondary current of the external fault terminal CT. This results in an output signal proportional to the waveform I _OUT shown in FIG. 2, which is applied to both ends of the suppression input resistor 14 of the bus protection relay 8. Also, since the error differential current due to CT saturation is the difference between the sum of the inflow current and the outflow current, it becomes the current waveform I _D shown in Fig. 2c, which is generated by the operation output transformer 9 of the bus protection relay 8 and the suppression control transformer 10. flows to In such a state, the voltage |E _R | generated across the suppression output resistor 16 is equal to the voltage across the resistor 14 |E _T |(current I _OUT
(voltage proportional to ) to voltage across resistor 15 | E _P
|(voltage proportional to current _ID ), and this waveform becomes like the voltage waveform |E _R | in FIG. 2d. Note that the shaded part of this voltage waveform |E _R | is the effect of the capacitor 17, and the error differential current I _D
This is to maintain the suppressed output voltage |E _R | during the period in which it is occurring.

Conventional busbar protection relays are configured as described above, so if an instantaneous voltage is applied across the suppression output resistor 16, the suppression force will continue for a long time due to the influence of the capacitor 17, so in the event of an internal busbar accident, We must prevent this from happening. Therefore, in the past, _the terminal suppression voltage that occurs in the event of an internal fault in the busbar |E _T |, that is, the voltage across the resistor 14 and the suppression control voltage |E _P | is more voltage | E _T |
This has the disadvantage that this adjustment is very complicated, as it is made to occur earlier. The effect of this drawback is most noticeable when there is a phase difference between the currents flowing in from each transmission line during a bus fault. Conventionally, adjustments have been made so that there is no problem in practice, but There are limits to its performance. This limit state is shown in FIG. In Fig. 3a, the current waveform I _T1 ,
I _T2 is the secondary current waveform of each CT flowing into the bus bar, current waveform I _D is the differential current, which is the vector composite value of currents I _T1 and I _T2 , and voltage waveform |E _T | in the same figure b is the current I _T1 ,I _T2
The output voltage proportional to the output voltage is full-wave rectified, and its maximum value is extracted and introduced into the resistor 14 of the bus protection relay 8 as a suppressing input voltage. Figure c, d
The voltage waveforms |E _D |, |E _P | are full-wave rectified voltages proportional to the differential current _I
It represents the voltage waveform generated at both ends of . Therefore, the voltage |E _R | generated across the resistor 16 is the difference between _the voltage |E _T | and the voltage |E _P |, so the _waveform is as shown in FIG. This is amplified by an appropriate constant and becomes a voltage waveform |E _R | as shown in FIG. 3(f). Note that the shaded area is due to the effect of the capacitor 17. As explained above, if the limit state as shown in FIGS. 3a to 3f occurs in the event of an internal accident, the conventional bus protection relay 8 will malfunction.

This invention was made in order to eliminate the drawbacks of the conventional ones as described above, and it improves the suppression control circuit so that unnecessary suppression voltage is not generated in the event of an internal bus fault, and eliminates the need for precise time coordination. It is an object of the present invention to provide a busbar protection relay that can reliably achieve its purpose, prevent malfunctions, and ensure high performance characteristics with a simple configuration.

DESCRIPTION OF THE PREFERRED EMBODIMENTS A busbar protection relay device according to an embodiment of the present invention will be described below with reference to the drawings. FIG. 4 shows a principle circuit diagram of the busbar protection relay device of this embodiment. In Fig. 4, 18-1 and 18-2 are level detection circuits, 1
9 is a transformer with a tertiary coil, 20, 21, and 25 are all resistors, 22 is a capacitor, 23 and 24 are diodes, 28 is a signal extension circuit, and 26 is a
The NOT circuit and 27 are an AND circuit. Components other than the above are the same as the reference numerals shown in FIG. 1, and the same reference numerals in the figure indicate the same or corresponding parts.

The transformer 19 corresponds to the conventional transformers 9 and 10, and outputs an output proportional to the differential current _ID input to the primary coil 19a to the secondary coil 19b and the tertiary coil 19c. The differential current is generated by the resistor 20 connected to the secondary coil 19b of the transformer 19.
A detection voltage E〓 _O proportional to I _D is derived, rectified by a full-wave rectifier circuit 11, and passed through a resistor 13 to generate a voltage |
It is derived as the operating output current |I _O | proportional to E _O |.

A voltage |E P | proportional to the voltage E _O is generated in the tertiary coil 19c of the transformer 19, and this is rectified by the diode 23, and the voltage |E _P | is generated through the resistor 15.
Obtain a current |I _P | proportional to E _P |. Furthermore, the terminal voltage E _P of the tertiary coil 19c of the transformer 19 is introduced into a phase shift circuit 29 composed of a resistor 21 and a capacitor 22, and is applied between the midpoint between the resistor 21 and the capacitor 22 and the midpoint tap of the tertiary coil 19c of the transformer 19. The output voltage KE _P <θ=E _P ′ (K is a constant, <θ
represents the phase angle between E _P and E _P ′), which is rectified by the diode 24 and then converted to a voltage via the resistor 25 |
Obtain the current |I _P ′| in proportion to E _P ′|. On the other hand, the resistor 16 is connected to input devices 3-1 to 3-3 as shown in FIG.
A suppression voltage |E _T | derived from n is applied, and a current |I _T | proportional to this voltage |E _T | is obtained.

With the above circuit configuration, the level detection circuit 18-1 outputs an output signal _S1 if the input differential current _ID is equal to or greater than a certain value. When the level detection circuit 18-2 operates, the signal extension circuit 28 extends its output signal _S2 for a certain period of time, and during this time it is connected via the NOT circuit 26 to lock the output of the AND circuit 27. There is. Therefore, if the level detection circuit 18-2 operates instantaneously, the operation of the bus protection relay 8 will be locked for a certain period of time, and the effect of the conventional suppressing output extension circuit capacitor 17 shown in FIG. is the same as The operation of the level detection circuit 18-2 is calculated by comparing the instantaneous values of the suppression output |E _T | and the differential current I _D , and the operation formula is |I _T |−(|I _P |+|I _P ′ ｜)
>K (where K is a constant).

Next, the effects and features of the present invention will be explained based on FIGS. 5 and 6. FIG. 5 shows the case when an internal accident occurs, and FIG. 6 shows signal waveform diagrams of various parts when an external accident occurs. The signal waveform diagram in Figure 5 is compared to the signal waveform diagram in Figure 3 for a conventional bus protection relay, and is the limit state when there is a phase difference between the currents I _T1 and I _T2 flowing from each line in the event of an internal fault. This explains the operation. The current and voltage waveforms _ID , | _ET |, and | _ED | shown in FIGS. 5a, b, and c have been explained in FIGS. 3a, b, and c, respectively, so detailed explanations thereof will be omitted here. The voltage waveform |E _T | is a terminal suppression voltage obtained by full-wave rectification of the voltage proportional to the currents I _T1 and I _T2 , and the maximum value thereof is extracted. As shown in Fig. 5d, the current |I _T | proportional to this voltage |E _T | is suppressed and controlled by the current |I _P | or |I _P ′| proportional to the differential current I _D. Indicated by e | I _T | − ( | I _P | + | I _P ′ |)
The level detector 18-2 detects the output signal. Therefore, as shown in FIG. 5, the current output signal |I _T |, which conventionally could not be erased sufficiently by the current output signal |I _P | proportional to the voltage output signal |E _P |, is replaced by the current signal |I _P ′. This can be completely canceled out by the compensation output of |.

Note that the terminal suppression current |I _T | at the time of an internal fault is a suppression method that is proportional to the maximum secondary current of each CT2-1 to 2-n shown in Figure 1, so if the proportional coefficient is 1, then Since the current output signal |I _P | that is always proportional to the differential current I _D is larger, the calculation formula | I _T
|−(|I _P |+|I _P ′|)=|E _T |−(K ₁ |I _D |+K ₂
If the constants K ₁ , K _{2 ,} and ∠θ of |I _D | _{∠θ |}
If there is a phase difference in the current flowing in from each line during an internal fault as in the past, the part that cannot be erased by differential current alone can be
It is clear that the effect can be reliably compensated for by I _P ′|.

Next, FIG. 6 describes a signal waveform diagram of each part in the event of an external accident. This is in comparison with the conventional signal waveform diagram shown in FIG. Figure a
The current waveform ΣI _IN in the same figure is the sum of the inflow currents, the current signal I _OUT in the same figure b is the waveform when CT saturation occurs due to the outflow current, and the voltage signal |E _T | in the same figure c is the terminal suppression voltage and the current The voltage signal |E D | shown in d of the figure is proportional to I _OUT , and the voltage signal |E _D | is proportional to the error differential current I _D =ΣI _IN −I _OUT . Inhibition control output signal in figure e | I _P
| is the same as the waveform of the voltage signal |E _D | in d in the same figure, and is proportional to K ₁ |I _D | as described above, and the current signal |
I _P ′| is proportional to K ₂ |I _D ∠θ|. As shown in the figure, in the region where CT saturation does not occur, the error differential output |E _D | does not occur, but once saturation starts, |E _D | gradually increases, and when it reaches complete saturation, CT2-1~ The secondary current of 2-n becomes almost zero as shown in the waveform of I _OUT . This saturation continues until the direction of the primary current of CT2-1 to CT2-2-n is reversed (for example, from a positive wave to a negative wave), but from there a secondary current is generated in the opposite direction up to the saturation point. become. Therefore, as shown in Fig. 6, there is a difference in the time phase in which the voltage output signals |E _T | and |E _D | occur, and the voltage output signal |E _D | is not continuous and is always a negative wave. This means that there is a region where it becomes zero once in the unsaturated region of . These voltage output signals |E _T |, |E _D | are proportional to each |
I _T |, |I _P |, and the current output signal |I _P ′| in Figure 6e is the one proportional to the output signal |E _D | shifted by the phase angle ∠θ. This phase angle ∠θ
If it is kept within the discontinuation time of the output signal |E _D |, that is, the CT unsaturated region time, then the calculation formula |I _T |−(|
I _P ｜ _＋ ｜I _{P ′} ｜
The instantaneous output of I _P ′| can be obtained.

Therefore |I _T |−(|I _P |+|I _P ′|)>K(K
is the detection value of the level detection circuit 18-2) as shown in Fig. 6 f.
If the level detection circuit 18-2 detects the output signal _S2 as _shown in _FIG . The continuous output signal S ₂ ' as shown in Figure b can be given to the AND circuit 27 via the NOT circuit 26 in Figure 4, and the error differential output |E _D | based on CT saturation at the time of an external fault is Even if the output signal _S1 of the level detection circuit 18-1 is generated above a certain value, it will not operate as the bus protection relay 8.

Further, in the above embodiment, a signal extension circuit 28 is separately provided to process the signal logically, but as in the conventional case, the input signal of the level detection circuit 18-2 is connected to a capacitor (i.e., the conventional circuit shown in FIG. 1). (corresponding to the capacitor 17) may also be used.In this embodiment, the level detection circuit is
Although it is separated into 18-2 and 18-2, the level detection circuit is shared as shown in Figure 1, and the operation calculation formula is |I _O |-
{|I _T |−(|I _P |+|I _P ′|)} ⁺ A similar effect can be obtained even if >K. In addition, the suppression output signal |E _T | that introduces the bus protection relay 8 is the CT2-1 to CT2-2 of each line.
- It may be the sum of absolute values proportional to the secondary current of n, or it may be the sum of absolute values proportional to the CT secondary current of only the line where _the CT secondary output phase is in the opposite phase relation to the differential output ID. The same effect can be obtained even if

As described above, according to the bus protection relay of the present invention, when a fault occurs inside the bus, unnecessary suppressing voltage caused by a phase difference in the inflow current from each CT is reliably canceled out, and on the other hand, when a fault occurs outside the bus, Even when CT saturation occurs, it has the effect of not adversely affecting the suppression effect, and by simply installing a simple suppression control compensation circuit, the severe time coordination that was previously essential is no longer necessary, and it can be used in the event of an internal accident. This has the effect of making the operating performance very reliable.

[Brief explanation of drawings]

Figure 1 is a principle circuit diagram of a conventional busbar protection relay applied to the power system, Figures 2 and 3 are explanatory diagrams explaining the operation of the conventional busbar protection relay, and Figure 2 is a circuit diagram of a conventional busbar protection relay applied to the power system. The figure is an explanatory diagram of waveforms of signals of various parts at the time of an internal accident. FIG. 4 is a principle circuit diagram of a bus protection relay according to an embodiment of the present invention, and FIGS.
The figure is an explanatory diagram explaining the principle of the relay of the same example.
FIG. 5 is an explanatory diagram of waveforms of signals of various parts at the time of an internal accident, and FIG. 6 is an explanatory diagram of waveforms of signals of various parts at the time of an external accident. 1...Bus line, 2-1~2-n...CT, 3-1~3
-n...Input device, 4...Differential transformer, 5...Suppression transformer, 6...Suppression output resistor, 7...Full-wave rectifier circuit,
8...Busbar relay, 9,10,19...Transformer, 1
1, 12...Full wave rectifier circuit, 13, 14, 15, 1
6, 20, 25...Resistor, 17...Capacitor, 1
8, 18-1, 18-2...Level detection circuit, 22
... Phase shifting capacitor, 23, 24... Diode,
26...NOT circuit, 27...AND circuit, 28...signal extension circuit, 29...phase shift circuit. Note that the same reference numerals in the figures indicate the same or equivalent parts.

Claims (1)

[Claims] 1. A differential output signal obtained by synthesizing each output signal proportional to the secondary current of the current transformer via an input device from a current transformer provided on a plurality of lines connected to the bus, and 2.
In a bus protection relay that detects a fault on the bus by introducing a suppression output signal obtained based on an absolute value output signal proportional to the next current, relaying operation is allowed when the differential output signal is above a certain value. a first detection element; a first suppression control output signal that is proportional to the absolute value of the differential output signal that acts in a direction to suppress the suppression output signal with respect to the instantaneous value of the suppression output signal; and the differential output; and a second detection element that applies a second suppression control signal obtained by phase-shifting the signal, and an operation output signal of the first detection element for a certain period of time when the second detection element operates. A busbar protection relay characterized by blocking the supply of.