JPH0244478A - Semiconductor storage cell - Google Patents

Abstract

PURPOSE:To reduce a load on hardware or software by providing a graphic magnification smoothing circuit to generate a fine dot pattern with an original dot pattern at the time of reading out a pattern for a magnification pattern request. CONSTITUTION:The data of an original pattern is stored in a data part 1. A readout part 2 is provided with a readout circuit 3 and the graphic magnification smoothing circuit 4, and the graphic magnification smoothing circuit 4 consists of a graphic magnification arithmetic circuit 5 and a graphic smoothing arithmetic circuit 6, and a magnification size signal line 7 is connected to the graphic magnification arithmetic circuit 5. The dot data 8 of the original pattern read out from the data part 1 is processed at the readout circuit 3 by the magnification arithmetic circuit 5 corresponding to magnification size designated by the magnification size signal line 7, and dot data 9 of magnification pattern is outputted. Dot data 10 of fine magnification pattern can be obtained by processing the data 9 by the graphic smoothing arithmetic circuit 6. In such a way, the load on the hardware or the software can be reduced.

Description

DETAILED DESCRIPTION OF THE INVENTION [Field of Industrial Application] The present invention relates to a semiconductor memory device, and more particularly to a circuit block for generating dot data of an enlarged pattern that is more precise than dot data of an original pattern.

[Conventional technology]

Conventionally, data for this type of enlarged pattern has been obtained by separately performing figure enlargement calculations after reading the dot data of the original pattern from a semiconductor memory element.

Alternatively, after the figure enlargement operation is performed, the figure smoothing operation is sometimes performed to obtain dot data of a fine enlarged pattern.

[Problem that the invention attempts to solve] The conventional configuration described above has the following drawbacks.

However, if you simply enlarge the original pattern,
The resolution is only the same as the original pattern, and especially in the diagonal lines and curved areas, the pattern is jagged and so-called stair-like.
This method has the drawback that it results in an unnatural pattern without smoothness, and furthermore, it has the drawback that the burden on software and hardware increases due to figure enlargement calculations. There is also a method of performing a figure smoothing operation after the figure enlarging operation, but this method has the disadvantage of further increasing the software and hardware.

Furthermore, as another method, there is a method of preparing patterns ranging from coarse to fine patterns for the same type of pattern, but this method has the drawback of requiring a large amount of cost.

SUMMARY OF THE INVENTION An object of the present invention is to provide a semiconductor memory element that solves the above-mentioned drawbacks, does not increase the burden on software or hardware, and can obtain good enlarged pattern dot data.

[Failure to solve the problem]

The configuration of the present invention is such that in a semiconductor memory element in which pattern data is written and read as dot data, when a pattern is read in response to an enlarged pattern request,
It is characterized by including a graphic enlargement and smoothing circuit that generates a dot pattern that is finer than the pattern.

〔Example〕

FIG. 1 is a circuit diagram showing circuit blocks within a semiconductor memory element according to an embodiment of the present invention. In the figure, the semiconductor memory element of this embodiment includes a data section 1 and a readout section 2 for reading enlarged pattern data.

The data section 1 stores original pattern data. The readout section 2 includes a readout circuit 3 and a figure enlargement smoothing circuit 4.
is composed of a figure enlargement calculation circuit 5 and a figure smoothing calculation circuit 6, and an enlargement size signal line 7 is connected to this figure enlargement calculation circuit 5.

The dot data 8 of the original pattern read out by the reading circuit 3 and the data section 1 is processed by the enlargement calculation circuit 5 according to the specified enlargement size of the enlarged buzz signal 7.
Dot data 9 of the enlarged pattern is output. This data 9 can be processed by the graphic smoothing calculation circuit 6 to obtain dot data 10 of a finely enlarged pattern. In other words, the enlarged pattern processing, which was conventionally performed outside the semiconductor memory element, can now be In the embodiment, processing is performed inside the semiconductor memory element.

〔Effect of the invention〕

As explained above, the present invention has the following effects by adding a figure enlargement smoothing circuit to the data succession section of the semiconductor memory element.

First, the enlarged narrow pattern looks like a semiconductor memory element.
Since it can be done directly by hand, it has the effect of reducing the burden on hardware and software, which was conventionally required for pattern enlargement and smoothing processing during display.

In addition, dot data of a pattern of any enlarged size can be
Since it can be generated from dot data of one original pattern,
There is no need to prepare many types of dot data for the same type of pattern, which has the effect of saving space and cost.

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[Brief explanation of the drawing]

FIG. 1 is a circuit block diagram showing a data succession section of a semiconductor memory device according to an embodiment of the present invention. 1...Data section, 2...Reading section, 3
...Reading circuit, 4...Graphic enlargement smoothing circuit, 5...Graphic enlargement calculation circuit, 6...
...Figure smoothing calculation circuit, 7...Enlarged size signal line, 8...Dot data of original pattern, 9.
...Dot data of enlarged pattern, 10...
...Detailed enlarged pattern dot data. Agent Patent Attorney Susumu Uchihara

Claims (1)

[Claims] A semiconductor memory element for writing and reading pattern data as dot data, characterized in that the semiconductor memory element includes a figure enlargement smoothing circuit that generates a finer dot pattern than the original dot pattern when reading a pattern in response to an enlargement pattern request. .