JPH02311163A - Gate pulse generating method for reactive power compensator - Google Patents

Abstract

PURPOSE:To prevent occurrence of partial blocking by providing a gate pulse to a reverse direction thyristor upon detection of thyristor voltage at gate pulse occurring time or at a special time point. CONSTITUTION:Upon finish of power supply interval to a reverse direction thyristor(THS), a gate circuit also provides a gate pulse to the reverse direction THS at a time point when a gate pulse to a forward THS occurs. At this time, current flows continually because the forward THS is conducted even if the current tries to cross zero point continually because of voltage distortion. Since a partially blocked thyristor element receives a gate pulse again and turns ON, the thyristor element can be protected against breakdown due to partial blocking. In similar manner, the thyristor element is protected against breakdown due to partial blocking by providing a gate pulse to the reverse THS upon detection of forward voltage at zero current point and also providing a gate pulse to the forward THS upon detection of reverse voltage after provision of OFF command to a reactive power compensator.

Description

DETAILED DESCRIPTION OF THE INVENTION [Object of the Invention] (Industrial Application Field) The present invention relates to a gate pulse generation method for a reactive power compensator that controls on/off of a capacitor via a thyristor switch.

(Prior art) A configuration example of a reactive power compensator (hereinafter simply referred to as TSC) consisting of a thyristor switch, a capacitor whose on/off is controlled by the thyristor switch, and a DC reactor connected in series with the capacitor is described in the third example. As shown in the figure. 3, 1 is a transformer, 2 is a capacitor, 3 is a thyristor switch, 4 is a DC reactor, and 5 is a voltage detection circuit for the thyristor switch 3. U and X are a forward thyristor and a reverse thyristor, respectively, constituting a thyristor switch. FVυ and FVx are forward and reverse voltage signals, respectively. vs is the circuit voltage on the secondary side of the transformer 1. FIG. 5 shows the circuit voltage Vs on the secondary side of the transformer 1 shown in FIG. , forward and reverse voltage signal FVU.

FVx, phase signal PI (FSu, PHFSX and TSC
This diagram schematically shows the ON signal ON. As shown here.

After the TSC on signal ON becomes "1", the thyristor switch starts conducting, and current flows through the capacitor. FIG. 6 shows an example of a conventional TSC gate circuit, 6 is A
The ND circuit 7 is a one-shot circuit that outputs a predetermined pulse width. In this case, when the voltage of the grid drops and the capacitor shown in Figure 3 is turned on, the TSC on signal becomes [
1". In order to prevent fluctuations caused by transient phenomena from being applied to the power system as much as possible, the TSC outputs a forward and reverse voltage signal F.
VU, FVx and phase signal PH5U, PH5X and TS
When the logical product with the C-on signal becomes 11, U-phase and X-phase gate pulses Gυ and GX are applied to the forward and reverse thyristors U and X to fire the thyristors.

Conversely, when the capacitor is disconnected from the system, the TSC on signal is set to "0" to suppress the gate pulses Gυ and Gx to the forward/reverse thyristor switch.

As described above, the capacitor is turned on in TSC.

Generates a gate pulse for the thyristor for off control.

(Problems to be Solved by the Invention) In the above conventional gate pulse generation method, after the TSC signal becomes "1", the capacitor current becomes zero in the thyristor switch 3, and the forward and reverse voltage signals FVυ,
When FV becomes "1", gate pulses Gυ and Gx are applied, and the TSC is energized. In such a configuration, when a voltage disturbance or the like occurs, the current is interrupted as shown in FIG. 4. At this time, since the turn-off period is not sufficient, there is a possibility of a partial blocking state in which some of the plurality of series-connected elements are turned off and some of them are energized.

That is, the circuit voltage is applied only to the extinguished thyristor, which may damage the thyristor. Furthermore, the current intermittent period generated by the long gate pulse becomes long until the forward voltage or reverse voltage is detected, and there is a risk that the current waveform will be greatly distorted.

An object of the present invention is to provide a gate pulse generation method for a reactive power compensator that eliminates such problems and prevents the occurrence of partial blocking.

[Structure of the invention]

(Means for Solving the Problems) As shown in FIG.
, an OR circuit 8 that outputs a signal to reset the flip-flop circuit 9, an AND circuit 1 that takes the logical product of the 8 outputs of the flip-flop circuit 9, the ON signal, and the forward voltage signal.
0, an AND circuit 1 that receives an ON signal and a reverse voltage signal as inputs.
2, an OR circuit 11 whose input signals are the output signal of this AND circuit 12 and the AND circuit 10 of the U-phase and X-phase, and a one-simmit circuit 13.

(Function) By configuring as described above, when the U-phase phase signal, the forward voltage signal of the thyristor switch, and the TSC ON signal become "1" at the same time, the order of the X-phase phase signal and the thyristor switch becomes "1". The voltage signal and the TSC ON signal are simultaneously [1
”, output a gate pulse to the U phase and X phase,
Furthermore, the τSC off signal and the X-phase forward voltage signal are simultaneously “1”.
'', a gate pulse is output to the U phase, and when the TSC off signal and the U phase forward voltage signal simultaneously become rlJ, a gate pulse is output to the X phase.

(Example) An 11th example of the present invention will be described below! This will be explained with reference to FIG. 1 and FIG. Reference numeral 8 in FIG. 1 is an AND circuit that performs the logical sum of the forward voltage signals when the TSC is off and of the opposite phase, and outputs a signal for resetting the flip-flop circuit 9. lO is TSC
This is an AND circuit that takes the AND of the on signal of the flip-flop circuit 9 and the forward voltage signal. Reference numeral 12 denotes an AND circuit that performs a logical product of forward voltage signals having a phase opposite to that when the TSC is off. 1
Reference numeral 1 denotes an OR circuit which takes the logical sum of the output signals of the AND circuit 10 and the AND circuit 12 of forward and reverse phases. 13 is one 212
There are 8 circuits.

Figure 2 shows the TSC circuit voltage vs. thyristor switch A.
Indicates the relationship between K voltage N, capacitor voltage Vc, capacitor current IC1 forward and reverse voltage signals FVυ, FVx, phase signal PUS5x, ON signal ON, gate pulse Gυ, GX. When the resistance of the TSC circuit is small, T.S.
The phase difference α between the C circuit voltage vs and the phase signal PH5 is about 90°.

As shown in part 2 of FIG. 2, the gate circuit according to the present invention also applies a gate pulse to the reverse thyristor switch when a cut-off gate pulse is generated to the forward thyristor switch after the energization period of the reverse thyristor switch ends. At this point, even if the current crosses the zero point and is interrupted due to voltage distortion or the like, the forward direction thyristor switch is energized. Therefore, current flows intermittently. Furthermore, even if there is a partially blocked thyristor element, the gate pulse is applied again and the thyristor element is turned on, so that destruction of the thyristor element due to partial blocking can be prevented. This situation is shown in part ■ of Figure 2.
Similarly, after the TSC off command, even if the current attempts to cross the zero point and be interrupted due to voltage waveform distortion, etc., if a forward voltage is detected, a gate pulse is applied to the reverse thyristor switch, and the same applies to the forward thyristor switch. When a reverse voltage is detected, a gate pulse is applied to prevent destruction of the thyristor element due to partial blocking. Therefore, transient phenomena in current and voltage can be suppressed as much as possible, so that they do not adversely affect the system.

The above explanation uses a single-phase TSC as an example, but a three-phase TSC
The same can be done for C as well.

〔Effect of the invention〕

As described above, according to the present invention, even if the current is interrupted due to voltage disturbances, the thyristor can be reliably energized and the thyristor element can be prevented from being destroyed due to partial blocking.

[Brief explanation of the drawing]

Fig. 1 is a block diagram of a gate pulse generation circuit showing an embodiment of the present invention, Fig. 2 is a time chart for explaining the present invention in detail, Fig. 3 is a block diagram of the TSC, and Fig. 4 is a voltage FIG. 5 is a time chart of a conventional gate pulse generation circuit, and FIG. 6 is a configuration diagram of a conventional gate pulse generation circuit. 1...Transformer, 2...Capacitor. 3... Thyristor switch, 4... Series reactor, 5... Voltage detection circuit, 8... OR circuit. 9...Flip-flop circuit, 10, 12...AND circuit, 11...OR
Circuit, 13...One-shot circuit, ON...TSC
On signal. PH5u...U phase phase signal, PH5x...X
phase phase signal. FVIJ...forward voltage signal, FVx...reverse voltage signal,
Gυ...U sum gate pulse, aX...X sum gate pulse, V3...TSC circuit voltage, VAK...voltage between A and thyristor switch, Vc...
...Capacitor voltage. IC...Capacitor current. Agent Patent Attorney Noriyuki Chika Ken Daikomaru Figure 1 Figure 2 Figure 3 Vu Vx b~ Figure 4 Figure 5

Claims (1)

[Claims] In a reactive power compensation device consisting of a thyristor switch consisting of a plurality of thyristor switches connected in antiparallel, a capacitor controlled on/off by the thyristor switch, and a reactor connected in series with this capacitor, in addition to the normal gate pulse, reverse direction A gate pulse is generated when the gate pulse of the thyristor is generated and when the voltage of the reverse direction thyristor is detected after the off command is generated.A gate pulse is generated when the gate pulse of the forward direction thyristor is generated and when the voltage of the forward direction thyristor is detected after the off command A gate pulse generation method for a reactive power compensator, characterized in that the gate pulse is applied to a reverse direction thyristor.