JPH02310588A - Picture signal processor - Google Patents

Abstract

PURPOSE:To obtain a cheap color pallet system by integrating an interface circuit, a pallet input switching circuit, a circuit for successively outputting the output of plural pallets and a DA converting circuit into one chip. CONSTITUTION:The interface circuit 102, a control circuit 103 which successively allocates fetched data to the plural pallets 104, a control circuit 105 which successively outputs each output of the plural pallets 104 and an interface circuit 106 for supplying a necessary display signal to a display 107 are integrated on an identical semiconductor substrate. Thus by possessing the plural pallets 104 with identical conversion indicating information and integrating a color pallet 100 into one chip, the speed of the overall color pallet in the system can be heightened and the cheap device is obtained without speeding up the access of each pallet 104.

Description

Detailed Description of the Invention [Field of Industrial Application] The present invention relates to an image signal processing device for displaying CRTs and flat displays of personal computers with enhanced graphic functions, engineering workstations, etc. The present invention relates to an image signal processing device that uses a storage device, also called a color palette or lookup table, that simultaneously displays colors and multiple gradations and converts display data into display signals for display at high speed.

[Conventional technology]

Personal combinators, engineering workstations, and the like with expanded graphic functions use color palettes to convert display data output from a controller for one display into display signals necessary for the display.

The block configuration of this color palette is shown in FIG. 3. In FIG. 3, 201 is Micr 205.

Processor Unit (hereinafter referred to as MPU)
and a processing device for importing data with the display controller; 202 is a processing device for accessing the palette; 203 is 2
Display signal required for 04 display (CRT), 3rd
In the figure, it was composed of a DAC (digital-to-analog conversion) device that converts into analog RGB signals. The above palette stores data conversion specification information, and this conversion specification information is not fixed data, but a high-speed static RAM (Random) in which information can be written and read at any time.
Access Memory) is used.

[Problems to be Solved by the Invention] In the above-mentioned prior art, a gate array, a RAM, and a digital/analog converter are used as devices for processing an interface circuit, processing access to a palette, or RAM, and display signal conversion processing. A color palette system was constructed using Among these, the palette or RA
The speed up of the M access processing was the slowest, and the operation speed of the entire color palette was determined by the palette access processing. In order to increase the speed of this RAM, it is necessary to construct a system using an expensive ultra-high-speed flash memory device as a device in the pallet section (this has the problem of making the system economically expensive). was.

The present invention is intended to solve these problems, and its purpose is to reduce the price of color palettes, and to process the palettes in the color palettes, that is, the RAM section, without using ultra-high-speed static RAM. The object of the present invention is to provide a device that can handle high speed processing and can process the entire color palette at high speed.

[Means to solve the problem]

An image signal processing device of the present invention is an image signal processing device having a palette for storing conversion specification information for converting display data into a display signal for a display, and a palette capable of storing the same conversion specification information. an interface circuit for importing data controlled by an MPU or a display controller into the plurality of pallets; and a control for sequentially allocating the data taken in by the interface circuit to the plurality of palettes. A circuit, a control circuit for sequentially outputting each output of the plurality of pallets, and an interface circuit for converting data of the sequentially outputted pallet outputs into a display signal necessary for a display are formed on the same semiconductor substrate. It is characterized by being integrated and formed.

(Example) The present invention will be described below based on an example. Fig. 1 is a block diagram of a color palette equipped with a palette according to the invention. In Fig. 1, 101 is a display controller, 102 is an MPU Alternatively, an interface circuit 103 with the display controller allocates addresses and data Ar, Ax, . . . , An of each palette.
In other words, a switching circuit for switching,
104 is a plurality of pallets c,,Cm,...,C
n, this palette is composed of static RAM, and has the same conversion specification information (same capacity RAM, same content RAM), 105 is CI, C, . . . -1C
The output of n, ,D, ,-=,D.

106 is a conversion circuit for converting the outputs E, -Em of 105 into display signals necessary for the display 107. 10 is a signal line which is a reference clock and is usually called a pixel clock. Each process in the color palette is pipelined and output in synchronization with this clock.

FIG. 2 is a diagram illustrating timing signals in the color palette system of the present invention of FIG. 1. The address ADH input from 101 is C+ by 102.103.
+Cat..., C11 palette address A,
,A,,...,A, is output, and C,,C,,...
..., Cn holds address data for a period that is an integer multiple of the reference clock lO, C,, C, ..., C1l continues to be selected, and data D,, D, corresponding to each palette is retained.
,..., Dn continues to be output. These, D,
, . . . Dl is outputted by 105 during a data period corresponding to the reference clock 10, inputted to 106, and outputted by 106 from the color palette as a display signal necessary for the display.

When using a CRT as a display, 106 is a DAC (digital-to-analog converter), which outputs analog RGB signals. In a flat display, it is output as a digital RGB signal. It can also be used in a system that outputs the output of 105 simultaneously to a CRT display and a flat display.

- By having multiple palettes with the same conversion specification information as described above, and color palette 100 can be
By using a chip, it is possible to increase the speed of the entire color palette as seen from the system without increasing the access speed of each palette, and it is possible to provide an inexpensive device. That is, when two palettes are integrated on one chip, the operating speed of the color palette can be doubled as a system.

[Effects of the Invention 1] As described above, according to the present invention, an interface circuit for an MPU and a display controller, a palette input switching circuit, a plurality of palettes, a circuit for sequentially outputting palette outputs, and a DA conversion circuit are provided. By integrating into a single chip, the color palette system can be made inexpensive, and at the same time, high reliability can be achieved by eliminating the conventional wiring between each device.

Furthermore, the area occupied by the color palette can be reduced, and the degree of integration of the entire system can be increased. Furthermore, in order to increase the speed of the color palette as a system without speeding up the access to the palette itself, that is, the access for reading and writing information in static RAM at any time, we have developed a manufacturing method specifically designed for high speed, and It is possible to create a high-speed color palette without having to create a color palette. This has the effect that it is possible to obtain an operating speed with a pixel clock (dot) frequency necessary for high-definition graphics.

[Brief explanation of the drawing]

FIG. 1 is a block diagram showing one embodiment of a color palette in an image signal processing device of the present invention. FIG. 2 is a diagram showing timing signals for explaining the color palette of FIG. 1. FIG. 3 is a block diagram showing a conventional color palette. 100.200...Color palette 101.205...Display controller 111.206
...MPU 102.201...Interface circuit 103...
−・・−′・A,,A,, ・・−,A. Switching circuit for allocating to 104.202...Pallet 105...---D,,D,,---,D. Switching circuit 106.203 to E1 to Effi...Conversion circuit 107.204 for converting the signal into a display signal necessary for the display...Display 10...Reference clock ADH... ...Input address signal A1 from the display controller. Am, . . . A, . Input address and data signal of palette, , D2.・・Dll ・Palette output signal E, ~
E7... Pallet sequential output signal or higher

Claims (1)

[Claims] An image signal processing device having a palette for storing conversion specification information for converting display data into a display signal for a display, including a plurality of palettes for storing the same conversion specification information, and an MPU for each of the plurality of palettes. (
an interface circuit for capturing data controlled by a MicroProcessorUnit (MicroProcessorUnit) or a display controller; a control circuit for sequentially allocating the data captured by the interface circuit to the plurality of pallets; and each of the plurality of pallets. A control circuit for sequentially outputting outputs and an interface circuit for converting the sequentially outputted pallet output data into display signals necessary for a display are integrated and formed on the same semiconductor substrate. Image signal processing device.