JPH02307259A - High voltage generation circuit - Google Patents

Abstract

PURPOSE:To make an elevated voltage constant without depending upon a source voltage by a method wherein a constant potential supply circuit which supplies a potential to an oscillation signal which is the output of an oscillating circuit is provided. CONSTITUTION:A high voltage generating circuit is composed of an oscillating circuit 2 which outputs an oscillation signal and a voltage elevating circuit 1 which is driven by the oscillation signal. A constant potential supply circuit 8 which supplies a potential to the oscillation signal which is the output of the oscillating circuit 2 is added to the high voltage generating circuit. For instance, a voltage V8 is supplied to the sources of the P-type channel transistors 6 and 7 of inverters 4 and 5 in the oscillating circuit 2 which output the oscillation signals CL and -CL by the constant potential supply circuit 8 composed of a P-type channel transistor 9 and N-type channel transistors 10-12. With this constitution, an elevated voltage does not depend upon a source voltage, so that the deterioration of the reliability on the high voltage source side caused by the high voltage application stress of a memory cell can be suppressed and, further, writing and erasing characteristics can be stabilized.

Description

DETAILED DESCRIPTION OF THE INVENTION [Industrial Application Field 1] The present invention is applicable to electrically writable and erasable read-only memories (hereinafter referred to as E) among non-volatile semiconductor memories.
The present invention relates to a high voltage generation circuit for generating a high voltage necessary for writing and erasing a 2FROM.

[Prior Art] Writing and erasing data in an E2FROM requires a voltage (15V to 25V) higher than the supply voltage. FIG. 7 shows a conventional high voltage generation circuit. 1 is a booster circuit for generating a boosted voltage, a so-called charge pump circuit (for example, the reference JOURNAL OF 5OLID
5TATECIRCUITS, VOL, 5C-16
,N.

3', June 1981 A 1.5V Si
ngle 5uply One Transi
stor CMO5EEPROM) and consists of an Nch transistor and a capacitor. 3 is a load capacitance such as a memory cell, and 2 is an oscillation circuit that outputs oscillation signals CL and CL for supplying a signal for driving the booster circuit 1. The second oscillation circuit consists of impark and NOR. NOH
The writing and erasing control signals (hereinafter referred to as W/
An E fli control signal) is input. NOH
may be NAND depending on the logic of the W/E control signal. To explain the operation, when reading, the w/E 1lil control signal is at H level, so the oscillation signals CL and CL of the oscillation circuit 2 are at H level and L level, respectively.
Since the level is fixed, the booster circuit 1 is not driven and no boosted voltage is generated. During writing and erasing, the W/E control signal is at L level, so the oscillation circuit 2 performs an oscillation operation and outputs oscillation signals CL, CL. As a result, the booster circuit 1 is driven and a boosted voltage is generated.

[Problems to be Solved by the Invention] In the conventional high voltage generation circuit, the boosted voltage value of the booster circuit l mainly depends on the amplitude potential of the oscillation signal supplied from the oscillation circuit 2, that is, the power supply voltage value. The power supply voltage is high (I see, the amplitude potential of the transmitted signal has also increased, and the boosted voltage value has become high.

Therefore, when the power supply voltage is high, reliability deteriorates due to stress caused by high voltage application to the memory transistor. Furthermore, fluctuations in the boosted voltage value due to dependence of the boosted voltage value on the power supply voltage caused variations in writing and erasing characteristics. Alternatively, in order to eliminate such dependence of the boosted voltage value on the power supply voltage, it was necessary to provide a Zener diode or the like at the boosted voltage output terminal to cut off the boosted voltage at a certain potential to keep it constant.The present invention In order to solve such problems, the object of the present invention is to make the boosted voltage value constant without depending on the electric lf!A voltage.

[Means for Solving the Problems 1] The high voltage generation circuit of the present invention includes an oscillation circuit that outputs an oscillation signal and a booster circuit that is driven by the oscillation signal. The device is characterized in that it is equipped with a constant potential supply circuit that supplies a potential to the device.

[Function] According to the above configuration of the present invention, since the amplitude potential of the oscillation signal is a constant potential regardless of the power supply voltage, the boosted voltage value of the booster circuit driven thereby is also constant and independent of the power supply voltage. voltage value.

[Example] FIG. 1 shows a first example of the present invention. Pc of the inverter 4.5 that outputs the oscillation signals CL and CL in the oscillation circuit 2
A voltage V8 is applied to the source of the ht-transistor 7 from a constant potential supply circuit 8 composed of a Pch transistor 9 and Nch transistors 10 to 12. Here, it is assumed that the current supply capacity of the Nch transistors 10 to 12 is sufficiently larger than the capacity of the Pchh transistor 9. The operation will be explained using FIG. 2. Power supply voltage ■. . In the region where Ncht-transistor 10 to 12 is low
Since not all of them are in the on state, the potential V8 is set to V by the Pch transistor 9. The same value as 0 is output.

The current (original voltage V.0 becomes high and the Nch transistor 10
When the potential Vc becomes such that all of Von 12 are turned on, Von
Even if becomes higher than that, NCh transistors 10 to 12
Since the current supply capacity of transistor 9 (Pch) is sufficiently larger than that of transistor 9, potential v8 continues to maintain a constant potential at Vc. The value of this constant potential Vc is the value of Nchh transistor 1
It is determined by threshold voltage values from 0 to 12 and their sum. If the potential Vc is set to a value lower than the potential of the specification type and FA voltage range, the amplitude potential of the oscillation signal CL, which is the output of the oscillation circuit 2, will be within the specification power supply voltage range as shown in Figure 3. Since Vc has a constant potential amplitude, the boosted voltage value of the booster circuit 1 is the power supply voltage V. It becomes a constant voltage value without depending on 0. In this case, the boosted voltage value is Nc constituting the booster circuit 1.
It changes depending on the threshold voltage value of the hh transistor; in other words, the higher the threshold voltage value, the lower the boost voltage value (however, the potential V8 also increases the threshold voltage value of the Nchh transistors 10 to 12 at the same time. As a result, the voltage increases by that amount, so they cancel each other out, and as a result, changes in the Nchh range threshold voltage value of the boosted voltage value due to process fluctuations become smaller.

In the first embodiment, the constant potential supply circuit 8 is explained as having a three-stage configuration of Nch transistors lO to 12, but the number of stages may change depending on the setting of the constant potential Vc or the threshold voltage value of the Nch transistors. do.

The configuration of the constant potential supply circuit 8 is as shown in FIG.
A resistor 13 may be used instead of the ch transistor 9, or an Nch depletion type transistor 14 and a load Nch transistor 15 may be used as shown in FIG. In the case of FIG. 5, if the power supply capacity of the Nch depletion type transistor 14 is made sufficiently thicker than the power supply capacity of the Nch transistor 15, the depletion threshold voltage value of the transistor 14 causes a constant potential V.
c is determined.

FIG. 6 shows a second embodiment of the invention. In this case, Nch transistors 16 to 18 are connected to the output section of inverter 4.5.
．． 19 to 21 are connected to each other, and together with Pchh transistor 7, they constitute a constant potential supply circuit 8.8'. Transistors 16 to 18 and 19 to 21 are the same, and their power supply capabilities are P
It is assumed that it is sufficiently larger than the channel transistor 6.7. As in the first embodiment, the amplitude potential of the oscillation signals CL and CL is set to a constant potential Vc by the transistors 16 to 18 and 19 to 21, so the boosted voltage value of the booster circuit 1 is the power supply voltage V. . It becomes a constant voltage value regardless of.

[Advantageous Effects of the Invention 1] As described above, according to the present invention, dependence of the boosted potential value on the power supply voltage is eliminated, thereby suppressing deterioration in reliability due to high voltage applied stress on memory cells on the high power supply voltage side. Furthermore, it becomes possible to stabilize the aging and erasing characteristics.

Further, since a Zener diode or the like for keeping the boosted voltage value constant is not required, the number of process steps for forming the Zener diode or the like can be reduced. In addition, the problem of reliability deterioration when using a Zener diode can be avoided.

In addition, since the rise time of the boosted voltage does not depend on the amplitude potential of the oscillation signal, it is possible to suppress fluctuations in the rise time due to current and voltage, suppressing deterioration of reliability due to high voltage stress of memory cells, and writing. It becomes easy to stabilize the erasing characteristics.

[Brief explanation of drawings]

FIG. 1 is a circuit diagram showing a first embodiment of the present invention. FIG. 2 is a characteristic diagram showing the potential in the first embodiment. FIG. 3 is a characteristic diagram showing signal waveforms in the first embodiment. 4 and 5 show the constant potential supply circuit 8 in the first embodiment.
FIG. 3 is a circuit diagram showing another configuration of the . FIG. 6 is a circuit diagram showing a second embodiment of the present invention. FIG. 7 is a circuit diagram showing a conventional high voltage generation circuit. l...Boost circuit 2...Oscillation circuit 8.8'...Constant potential supply circuit 3...Load capacitance 6.7.9...Pchh transistor 10-12.15-21 ... Nch transistor 13 ... Resistor 14 ... Nch depletion type transistor or more Applicant Seiko Epson Corporation Agent Patent attorney Kizobe Suzuki (1 other person) Total 4 Tomoe
Su5 ■ 悌 6 m d1 Snake Mysterious Giant -

Claims (1)

[Claims] A high voltage generation circuit comprising an oscillation circuit that outputs an oscillation signal and a booster circuit driven by the oscillation signal, characterized by comprising a constant potential supply circuit that supplies a potential to the oscillation signal that is the output of the oscillation circuit. High voltage generation circuit.