JPH0230523B2 - DENGENSOCHINOSHUTSURYOKUIJOKENSHUTSUHOGOKAIRO - Google Patents

DENGENSOCHINOSHUTSURYOKUIJOKENSHUTSUHOGOKAIRO

Info

Publication number
JPH0230523B2
JPH0230523B2 JP5011482A JP5011482A JPH0230523B2 JP H0230523 B2 JPH0230523 B2 JP H0230523B2 JP 5011482 A JP5011482 A JP 5011482A JP 5011482 A JP5011482 A JP 5011482A JP H0230523 B2 JPH0230523 B2 JP H0230523B2
Authority
JP
Japan
Prior art keywords
circuit
voltage
input
output
abnormality detection
Prior art date
Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
Expired - Lifetime
Application number
JP5011482A
Other languages
Japanese (ja)
Other versions
JPS58168112A (en
Inventor
Tetsuji Hiranabe
Fumito Sohata
Current Assignee (The listed assignees may be inaccurate. Google has not performed a legal analysis and makes no representation or warranty as to the accuracy of the list.)
Fujitsu Telecom Networks Ltd
Original Assignee
Fujitsu Telecom Networks Ltd
Priority date (The priority date is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the date listed.)
Filing date
Publication date
Application filed by Fujitsu Telecom Networks Ltd filed Critical Fujitsu Telecom Networks Ltd
Priority to JP5011482A priority Critical patent/JPH0230523B2/en
Publication of JPS58168112A publication Critical patent/JPS58168112A/en
Publication of JPH0230523B2 publication Critical patent/JPH0230523B2/en
Anticipated expiration legal-status Critical
Expired - Lifetime legal-status Critical Current

Links

Classifications

    • GPHYSICS
    • G05CONTROLLING; REGULATING
    • G05FSYSTEMS FOR REGULATING ELECTRIC OR MAGNETIC VARIABLES
    • G05F1/00Automatic systems in which deviations of an electric quantity from one or more predetermined values are detected at the output of the system and fed back to a device within the system to restore the detected quantity to its predetermined value or values, i.e. retroactive systems
    • G05F1/10Regulating voltage or current
    • G05F1/46Regulating voltage or current wherein the variable actually regulated by the final control device is dc
    • G05F1/56Regulating voltage or current wherein the variable actually regulated by the final control device is dc using semiconductor devices in series with the load as final control devices
    • G05F1/565Regulating voltage or current wherein the variable actually regulated by the final control device is dc using semiconductor devices in series with the load as final control devices sensing a condition of the system or its load in addition to means responsive to deviations in the output of the system, e.g. current, voltage, power factor
    • G05F1/569Regulating voltage or current wherein the variable actually regulated by the final control device is dc using semiconductor devices in series with the load as final control devices sensing a condition of the system or its load in addition to means responsive to deviations in the output of the system, e.g. current, voltage, power factor for protection
    • G05F1/571Regulating voltage or current wherein the variable actually regulated by the final control device is dc using semiconductor devices in series with the load as final control devices sensing a condition of the system or its load in addition to means responsive to deviations in the output of the system, e.g. current, voltage, power factor for protection with overvoltage detector

Description

【発明の詳細な説明】 (1) 発明の技術分野 本発明は、電源装置の出力異常検出保護回路に
関し、特に徐々上げまたは徐々下げされる入力電
圧に対しても安定に出力電圧の投入切断を行な
い、また出力異常検出保護動作を適確に作動し得
る電源装置の出力異常検出保護回路に関する。
[Detailed Description of the Invention] (1) Technical Field of the Invention The present invention relates to an output abnormality detection protection circuit for a power supply device, and in particular to a circuit that stably turns on and off the output voltage even when the input voltage is gradually increased or decreased. The present invention also relates to an output abnormality detection and protection circuit for a power supply device that can perform output abnormality detection and protection operations accurately.

(2) 技術の背景 一般に、DC―DCコンバータあるいは定電圧電
源装置等においては出力電圧が供給される負荷回
路の短絡等によつて電源装置の内部回路が破壊さ
れることを防止するため出力異常検出保護回路が
設けられている。このような出力異常検出保護回
路は電源投入時等に入力電圧の印加条件の相異あ
るいはその他の条件により誤動作することがあ
り、このような誤動作によつて入力回路あるいは
出力回路が誤つて遮断されると電源の投入、遮断
が安定に行なわれないこととなる。したがつて、
出力異常検出保護回路の動作は適確かつ安定に行
なわれることが必要である。
(2) Background of the technology Generally, in DC-DC converters or constant voltage power supplies, output abnormalities are detected to prevent the internal circuits of the power supply from being destroyed due to short circuits in the load circuit to which output voltage is supplied. A detection protection circuit is provided. Such output abnormality detection protection circuits may malfunction due to differences in input voltage application conditions or other conditions such as when the power is turned on, and such malfunctions may cause the input circuit or output circuit to be erroneously shut down. In this case, the power cannot be turned on or off stably. Therefore,
It is necessary for the output abnormality detection protection circuit to operate properly and stably.

(3) 従来技術と問題点 従来、上述のような電源装置の出力異常検出保
護回路においては、例えば出力電圧検出回路を設
け、出力電圧が最小定格値以下であることを検出
して保護回路を動作させ、入力回路または出力回
路を遮断していた。
(3) Prior art and problems Conventionally, in the output abnormality detection protection circuit of the power supply device as described above, for example, an output voltage detection circuit is provided, and when the output voltage is detected to be below the minimum rated value, the protection circuit is activated. The input circuit or output circuit was cut off.

しかしながら、前記従来形においては、入力電
源として供給される入力電圧が例えば第1図aに
示すように急速に立上り、したがつて立上り時間
Tが例えば数10msec以下のように充分に短い場
合は問題はないが、入力電圧が第1図bに示され
るように短時間に立上らず、したがつて立上り時
間Tがかなり長くかつ該立上り時間Tが一定の値
に規定されていない場合に出力異常検出保護回路
が誤動作するという不都合があつた。すなわち、
第1図bに示されるようないわゆる徐々上げの入
力電圧が印加された場合に、入力電圧印加開始後
出力電圧が急速に上昇しないため、出力電圧検出
回路によつて出力電圧が最小定格値よりも低いこ
とが検出され、それにより出力異常検出保護回路
が動作して入力回路または出力回路が遮断され
る。そのため徐々上げの入力電圧に対しては電源
装置の電源投入が不可能となる。このような徐々
上げ状態となるのは、例えば入力電圧がモータジ
エネレータ(MG)によつて供給されており、停
電復帰後該モータジエネレータが始動する場合等
に生ずる。
However, in the conventional type, if the input voltage supplied as the input power source rises rapidly as shown in FIG. However, if the input voltage does not rise in a short time as shown in Figure 1b, and therefore the rise time T is quite long and the rise time T is not specified to a constant value, the output There was an inconvenience that the abnormality detection protection circuit malfunctioned. That is,
When a so-called gradually increasing input voltage is applied as shown in Figure 1b, the output voltage does not rise rapidly after the input voltage application starts, so the output voltage detection circuit detects that the output voltage is lower than the minimum rated value. It is detected that the output voltage is low, and the output abnormality detection protection circuit operates to cut off the input circuit or the output circuit. Therefore, it becomes impossible to turn on the power supply device in response to a gradually increasing input voltage. Such a gradual increase occurs, for example, when the input voltage is supplied by a motor generator (MG) and the motor generator starts after the power outage is restored.

(4) 発明の目的 本発明の目的は、前述の従来回路における問題
点に鑑み、電源装置の出力異常検出保護回路にお
いて、入力電圧が電源装置の正常動作に必要な最
小定格値以上に上昇した時から所定時間経過して
も、出力電圧が最小定格値以下である場合に初め
て出力異常と見なし、保護回路を動作させるとい
う思想に基き、入力電圧が徐々上げまたは徐々下
げ状態となる場合にも誤動作することなく、安定
に出力電圧の投入切断を行ない、さらに出力異常
検出保護動作が適確に行なわれるようにすること
にある。
(4) Purpose of the Invention In view of the problems with the conventional circuits described above, the purpose of the present invention is to provide an output abnormality detection protection circuit for a power supply device in which the input voltage rises above the minimum rated value necessary for the normal operation of the power supply device. Based on the idea that even if the output voltage remains below the minimum rated value even after a predetermined period of time has elapsed, the output is considered to be abnormal and the protection circuit is activated. The purpose of the present invention is to stably turn on/off an output voltage without causing malfunction, and to properly perform an output abnormality detection and protection operation.

(5) 発明の構成 本発明によれば、入力電圧を所望の安定化され
た出力電圧へ変換する電圧変換部を有する電源装
置の出力異常検出保護回路において、前記出力電
圧を検出し最小定格値以上になつた時に出力検出
信号を送出する出力電圧検出回路と、前記入力電
圧を検出し最小定格値以上になつた時に入力検出
信号を所定時間遅延後に送出する入力電圧検出回
路と、該入力検出信号により前記電圧変換部へ前
記出力電圧のオン・オフ制御信号を送出し、また
該入力検出信号と該出力検出信号との論理積によ
り駆動制御信号を送出する異常検出制御回路と、
該駆動制御信号により前記入力電圧を遮断する入
力遮断回路、とにより構成され、前記入力電圧が
最小定格値以上に上昇した場合のみに前記電圧変
換部から前記出力電圧を送出すると共に該出力電
圧が最小定格値以下である時に前記異常検出制御
回路の制御信号により前記入力遮断回路を動作さ
せて前記入力電圧を遮断することを特徴とする電
源装置の出力異常検出保護回路、が提供される。
(5) Structure of the Invention According to the present invention, in an output abnormality detection protection circuit of a power supply device having a voltage conversion section that converts an input voltage to a desired stabilized output voltage, the output voltage is detected and the minimum rated value is determined. an output voltage detection circuit that detects the input voltage and sends out an input detection signal after a predetermined time delay when the input voltage exceeds the minimum rated value; an abnormality detection control circuit that sends an on/off control signal for the output voltage to the voltage converter based on a signal, and sends a drive control signal based on an AND of the input detection signal and the output detection signal;
an input cutoff circuit that cuts off the input voltage according to the drive control signal, and sends out the output voltage from the voltage converter only when the input voltage rises above a minimum rated value, and There is provided an output abnormality detection and protection circuit for a power supply device, characterized in that when the input voltage is below a minimum rated value, the input cutoff circuit is operated by a control signal of the abnormality detection control circuit to cut off the input voltage.

(6) 発明の実施例 以下図面により本発明の1実施例を説明する。
第2図は、本発明の1実施例に係る電源装置を示
す。同図において、1は電圧変換部としてのDC
―DCコンバータ、2は突入電流防止回路、3は
入力遮断回路、4は入力電圧検出回路、5は出力
電圧検出回路、そして6は異常検出制御回路であ
る。突入電流防止回路2は、リレー接点rlおよび
突入電流制限用抵抗R1からなり、入力遮断回路
3はノー・ヒユーズ・ブレーカーで構成され、ト
リツプコイルTCおよび遮断用接点CB1,CB2
からなる。入力電圧検出回路4はスイツチ素子と
してのトランジスタT1、該トランジスタT1の
ベースに接続された入力電圧の最小定格値設定用
の定電圧ダイオードZ1ないしZ3および抵抗R
2,R3、該トランジスタT1のコレクタに抵抗
R4を介して接続されたリレーコイルRL、リレ
ーコイルRLの印加電圧を一定にするための定電
圧ダイオードZ4ないしZ6、抵抗R4と共に遅
延回路を形成するコンデンサC1およびコンデン
サC1の放電用抵抗R5を具備する。尚、この入
力電圧検出回路2は、異常検出制御回路6内にリ
レーコイルRLで動作するリレー接点rlを付加す
るだけで、突入電流防止回路2のリレー接点rlの
駆動制御回路と共用できるものである。出力電圧
検出回路5はスイツチ素子としてのフオトカプラ
PC1、出力電圧の最小定格値設定用の定電圧ダ
イオードZ7および抵抗R6を具備する。また、
異常検出制御回路6は入力遮断回路3のトリツプ
コイルTCを駆動するトランジスタT2、遅延回
路を構成する抵抗R7およびコンデンサC3、平
滑コンデンサC2、トランジスタT2のベースバ
イアス回路を構成する抵抗R8,R9および定電
圧ダイオードZ8、ダイオードD1、およびリレ
ー接点rlによつて構成される。なお、第2図にお
いて、C4は電源平滑用のコンデンサそしてD2
は異常検出制御回路6と電源装置の入力回路とを
結合するダイオードである。また、異常検出制御
回路6のリレー接点rlの一端とダイオードD1の
カソード側の接続点Qは、DC―DCコンバータ1
へ接続されており、該接続点Qの電位が高レベル
になるとDC―DCコンバータ1から出力が送出さ
れ、低レベルになると出力が停止されるように制
御される。
(6) Embodiment of the invention An embodiment of the invention will be described below with reference to the drawings.
FIG. 2 shows a power supply device according to one embodiment of the present invention. In the same figure, 1 is a DC voltage converter.
- DC converter, 2 is an inrush current prevention circuit, 3 is an input cutoff circuit, 4 is an input voltage detection circuit, 5 is an output voltage detection circuit, and 6 is an abnormality detection control circuit. The inrush current prevention circuit 2 consists of a relay contact RL and an inrush current limiting resistor R1, and the input cutoff circuit 3 consists of a no-fuse breaker, including a trip coil TC and cutoff contacts CB1 and CB2.
Consisting of The input voltage detection circuit 4 includes a transistor T1 as a switch element, constant voltage diodes Z1 to Z3 for setting the minimum rated value of the input voltage connected to the base of the transistor T1, and a resistor R.
2, R3, a relay coil RL connected to the collector of the transistor T1 via a resistor R4, constant voltage diodes Z4 to Z6 for keeping the voltage applied to the relay coil RL constant, and a capacitor forming a delay circuit together with the resistor R4. C1 and a resistor R5 for discharging the capacitor C1. Note that this input voltage detection circuit 2 can be used in common with the drive control circuit for the relay contact RL of the inrush current prevention circuit 2 by simply adding a relay contact RL operated by the relay coil RL to the abnormality detection control circuit 6. be. The output voltage detection circuit 5 is a photocoupler as a switch element.
It includes a PC1, a constant voltage diode Z7 and a resistor R6 for setting the minimum rated value of the output voltage. Also,
The abnormality detection control circuit 6 includes a transistor T2 that drives the trip coil TC of the input cutoff circuit 3, a resistor R7 and a capacitor C3 that constitute a delay circuit, a smoothing capacitor C2, resistors R8 and R9 that constitute a base bias circuit of the transistor T2, and a constant voltage. It is composed of a diode Z8, a diode D1, and a relay contact rl. In addition, in Fig. 2, C4 is a power supply smoothing capacitor and D2
is a diode that connects the abnormality detection control circuit 6 and the input circuit of the power supply device. Further, one end of the relay contact rl of the abnormality detection control circuit 6 and the connection point Q on the cathode side of the diode D1 are connected to the DC-DC converter 1.
When the potential at the connection point Q becomes high level, the DC-DC converter 1 outputs an output, and when the potential at the connection point Q becomes low level, the output is stopped.

第2図の回路の動作を説明する。入力電圧VIN
は入力遮断回路3の遮断用接点CB1,CB2を介
して入力電圧検出回路4に印加される。今例えば
入力電圧VINが第1図bに示すように徐々に上昇
するものとすると、入力電圧VINが最小定格値よ
りも低い間はトランジスタT1はオフの状態であ
り、したがつて突入電流防止回路2のリレー接点
rlは開いた状態であり、入力電流は抵抗R1を介
してコンデンサC4およびDC―DCコンバータ1
に供給されるため突入電流が防止される。また、
異常検出制御回路6内のリレー接点rlは閉じてい
るから、接続点QおよびダイオードD1、抵抗R
8および定電圧ダイオードZ8の共通接続点Pの
電位は低レベルとなり、DC―DCコンバータ1か
らの出力電圧VOUTは送出されない状態を維持す
ると共に、トランジスタT2もベースバイアスさ
れないためにカツトオフしており、従つて入力遮
断回路3のトリツプコイルTCは駆動されず遮断
用接点CB1,CB2は閉じた状態である。
The operation of the circuit shown in FIG. 2 will be explained. Input voltage V IN
is applied to the input voltage detection circuit 4 via the cutoff contacts CB1 and CB2 of the input cutoff circuit 3. For example, if the input voltage V IN is gradually increased as shown in Figure 1b, then as long as the input voltage V IN is lower than the minimum rated value, the transistor T1 is in the off state, and therefore the inrush current Relay contact of prevention circuit 2
rl is open, and the input current flows through resistor R1 to capacitor C4 and DC-DC converter 1.
This prevents inrush current. Also,
Since the relay contact RL in the abnormality detection control circuit 6 is closed, the connection point Q, the diode D1, and the resistor R
8 and the voltage regulator diode Z8 becomes a low level, the output voltage V OUT from the DC-DC converter 1 remains in a state of not being sent out, and the transistor T2 is also cut off because it is not base biased. Therefore, the trip coil TC of the input cutoff circuit 3 is not driven and the cutoff contacts CB1 and CB2 are in a closed state.

次に入力電圧VINが入力電圧検出回路4の定電
圧ダイオードZ1ないしZ3等により設定された
最小定格値以上に上昇すると、トランジスタT1
がオンとなり、リレーコイルRLが駆動されるが、
抵抗R4およびコンデンサC1の時定数による遅
延回路が設けられているため、リレーコイルRL
は所定時間遅延後に動作する。リレーコイルRL
の動作により各リレー接点rlが切り換えられて突
入電流防止回路2の抵抗R1が短絡されて突入電
流制限状態が解除され、また異常検出制御回路6
のリレー接点rlが開放されるため接続点Qの電位
は、入力電位VINがダイオードD2、抵抗R7,
R8およびダイオードD1を介して高レベルとな
り、DC―DCコンバータ1からの出力電圧VOUT
送出される。この場合、出力電圧VOUTが供給さ
れる負荷回路に短絡等の異常がなく、出力電圧
VOUTが出力電圧検出回路5の定電圧ダイオード
Z7等により設定された最小定格値以上に上昇す
るとフオトカプラPC1内の発光ダイオードが発
光し、フオトトランジスタがオンとなる。従つ
て、異常検出制御回路6内の接続点Pの電位は該
フオトトランジスタおよび比較的小さな抵抗値を
有する抵抗R3を介して低レベルに引下げられ
る。そのため、異常検出制御回路6内のトランジ
スタT2はいぜんとしてカツトオフ状態となり、
入力遮断回路3による入力回路の遮断は行なわれ
ない。
Next, when the input voltage V IN rises above the minimum rated value set by the voltage regulator diodes Z1 to Z3 of the input voltage detection circuit 4, the transistor T1
turns on and relay coil RL is driven, but
Since a delay circuit is provided using the time constant of resistor R4 and capacitor C1, relay coil RL
operates after a predetermined time delay. relay coil RL
As a result of the operation, each relay contact RL is switched, the resistor R1 of the inrush current prevention circuit 2 is short-circuited, the inrush current limit state is released, and the abnormality detection control circuit 6 is
Since the relay contact rl of is opened, the potential of the connection point Q is as follows:
It becomes high level through R8 and diode D1, and output voltage V OUT from DC-DC converter 1 is sent out. In this case, there is no abnormality such as a short circuit in the load circuit to which the output voltage V OUT is supplied, and the output voltage
When V OUT rises above the minimum rated value set by the constant voltage diode Z7 etc. of the output voltage detection circuit 5, the light emitting diode in the photocoupler PC1 emits light and the phototransistor is turned on. Therefore, the potential at the connection point P in the abnormality detection control circuit 6 is lowered to a low level via the phototransistor and the resistor R3 having a relatively small resistance value. Therefore, the transistor T2 in the abnormality detection control circuit 6 is always in the cut-off state,
The input cutoff circuit 3 does not cut off the input circuit.

尚、異常検出制御回路6のトランジスタT2の
ベースバイアス回路には、抵抗R7およびコンデ
ンサC3の時定数による遅延回路が付加されてい
るために、リレー接点rlの開放直後から所定時間
は出力電圧検出回路5の検出信号を受け付けな
い。この時定数による遅延時間は、DC―DCコン
バータ1の回路部品定数で定まる出力電圧VOUT
の立上り時間よりも長く設定されている。
Furthermore, since a delay circuit is added to the base bias circuit of the transistor T2 of the abnormality detection control circuit 6 using the time constant of the resistor R7 and the capacitor C3, the output voltage detection circuit is disabled for a predetermined period of time immediately after the relay contact RL is opened. 5 detection signal is not accepted. The delay time due to this time constant is determined by the output voltage V OUT determined by the circuit component constants of DC-DC converter 1.
is set longer than the rise time of .

また、前述の入力電圧検出回路4のリレーコイ
ルRLに付加された抵抗R4およびコンデンサC
1の時定数による遅延回路は、入力電圧VINの印
加直後に電源平滑用コンデンサC4等に流入する
過大な突入電流を突入電流防止回路2の電流制限
用抵抗R1により、充電完了するまでの間、制限
するための遅延時間を定するものであり、所定時
間遅延後、リレーコイルRLが動作して突入電流
制限が解除された時からDC―DCコンバータ1の
入力端に最小定格値以上の入力電圧VINと同電圧
が印加され、DC―DCコンバータ1が正常に動作
できる状態となる。従つてこの時から出力電圧
VOUTを送出し、出力異常検出の状態が設定でき
るので、出力異常検出保護回路における入力電圧
検出回路4は、突入電流防止回路が共用できるこ
とになる。
In addition, a resistor R4 and a capacitor C added to the relay coil RL of the input voltage detection circuit 4 mentioned above are also added.
The delay circuit with a time constant of 1 prevents the excessive inrush current flowing into the power supply smoothing capacitor C4 etc. immediately after the input voltage V IN is applied by the current limiting resistor R1 of the inrush current prevention circuit 2 until charging is completed. , which determines the delay time for limiting the inrush current, and after a predetermined time delay, the relay coil RL operates and the inrush current limit is released. The same voltage as voltage V IN is applied, and the DC-DC converter 1 is in a state where it can operate normally. Therefore, from this time the output voltage
Since the output abnormality detection state can be set by sending out V OUT , the input voltage detection circuit 4 in the output abnormality detection and protection circuit can also be used as a rush current prevention circuit.

これに対して、入力電圧VINが最小定格値以上
に上昇し各リレー接点rlの切換が行なわれたの
ち、出力電圧VOUTが最小定格値以下である場合
は、出力電圧検出回路5のフオトカプラPC1の
フオトトランジスタがオンとならないため、異常
検出制御回路6内の接続点Pが低レベルに引下げ
られない。従つて抵抗R7およびコンデンサC3
の時定数による所定時間遅延後も接続点Pの電位
は上昇し、定電圧ダイオードZ8のツエナー電圧
を越えると急激にトランジスタT2がバイアスさ
れて、オンとなり、これによつて入力遮断回路3
のトリツプコイルTCに電流が流れ、遮断用接点
CB1、CB2が開放されて入力電圧VINが遮断さ
れ、電源装置の保護動作が行なわる。
On the other hand, if the input voltage V IN rises above the minimum rated value and each relay contact RL is switched, and the output voltage V OUT is below the minimum rated value, the photocoupler of the output voltage detection circuit 5 Since the phototransistor of PC1 is not turned on, the connection point P in the abnormality detection control circuit 6 is not pulled down to a low level. Therefore resistor R7 and capacitor C3
The potential at the connection point P rises even after a predetermined time delay due to the time constant of
Current flows through the trip coil TC, and the breaking contact
CB1 and CB2 are opened, the input voltage V IN is cut off, and the power supply device performs a protective operation.

また、入力電圧VINが最小定格値以上の高レベ
ルの値から徐々に低下する場合は、入力電圧VIN
が最小定格値以下の値まで低下すると入力電圧検
出回路4のトランジスタT1がオフとなり、リレ
ーコイルRLの電流が遮断され、したがつて各リ
レー接点rlが切換えられる。これにより異常検出
制御回路6内のリレー接点rlが閉じ、接続点Qお
よび接続点Pの電圧が低レベルとなり、出力が停
止されると共に出力電圧検出回路5の検出信号を
受け付けない状態となる。
Also, if the input voltage V IN gradually decreases from a high level value above the minimum rated value, the input voltage V IN
When the voltage decreases to a value below the minimum rated value, the transistor T1 of the input voltage detection circuit 4 is turned off, the current in the relay coil RL is cut off, and each relay contact RL is therefore switched. As a result, the relay contact rl in the abnormality detection control circuit 6 closes, the voltage at the connection point Q and the connection point P becomes a low level, the output is stopped, and the detection signal from the output voltage detection circuit 5 is not accepted.

(7) 発明の効果 このように本発明の電源装置の出力異常検出回
路においては、入力電圧の検出値が最小定格値以
上となり、電源装置が正常に動作するための入力
条件が整つて出力電圧を送出し、出力電圧の立上
り時間を考慮した所定時間遅延後に初めて出力異
常検出信号を受け付けて保護条件を行なうもので
あり、すなわち、入力電圧検出信号と出力異常検
出信号との論理積により出力異常を判断するため
に、通常の入力電源の投入切断時のみならず徐々
上げ及び徐々下げされる入力電源の投入切断にお
いても出力異常検出保護回路が誤動作することな
く、極めて安定に行なうことができると共に出力
異常検出保護動作を適確に行なうことができる。
(7) Effects of the Invention As described above, in the output abnormality detection circuit of the power supply device of the present invention, the detected value of the input voltage becomes equal to or higher than the minimum rated value, and the output voltage increases when the input conditions for the power supply device to operate normally are met. The protection condition is implemented by receiving the output abnormality detection signal only after a predetermined time delay that takes into account the rise time of the output voltage. In order to determine the output abnormality, the output abnormality detection protection circuit can perform extremely stable operations without malfunctioning, not only when the input power is normally turned on and off, but also when the input power is turned on and off gradually increasing and decreasing. Output abnormality detection protection operation can be performed accurately.

【図面の簡単な説明】[Brief explanation of drawings]

第1図aおよび第1図bは、本発明に係る電源
装置における入力電圧の印加条件を示す波形図、
そして第2図は、本発明の1実施例に係る電源装
置を示す電気回路図である。 1……DC―DCコンバータ、2……突入電流防
止回路、3……入力遮断回路、4…入力電圧検出
回路、5……出力電圧検出回路、6……異常検出
制御回路、R1,R2,R3,R4,R5,R
6,R7,R8,R9……抵抗、Z1,Z2,Z
3,Z4,Z5,Z6,Z7,Z8……定電圧ダ
イオード、C1,C2,C3,C4……コンデン
サ、D1,D2……ダイオード、T1,T2……
トランジスタ、PC1……フオトカプラ、RL……
リレーコイル、rl……リレー接点、TC……トリ
ツプコイル、CB1,CB2……遮断用接点。
FIGS. 1a and 1b are waveform diagrams showing conditions for applying input voltage in the power supply device according to the present invention,
FIG. 2 is an electrical circuit diagram showing a power supply device according to an embodiment of the present invention. 1...DC-DC converter, 2...Inrush current prevention circuit, 3...Input cutoff circuit, 4...Input voltage detection circuit, 5...Output voltage detection circuit, 6...Abnormality detection control circuit, R1, R2, R3, R4, R5, R
6, R7, R8, R9...Resistance, Z1, Z2, Z
3, Z4, Z5, Z6, Z7, Z8... Constant voltage diode, C1, C2, C3, C4... Capacitor, D1, D2... Diode, T1, T2...
Transistor, PC1...Photocoupler, RL...
Relay coil, RL...Relay contact, TC...Trip coil, CB1, CB2...Cut-off contact.

Claims (1)

【特許請求の範囲】 1 入力電圧を所望の安定化された出力電圧へ変
換する電圧変換部を有する電源装置の出力異常検
出保護回路において、 前記出力電圧を検出し最小定格値以上になつた
時に出力検出信号を送出する出力電圧検出回路
と、 前記入力電圧を検出し最小定格値以上になつた
時に入力検出信号を所定時間遅延後に送出する入
力電圧検出回路と、 該入力検出信号により前記電圧変換部へ前記出
力電圧のオン・オフ制御信号を送出し、また該入
力検出信号と該出力検出信号との論理積により駆
動制御信号を送出する異常検出制御回路と、 該駆動制御信号により前記入力電圧を遮断する
入力遮断回路、とにより構成され、 前記入力電圧が最小定格値以上に上昇した場合
のみに前記電圧変換部から前記出力電圧を送出す
ると共に該出力電圧が最小定格値以下である時に
前記異常検出制御回路の制御信号により前記入力
遮断回路を動作させて前記入力電圧を遮断するこ
とを特徴とする電源装置の出力異常検出保護回
路。
[Scope of Claims] 1. In an output abnormality detection protection circuit for a power supply device having a voltage converter that converts an input voltage to a desired stabilized output voltage, when the output voltage is detected and exceeds a minimum rated value, an output voltage detection circuit that sends out an output detection signal; an input voltage detection circuit that detects the input voltage and sends out the input detection signal after a predetermined time delay when the input voltage exceeds a minimum rated value; and the voltage conversion according to the input detection signal. an abnormality detection control circuit that sends out an on/off control signal for the output voltage to the section, and sends out a drive control signal by ANDing the input detection signal and the output detection signal; an input cutoff circuit that cuts off the output voltage from the voltage conversion section only when the input voltage rises above the minimum rated value, and sends out the output voltage from the voltage conversion section when the output voltage is below the minimum rated value. An output abnormality detection and protection circuit for a power supply device, characterized in that the input cutoff circuit is operated by a control signal of an abnormality detection control circuit to cut off the input voltage.
JP5011482A 1982-03-30 1982-03-30 DENGENSOCHINOSHUTSURYOKUIJOKENSHUTSUHOGOKAIRO Expired - Lifetime JPH0230523B2 (en)

Priority Applications (1)

Application Number Priority Date Filing Date Title
JP5011482A JPH0230523B2 (en) 1982-03-30 1982-03-30 DENGENSOCHINOSHUTSURYOKUIJOKENSHUTSUHOGOKAIRO

Applications Claiming Priority (1)

Application Number Priority Date Filing Date Title
JP5011482A JPH0230523B2 (en) 1982-03-30 1982-03-30 DENGENSOCHINOSHUTSURYOKUIJOKENSHUTSUHOGOKAIRO

Publications (2)

Publication Number Publication Date
JPS58168112A JPS58168112A (en) 1983-10-04
JPH0230523B2 true JPH0230523B2 (en) 1990-07-06

Family

ID=12850075

Family Applications (1)

Application Number Title Priority Date Filing Date
JP5011482A Expired - Lifetime JPH0230523B2 (en) 1982-03-30 1982-03-30 DENGENSOCHINOSHUTSURYOKUIJOKENSHUTSUHOGOKAIRO

Country Status (1)

Country Link
JP (1) JPH0230523B2 (en)

Families Citing this family (2)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
JPH0363035U (en) * 1989-10-18 1991-06-20
US5333511A (en) * 1990-09-07 1994-08-02 The United States Of America As Represented By The United States Environmental Protection Agency Portable controlled air sampler

Also Published As

Publication number Publication date
JPS58168112A (en) 1983-10-04

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