JPH02295389A - Multi-stage connection system - Google Patents

Multi-stage connection system

Info

Publication number
JPH02295389A
JPH02295389A JP1116906A JP11690689A JPH02295389A JP H02295389 A JPH02295389 A JP H02295389A JP 1116906 A JP1116906 A JP 1116906A JP 11690689 A JP11690689 A JP 11690689A JP H02295389 A JPH02295389 A JP H02295389A
Authority
JP
Japan
Prior art keywords
control signal
power supply
power
circuit
power control
Prior art date
Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
Pending
Application number
JP1116906A
Other languages
Japanese (ja)
Inventor
Satoshi Hirashima
平島 聡史
Current Assignee (The listed assignees may be inaccurate. Google has not performed a legal analysis and makes no representation or warranty as to the accuracy of the list.)
Seiko Epson Corp
Original Assignee
Seiko Epson Corp
Priority date (The priority date is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the date listed.)
Filing date
Publication date
Application filed by Seiko Epson Corp filed Critical Seiko Epson Corp
Priority to JP1116906A priority Critical patent/JPH02295389A/en
Publication of JPH02295389A publication Critical patent/JPH02295389A/en
Pending legal-status Critical Current

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  • Television Receiver Circuits (AREA)

Abstract

PURPOSE:To reduce a rush current while the timing of a power supply rising of each terminal electric equipment by providing a delay circuit retarding a power control signal. CONSTITUTION:When a main power is fed to television receivers 1, 3, 5, the television receivers are in the standby state. When a power supply control signal 7 reaches a high level, the power supply of the television receiver 1 rises. Since the power control signal 8 of the television receiver 3 reaches a high level with a delay more than the power supply control signal 7 by a delay circuit 2, the power supply for the television receiver 3 rises with a delay more than the television receiver 1. The power control signal is inverted by an inverter at the delay circuit 2 and waveform-shaped and then integrated, then the power control signal inverted again by the inverter is retarded more than the input power control signal. Thus, rush current at the start of power supply is reduced.

Description

【発明の詳細な説明】 〔産業上の利用分野〕 本発明は、多段接続システムにおける電源制御方式の改
良に関する。
DETAILED DESCRIPTION OF THE INVENTION [Field of Industrial Application] The present invention relates to an improvement in a power supply control method in a multi-stage connection system.

〔従来の技術〕[Conventional technology]

カラーテレビを多段接続するシステムの従来例を第8図
に示す。
A conventional example of a system for connecting color televisions in multiple stages is shown in FIG.

主電源33が各テレビ30、31、32に電源供給する
とテレビはスタンバイ状態により、電源制御信号がハイ
レベルになるとテレビ30、31、32は一斉に電源が
立上がる。
When the main power supply 33 supplies power to each of the televisions 30, 31, and 32, the televisions are in a standby state, and when the power control signal becomes high level, the televisions 30, 31, and 32 are powered on all at once.

第4図は、カラーテレビ30、31、32のブロック構
成図である。
FIG. 4 is a block diagram of the color televisions 30, 31, and 32.

ビデオモードビデオ信号、ビデオモード音声信号はモー
ド切換え回路15に直接人力する。RF信号は、オート
チューニング回路11、チューナー12であるチャンネ
ルが選局され、IF回路13でビデオ信号に変換された
後、モード切換え回路15に入力する。
The video mode video signal and the video mode audio signal are directly input to the mode switching circuit 15. The RF signal is selected by an autotuning circuit 11 and a tuner 12, converted into a video signal by an IF circuit 13, and then input to a mode switching circuit 15.

モード切換え回路15では、テレビモードかビデオモー
ドかの切換えを行い、音声信号は音声処理回路14に、
又、ビデオ信号は色信号処理回路18に出力する。
The mode switching circuit 15 switches between television mode and video mode, and the audio signal is sent to the audio processing circuit 14.
Further, the video signal is output to the color signal processing circuit 18.

色信号処理回路18ではRGB信号でA/Dコンバータ
17に出力してデジタル信号化され、コントロール&ド
ライバー19を介して液晶パネル20に伝送され、表示
される。
The color signal processing circuit 18 outputs the RGB signal to the A/D converter 17, converts it into a digital signal, and transmits it to the liquid crystal panel 20 via the control & driver 19, where it is displayed.

第3図は、第4図における電源スイッチ回路21の詳細
な回路図である。
FIG. 3 is a detailed circuit diagram of the power switch circuit 21 in FIG. 4.

電源制御信号がハイレベルになるとトランジスタQ1、
Q2が導通するため、安定化電源回路に電源が供給され
る。
When the power supply control signal becomes high level, transistor Q1,
Since Q2 becomes conductive, power is supplied to the stabilized power supply circuit.

電源制御信号がローレベルになるとトランジスタQ1、
Q2が非導通になるため、安定化電源回路に電源供給が
禁止される。
When the power supply control signal becomes low level, transistor Q1,
Since Q2 becomes non-conductive, power supply to the stabilized power supply circuit is prohibited.

〔発明が解決しようとする課題〕[Problem to be solved by the invention]

しかし、このような多段接続システムでは、接続される
すべてのカラーテレビに同時に電源倶給が許可されるた
め、電源供給開始時に非常に大きな突入電流が流れる。
However, in such a multi-stage connection system, power supply is permitted to all connected color televisions at the same time, so a very large inrush current flows when power supply starts.

この現象を、図を用いて以下に説明する。This phenomenon will be explained below using figures.

テレビ単体の導適時の消費電流経過を第5図に示す。t
=Toに電源供給を許可すると、t −TOに突入電流
lmが流れ、やがて定常電流1cに電流値はおちつく。
Figure 5 shows the progress of current consumption when the TV alone is operating properly. t
When power supply is allowed to =To, a rush current lm flows through t-TO, and the current value eventually settles to the steady current 1c.

第8図に示すシステムでテレビ3台を接続した場合の消
費電流経過を第6図に示す。t−Toに電源供給を許可
すると、t−Toに3台分の突入電流31mが流れ、や
がて定常電流31cにおちつく。
FIG. 6 shows the progress of current consumption when three televisions are connected in the system shown in FIG. 8. When power supply is permitted to t-To, an inrush current 31m equivalent to three units flows through t-To, and eventually settles down to a steady current 31c.

このようにして電源供給開始時に非常に大きな突入電流
が流れるとその突入電流により主電源33のヒューズが
切れる可能性があり、そのため主電源33に突入電流制
限抵抗を設けたり、定常電流に合わないヒューズを設定
しなければならないという問題点を有していた。
If a very large inrush current flows at the start of power supply in this way, there is a possibility that the fuse of the main power supply 33 will blow due to the inrush current, so it is necessary to install an inrush current limiting resistor in the main power supply 33, or it will not match the steady current. There was a problem in that a fuse had to be set.

そこで、本発明はこのような問題点を解決するためのも
ので、その目的とするところは電源供給開始時のと突入
電流を低減することができる多段接続システムを提供す
ることにある。
SUMMARY OF THE INVENTION The present invention is intended to solve these problems, and its purpose is to provide a multi-stage connection system that can reduce inrush current at the start of power supply.

〔課題を解決するための手段〕[Means to solve the problem]

本発明の多段接続システムは、 a)カラーテレビ等の電気機器を多段接続するシステム
において、 b)該電気機器に電源立上げを命令する電源制御信号、 C)該電源制御信号を遅延する遅延回路、を備えること
を特徴とする。
The multi-stage connection system of the present invention is a system in which electrical equipment such as a color television is connected in multiple stages, and includes: b) a power control signal that instructs the electrical equipment to turn on the power; and C) a delay circuit that delays the power control signal. It is characterized by comprising the following.

〔実 施 例〕〔Example〕

以下、本発明について実施例に基づいて詳細に説明する
Hereinafter, the present invention will be described in detail based on examples.

第1図は、本発明の多段接続システムの構成図である。FIG. 1 is a block diagram of a multi-stage connection system of the present invention.

主電源がテレビ1、3、5に供給されると、テレビはス
タンバイ状態になる。電源制御信号7がハイレベルにな
ると、テレビ1の電源が立上がる。テレビ3の電源制御
信号8は、遅延回路2により電源制御信号7より遅れて
ハイレベルになるため、テレビ3はテレビ1より遅れて
電源が立上がる。
When main power is supplied to the televisions 1, 3, and 5, the televisions enter a standby state. When the power control signal 7 becomes high level, the power of the television 1 is turned on. Since the power control signal 8 of the television 3 becomes high level later than the power control signal 7 due to the delay circuit 2, the power of the television 3 is turned on later than the television 1.

第2図は、遅延回路の具体的な回路例である。FIG. 2 shows a specific circuit example of the delay circuit.

電源制御信号は、インバータ9により反転して波形整形
される。その後、R1、C1により積分されるため、再
びインバータ10により反転した電源制御信号は、人力
電源制御信号より01、R1に応じて遅延している。
The power supply control signal is inverted and waveform-shaped by an inverter 9. Thereafter, since it is integrated by R1 and C1, the power supply control signal that is inverted again by the inverter 10 is delayed by 01 and R1 from the human power supply control signal.

テレビ1、3、5は、従来例と同様、第4図に示すよう
に構成されている。ビデオモードビデオ信号、ビデオモ
ード音声信号はモード切換え回路15に直接人力する。
The televisions 1, 3, and 5 are constructed as shown in FIG. 4, similar to the conventional example. The video mode video signal and the video mode audio signal are directly input to the mode switching circuit 15.

RF信号は、オートチューニング回路11、チューナー
12であるチャンネルが選局され、IF回路13でビデ
オ信号に変換された後、モード切換え回路15に人力す
る。
The RF signal is selected by an auto-tuning circuit 11 and a tuner 12, converted into a video signal by an IF circuit 13, and then inputted to a mode switching circuit 15.

モード切換え回路15ではテレビモードかビデオモード
かの切換1を行い、音声信号は音声処理回路14に、又
、ビデオ信号は色信号処理回路18に出力する。色信号
処理回路18ではRGB信号でA/Dコンバータ17に
出力してデジタル信M 化され、コントロール&ドライ
バー19を介して液晶パネル20に伝送され、表示され
る。
The mode switching circuit 15 performs switching 1 between television mode and video mode, and outputs the audio signal to the audio processing circuit 14 and the video signal to the color signal processing circuit 18. The color signal processing circuit 18 outputs RGB signals to the A/D converter 17, converts them into digital signals, and transmits them to the liquid crystal panel 20 via the control and driver 19 for display.

電源スイッチ回路は、従来例と同様、第3図に示す回路
構成をもつ。電源制御信号がハイレベルになるとトラン
ジスタQ1、Q2が導通するため、安定化電源回路に電
源が供給される。電源制御信号がローレベルになるとト
ランジスタQ1、Q2が非導通になるため、安定化電源
回路に電源洪給が禁止される。
The power switch circuit has the circuit configuration shown in FIG. 3, similar to the conventional example. When the power supply control signal becomes high level, transistors Q1 and Q2 become conductive, so that power is supplied to the stabilized power supply circuit. When the power supply control signal becomes low level, transistors Q1 and Q2 become non-conductive, and therefore, power supply flooding to the stabilized power supply circuit is prohibited.

第7図は、本発明の多段システムでテレビ3台を接続し
た場合の消費電流経過を示す。t=Toに導通すると、
t−Toに1台分の突入電流lmが流れる。遅延回路に
より電源制御信号が、前段の電源制御信号によりT遅延
するとすると、t=To+Tでは、t=To+7におけ
る1台目のテレビの消費電流+1台分の突入電流が流れ
る。t−To+2Tでは、t−To+2Tにおける1段
目、及び2段目のテレビの消費電流+1台分の突入電流
が流れる。
FIG. 7 shows the progress of current consumption when three televisions are connected in the multi-stage system of the present invention. When conduction occurs at t=To,
An inrush current lm for one vehicle flows at t-To. Assuming that the power control signal is delayed by T due to the power control signal at the previous stage due to the delay circuit, at t=To+T, an inrush current corresponding to the consumption current of the first TV at t=To+7+1 unit flows. At t-To+2T, an inrush current corresponding to the consumption current of the first and second television sets plus one unit flows at t-To+2T.

〔発明の効果〕〔Effect of the invention〕

以上述べたように、本発明の多段接続システムは、遅延
回路を設けることにより、各端末電気機器の電源立上げ
のタイミングをずらし、突入電流を低減することができ
るため、従来、主電源で行なっていた突入電流制限抵抗
、突入電流まで考慮したヒューズ選択等の対策をとる必
要がなくなり、コストも軽減でき、極めて効果が大きい
As described above, by providing a delay circuit, the multi-stage connection system of the present invention can shift the power-on timing of each terminal electrical device and reduce inrush current. It is no longer necessary to take measures such as inrush current limiting resistors and fuse selection that take into account inrush current, and costs can be reduced, which is extremely effective.

【図面の簡単な説明】[Brief explanation of the drawing]

第1図は、本発明の多段接続システムの構成図。 第2図は、遅延回路の回路図。 第3図は、従来例、及び本発明における電源スイッチ回
路の回路構成図。 第4図は、従来例、及び本発明におけるテレビのブロッ
ク構成図。 第5図は、テレビ単体の導通時の消費電流経過図。 第6図は、従来の多段接続システムでテレビ3台を接続
した場合の消費電流経過図。 第7図は、本発明の多段接続システムでテレビ3台を接
続した場合の消費電流経過図。 第8図は、従来の多段接続システムの構成図。 働●テレビ ・・遅延回路 a#テレビ ・・遅延回路 ・・テレビ ・・主電源 ・・電源制御信号 8・・・電源制御信号 9・・●インバータ 10●拳Φインバータ 11・・・オートチューニング回路 12・・・チューナー 13・・・IF回路 14・・・音声処理回路 15・・・モード切換え回路 16・・・同期回路 17・・・A/Dコンバータ 18・・・色信号処理回路 19・・・コントロール&ドライバー 20・・・液晶パネル 21・・・電源スイッチ回路 22・・・安定化電源回路 24・・・螢光管駆動回路 25・・・螢光管 30・・φテレビ 31・●・テレビ 32φφ・テレビ 33・・・主電源 34・・・電源制御信号 以上 出願人 セイコーエプソン株式会社 代理人 弁理士 鈴 木 喜三郎(他1名)第 図 −−−−−t,i拐隠 第2図 第5図 第6図 第7図 ー−−−−一電々迂鯰殊 第4図 S+ 一一一一電濾怪絵犠 第8図
FIG. 1 is a configuration diagram of a multi-stage connection system of the present invention. FIG. 2 is a circuit diagram of a delay circuit. FIG. 3 is a circuit configuration diagram of a power switch circuit in a conventional example and in the present invention. FIG. 4 is a block configuration diagram of a television in a conventional example and in the present invention. FIG. 5 is a graph showing the progress of current consumption when the television is turned on. FIG. 6 is a graph of current consumption when three televisions are connected using a conventional multi-stage connection system. FIG. 7 is a diagram showing the progress of current consumption when three televisions are connected using the multi-stage connection system of the present invention. FIG. 8 is a configuration diagram of a conventional multi-stage connection system. Working●TV...delay circuit a#TV...delay circuit...TV...main power supply...power control signal 8...power control signal 9...●inverter 10●fist Φ inverter 11...auto tuning circuit 12...Tuner 13...IF circuit 14...Audio processing circuit 15...Mode switching circuit 16...Synchronization circuit 17...A/D converter 18...Color signal processing circuit 19...・Control & driver 20...LCD panel 21...Power switch circuit 22...Stabilized power supply circuit 24...Fluorescent tube drive circuit 25...Fluorescent tube 30...φ TV 31・●・Television 32φφ/TV 33...Main power supply 34...Power control signal and above Applicant Seiko Epson Co., Ltd. Agent Patent attorney Kisaburo Suzuki (and 1 other person) Fig. 2 Fig. 5 Fig. 6 Fig. 7 -----Ichiden Nanazushu Fig. 4 S+

Claims (1)

【特許請求の範囲】[Claims] (1)a)カラーテレビ等の電気機器を多段接続するシ
ステムにおいて、 b)該電気機器に電源立上げを命令する電源制御信号、 c)該電源制御信号を遅延する遅延回路、を備えること
を特徴とする多段接続システム。
(1) In a system that connects electrical equipment such as a color television in multiple stages, it is recommended to include: b) a power control signal that instructs the electrical equipment to turn on the power; and c) a delay circuit that delays the power control signal. Features a multi-stage connection system.
JP1116906A 1989-05-10 1989-05-10 Multi-stage connection system Pending JPH02295389A (en)

Priority Applications (1)

Application Number Priority Date Filing Date Title
JP1116906A JPH02295389A (en) 1989-05-10 1989-05-10 Multi-stage connection system

Applications Claiming Priority (1)

Application Number Priority Date Filing Date Title
JP1116906A JPH02295389A (en) 1989-05-10 1989-05-10 Multi-stage connection system

Publications (1)

Publication Number Publication Date
JPH02295389A true JPH02295389A (en) 1990-12-06

Family

ID=14698569

Family Applications (1)

Application Number Title Priority Date Filing Date
JP1116906A Pending JPH02295389A (en) 1989-05-10 1989-05-10 Multi-stage connection system

Country Status (1)

Country Link
JP (1) JPH02295389A (en)

Cited By (1)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
US7538455B2 (en) 2005-06-07 2009-05-26 Kabushiki Kaisha Toshiba Electronic device, power source control method, ROF system and its power supplying method and remote unit

Cited By (1)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
US7538455B2 (en) 2005-06-07 2009-05-26 Kabushiki Kaisha Toshiba Electronic device, power source control method, ROF system and its power supplying method and remote unit

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