JPH02290126A - Semiconductor breaker device - Google Patents

Semiconductor breaker device

Info

Publication number
JPH02290126A
JPH02290126A JP1111102A JP11110289A JPH02290126A JP H02290126 A JPH02290126 A JP H02290126A JP 1111102 A JP1111102 A JP 1111102A JP 11110289 A JP11110289 A JP 11110289A JP H02290126 A JPH02290126 A JP H02290126A
Authority
JP
Japan
Prior art keywords
current
circuit
main circuit
transistor
time
Prior art date
Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
Pending
Application number
JP1111102A
Other languages
Japanese (ja)
Inventor
Motohisa Taniguchi
谷口 源弥
Current Assignee (The listed assignees may be inaccurate. Google has not performed a legal analysis and makes no representation or warranty as to the accuracy of the list.)
Mitsubishi Electric Corp
Original Assignee
Mitsubishi Electric Corp
Priority date (The priority date is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the date listed.)
Filing date
Publication date
Application filed by Mitsubishi Electric Corp filed Critical Mitsubishi Electric Corp
Priority to JP1111102A priority Critical patent/JPH02290126A/en
Publication of JPH02290126A publication Critical patent/JPH02290126A/en
Pending legal-status Critical Current

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Abstract

PURPOSE:To limit a main circuit current with a high degree of accuracy by providing a main circuit current measuring means, a current limiting time calculation circuit, a semiconductor element driving micro current generating circuit, a semiconductor element generating circuit in the event of rating, and a controlling circuit to cut-off a semiconductor element driving circuit and a micro current generating circuit when the main circuit has overcurrent. CONSTITUTION:When a main circuit current has a higher value than that of an overcurrent setter 20, the output of a NOT gate element 38 is cut-off, and the output of an AND circuit 39 is also cut-off. The output voltage of a current sensor 9 and the voltage of a current limiting value setter 31 are compared with a differential amplifier circuit 19, and IB2 is so controlled that a current to be supplied to a transistor Q1 is equal to a current limiting value. In the event of exceeding a current limiting time, an OFF signal is outputted to an AND circuit 37, IB2 of the transistor Q1 is also st to 0, the transistor Q1 is turned OFF, and a main circuit is opened. According to the constitution, the main circuit current can be limited with a high degree of accuracy.

Description

【発明の詳細な説明】 [産業上の利用分野] この発明は、電気回路の開閉を行う半導体遮断装置に関
するものである。
DETAILED DESCRIPTION OF THE INVENTION [Field of Industrial Application] The present invention relates to a semiconductor interrupting device for opening and closing an electric circuit.

[従来の技術] 第3図は例えば、−TIIREE TYPES OF 
SQLID STATE REMOTE POWER 
CONTROLLERS−, D. E. Ilake
r I’ESC75 RECORD  PI51〜P1
60に記載された従来の半導体遮断装置の回路である。
[Prior art] FIG. 3 shows, for example, -TIIREE TYPES OF
SQLID STATE REMOTE POWER
CONTROLLERS-, D. E. Ilake
r I'ESC75 RECORD PI51~P1
60 is a circuit of a conventional semiconductor cut-off device described in No. 60.

この回路において半導体遮断装置をオンにする指令があ
った時は、ON/OPF制御回路6よりオンの信号がト
ランジスタQaに入力される。まずトランジスタQ[l
がオンしIRIが抵抗R1を介して流れる、この電流I
RIはトランジスタQ4. Qs. Q2によって増申
されてトランジスタQ+にベース電流としてIIIを流
すことになる。つまりベースドライブ回路12がオンと
なる。従って、トランジスタQlがオンすることになり
主回路電源である直流電源1から電流一電圧変換器を使
用した電流センサ9、トランジスタQ1、逆電圧防止用
のダイオードl4及びモータ等の負荷2までの主回路が
閑路されることになる。又ON/OFF制御回路6より
オフ信号がトランジスタQIIに入力されれば、トラン
ジスタQOがオフし、従ってトランジスタQ4.Qs.
 Q2及びQ1がオフし、主回路は開路されることにな
る。
When there is a command to turn on the semiconductor cutoff device in this circuit, an on signal is input from the ON/OPF control circuit 6 to the transistor Qa. First, transistor Q[l
turns on and IRI flows through resistor R1.
RI is transistor Q4. Qs. It is increased by Q2 and causes III to flow through transistor Q+ as a base current. In other words, the base drive circuit 12 is turned on. Therefore, the transistor Ql turns on, and the main circuit from the DC power supply 1, which is the main circuit power supply, to the current sensor 9 using a current-to-voltage converter, the transistor Q1, the diode l4 for reverse voltage prevention, and the load 2 such as a motor. The circuit will be shut down. Further, when an off signal is input to transistor QII from the ON/OFF control circuit 6, transistor QO is turned off, and therefore transistor Q4. Qs.
Q2 and Q1 will be turned off and the main circuit will be opened.

またこの主回路中で負荷短絡等の事故が起こった場合は
ON/OFF制御回路中の過電流設定器20、電圧比較
器30,ノットゲート素子38、等の回路が働《。すな
わち、電流センサ9からの信号より主回路に過電流が流
れたことを検知して、ベースドライブ回路l2をオフし
てトランジスタQ1をオフさせ、主回路を遮断させる。
If an accident such as a load short circuit occurs in this main circuit, the overcurrent setter 20, voltage comparator 30, not gate element 38, etc. in the ON/OFF control circuit will be activated. That is, it is detected from the signal from the current sensor 9 that an overcurrent has flowed through the main circuit, and the base drive circuit 12 is turned off, the transistor Q1 is turned off, and the main circuit is cut off.

[発明が解決しようとする課題] 一般に遮断器には例えば短絡等の回路の故障により大き
な電流が流れた場合に、遮断動作に入るまでの瞬間に例
えばμsecのオーダで定格の10倍以上の電流が流れ
、その後遮断動作が起こるという可能性がある。この時
、この瞬間的な大電流がその遮断器より上位の遮断器に
流れることによって、その上位の遮断器がその大電流に
反応して不必要な遮断動作を行ってしまうという問題が
あっ路の負荷短絡等の故障により上位の遮断器80まで
が遮断動作を行えば、他の82.83等の遮断器の設け
られた正常な回路まで遮断されてしまうという問題が起
こるということである。
[Problems to be Solved by the Invention] Generally, when a large current flows through a circuit breaker due to a circuit failure such as a short circuit, a current of 10 times the rated value or more on the order of μsec is generated in the moment before the circuit starts breaking operation. There is a possibility that a current flows and then a blocking operation occurs. At this time, when this instantaneous large current flows to a circuit breaker higher than that circuit breaker, there is a problem that the upper circuit breaker reacts to the large current and performs an unnecessary breaking operation. If the upper circuit breaker 80 performs a breaking operation due to a failure such as a load short circuit, a problem will occur in that normal circuits equipped with other circuit breakers such as 82, 83, etc. will also be cut off.

以上に述べたように下位の遮断器として用いられる遮断
器は定格以上の電流が流れてから遮断動作を起こすまで
の時間の間では、上位の遮断器がけっして動作しないよ
うにさせる必要がある。そのためには上述の時間中に流
れる定格以上の電流値を例えば定格電流の2〜3倍まで
に制限して、すなわち限流して電流を流す方法が考えら
れる。
As mentioned above, it is necessary for the circuit breaker used as a lower-level circuit breaker to prevent the upper-level circuit breaker from operating during the time period from when a current exceeding the rated value flows until the circuit breaker initiates a breaking operation. For this purpose, a method can be considered in which the current value exceeding the rated value that flows during the above-mentioned time is limited to, for example, 2 to 3 times the rated current, that is, the current is limited.

ところが以上のような負荷短絡等の故障の場合は、トラ
ンジスタQ1のコレクターエミッタ一間電圧が非常に高
くなる。したがってトランジスタQlの動作領域は第5
図に示す通常の動作範囲を示す点線上のA点からC部分
に移り、トランジスタQlに限流電流以上の電流が流れ
てしまう。この状態に入ることを防ぐために、トランジ
スタQ1の動作領域を実線で示すようなベース電流11
を低く抑えた動作領域に変える必要がある。すなわち負
荷短絡等の回路故障時に前述のような限流を行うために
、ベース電流I.Bを低《制御することが必要.になる
。例えばこの時実際の動作点が点Aから点Bへと変化す
ればトランジスタQ1コレクタ電流が定格電流の2〜3
倍におさえられることになる。すなわち、定格時には例
えば10^流れていたIIIを故障時には例えば約1/
1000の100mAに下げればコレクタ電流を安全な
範囲におさえられることを意味する。ところが、実際に
はこのIllは先に説明したようにIRIによって制御
されている。この1.1とIRIの関係は単純に各トラ
ンジスタQs. Qs. Q2との電流増【1]率に従
って定まっている。ここで例えばトランジスタQ4が1
00倍、Q3が50倍、Q2がIO倍の電流増11率を
もつとするとQ4から02までの全体の増幅率はIOO
X 50X lO=sOOOo倍となる。すなわち通常
時には( IOA (l 1 1 )/ 50000倍
} = 0.2mA程度であったIRIを、故障時には
(100−^(let)/soooo倍}=2μA程度
に下げることになる。このような2μ^から0. 2w
+A程度までの幅広い範囲で1t1を制御し、安定した
ベース電流を供給することは非常に困難であった。
However, in the case of a failure such as a load short circuit as described above, the collector-emitter voltage of the transistor Q1 becomes extremely high. Therefore, the operating region of transistor Ql is the fifth
Moving from point A to point C on the dotted line indicating the normal operating range shown in the figure, a current exceeding the current limit flows through the transistor Ql. In order to prevent this state from occurring, the base current 11 is set such that the operating region of transistor Q1 is indicated by a solid line.
It is necessary to change the operating range to a lower one. That is, in order to perform current limiting as described above in the event of a circuit failure such as a load short circuit, the base current I. It is necessary to control B to a low level. become. For example, if the actual operating point changes from point A to point B at this time, the collector current of transistor Q1 will be 2 to 3 times higher than the rated current.
It will be suppressed twice. In other words, the flow of III, which was, for example, 10^ at the rated time, will be reduced to about 1/3 at the time of failure.
Lowering the current to 100mA means that the collector current can be kept within a safe range. However, in reality, this Ill is controlled by IRI as explained above. The relationship between this 1.1 and IRI is simply that each transistor Qs. Qs. It is determined according to the current increase [1] rate with Q2. For example, transistor Q4 is 1
00 times, Q3 has a current increase factor of 50 times, and Q2 has a current increase factor of IO times 11, then the overall amplification factor from Q4 to 02 is IOO
X 50X lO=sOOOOo times. In other words, the IRI which is normally about (IOA (l 1 1) / 50000 times} = 0.2 mA) will be reduced to about (100 - ^ (let) / soooo times} = 2 μA when a failure occurs. 2μ^ to 0.2w
It has been extremely difficult to control 1t1 over a wide range up to about +A and supply a stable base current.

そこで以上に述べたように、ベース電流18lを100
■AからIOA程度までの範囲で安定して制御すること
が半導体遮断装置の課題となっていた。
Therefore, as mentioned above, the base current 18l is
■ Stable control in the range from A to IOA has been a challenge for semiconductor cut-off devices.

この発明は上記のような課題を解決するためになされた
もので、短絡等の故障時から定格時まで安定したベース
電流を供給することによって主回路電流を精度よく限流
できる半導体遮断装置を得ることを目的とする。
This invention was made in order to solve the above-mentioned problems, and provides a semiconductor interrupting device that can accurately limit the main circuit current by supplying a stable base current from the time of a failure such as a short circuit to the rated state. The purpose is to

[課題を解決するための手段] この発明に係る半導体遮断装置は、 主回路電流測定手段、 前記主回路電流測定手段によって測定された主回路電流
値に応じてその主回路電流を主回路に流し得る時間(限
流時間と呼ぶ)を算出する限流時間算出回路、 前記主回路電流測定手段の信号によって主回路電流を限
流制御する半導体素子駆動用微小電流発生回路、 主回路に所定の電流を流す定格時の半導体素子駆動用回
路、 主回路に定格を超える電流(過電流)が流れた時、前記
定格時の半導体素子駆動用回路をオフし、該過電流が前
記限流時間以」二流れた時、前記半導体素子駆動用微小
電流発生回路を続けてオフする制御回路、 を具備している。
[Means for Solving the Problems] A semiconductor interrupting device according to the present invention includes a main circuit current measuring means, and a main circuit current measuring means that causes the main circuit current to flow through the main circuit according to the main circuit current value measured by the main circuit current measuring means. a current-limiting time calculation circuit that calculates the current-limiting time (referred to as current-limiting time); a microcurrent generating circuit for driving a semiconductor element that controls the current-limiting of the main circuit current based on a signal from the main circuit current measuring means; When a current (overcurrent) exceeding the rating flows in the main circuit of the semiconductor element drive circuit at the rated time, the semiconductor element drive circuit at the rated time is turned off, and the overcurrent exceeds the current limit time. a control circuit that continuously turns off the microcurrent generating circuit for driving a semiconductor element when two currents are flowing.

[作用] この発明における半導体遮断装置は主回路に過電流が流
れた場合、定格時の半導体素子駆動用回路がオフされ、
限流時間の間は限流制御する半導体素子駆動用微小電流
発生回路が主回路の過電流を限流して流す。
[Function] In the semiconductor interrupting device of the present invention, when an overcurrent flows in the main circuit, the circuit for driving the semiconductor element at the rated state is turned off,
During the current-limiting time, the semiconductor element drive minute current generating circuit that performs current-limiting control limits the overcurrent in the main circuit and allows it to flow.

[実施例] この発明に係る半導体遮断装置を、その一実施を示す第
1図から第2図を用いて説明する。第1図は半導体遮断
装置の回路図、第2図は第1図の回路中における主要な
電流の時間変化を示した図である。
[Example] A semiconductor cut-off device according to the present invention will be described with reference to FIGS. 1 and 2 showing one implementation thereof. FIG. 1 is a circuit diagram of a semiconductor interrupting device, and FIG. 2 is a diagram showing changes over time of main currents in the circuit of FIG. 1.

まず、半導体遮断装置に閏路時の定4¥J電流が流れて
いる時について説明する。
First, a description will be given of when a constant 4 J current flows through the semiconductor cut-off device during a jump.

外部より本半導体遮断装置を閉とするためにまず、ON
/OFF制御回路6゜にオン指令が入力される。
In order to close this semiconductor cut-off device from the outside, first turn it on.
An ON command is input to the /OFF control circuit 6°.

この時公知の電流一電圧変換器を使用した電流センサ9
からの信号は0^であり、当然過電流設定器20の設定
する電流値より小さい。それにより電圧比較器30はオ
フ信号を出力するのでノットゲート素子38の出力はオ
ンとなる。従ってアンド回路39の出力はオンとなり、
定格時ベースドライブ回路!2をオンさせる。すなわち
トランジスタQDがオンし、ベース電流IllがQ4.
 Q3, Q2のトランジスタの増11作用によって例
えばIOA流れ、トランジスタQ1がオンする。よって
主回路電源である直流電源1から電流センサ9、トラン
ジスタQ+、逆電圧防止用ダイオード14とを介して負
荷2につながる主回路が閑路されることになる。又、こ
の時同時に電流センサ9からの0^の信号は公知の双曲
線関数発生回路等よりなる限流時間算出回路35に入力
される。この限流時間算出回路35は電流センサ9の信
号が定格電流以下では限流時間を無限大(ω)として設
定する。すなわち定格電流以下の主回路電流に対して時
間的な制限を与えずに流すために比較器(デイジタルコ
ンパレータ)36の十入力端に無限時間に相当するパル
ス数信号mを入力する。
At this time, a current sensor 9 using a known current-to-voltage converter
The signal from is 0^, which is naturally smaller than the current value set by the overcurrent setting device 20. As a result, the voltage comparator 30 outputs an off signal, and the output of the not gate element 38 is turned on. Therefore, the output of the AND circuit 39 is turned on,
Base drive circuit at rated time! Turn on 2. That is, transistor QD is turned on, and base current Ill becomes Q4.
For example, IOA flows due to the effect of transistors Q3 and Q2, and transistor Q1 is turned on. Therefore, the main circuit connected from the DC power supply 1, which is the main circuit power supply, to the load 2 via the current sensor 9, the transistor Q+, and the reverse voltage prevention diode 14 is shut off. Also, at the same time, the 0^ signal from the current sensor 9 is input to the current limit time calculation circuit 35, which is comprised of a known hyperbolic function generation circuit or the like. The current limit time calculation circuit 35 sets the current limit time to infinity (ω) when the signal from the current sensor 9 is below the rated current. That is, a pulse number signal m corresponding to an infinite time is inputted to the input terminal of the comparator (digital comparator) 36 in order to allow the main circuit current below the rated current to flow without any time limit.

又電圧比較器30は前述のようにオフ出力であるので以
下のアンド回路33及びカウンタ回路34からはパルス
数信号nは出力されていないつまりOである。従って(
十入力端への入力〉一人力端への入力)の時は出力をオ
ンする比較器(デイジタルコンハレータ)36の出力は
オンとなる。このオン信号と外部よりのオン指令がアン
ド回路37を通って限流時ベースドライブ回路4lをオ
ンする切換回路23をオンすることになる。
Further, since the voltage comparator 30 is in the OFF output as described above, the pulse number signal n is not outputted from the AND circuit 33 and the counter circuit 34 described below, that is, it is O. Therefore (
When the input to the input terminal is greater than the input to the input terminal, the output of the comparator (digital conhalator) 36, which turns on the output, is turned on. This ON signal and an external ON command pass through the AND circuit 37 and turn on the switching circuit 23 which turns on the base drive circuit 4l during current limiting.

このとき限流時ベースドライブ回路4lは以下のように
動作している。すなわち、OAもしくは定格の主回路電
流に対する電流センサ9からの出力電圧は限流値設定器
3lの電圧より小さいため差動増幅器l9はプラスの電
圧を出力する。この出力はリミッタ回路付きの積分回路
25を通じて加算回路2lに入力される。この積分回路
に付加されたリミッタ回路は、差動増幅器l9の出力電
圧が積分されて大きくなっても、加算回路2lに対して
、ある一定電圧以上出力しない働きをもつ。例えばこの
リミット値をベース電流IBへの換算で±50mAに設
定する。ここでIs2設定器22の電圧をベース電流]
9への換算で100mAに設定すると、このケースでは
、加算回路2!の出力電圧がlOQsA+ 50mA=
 150mA相当の電圧となる。この電圧が切換回路2
3を通じて定電流回路24で電圧/[流変換され、トラ
ンジスタQ1に1112 (この場合!50mA)を供
給する。したがって結局トランジスタQrのベース電流
1BはII+−1−IB2(例えば10. 15A)と
なる。この状態でトランジスタQlはオンし、遮断器は
閑となっている。
At this time, the current limiting base drive circuit 4l operates as follows. That is, since the output voltage from the current sensor 9 with respect to the OA or rated main circuit current is smaller than the voltage of the current limit value setter 3l, the differential amplifier 19 outputs a positive voltage. This output is input to the adding circuit 2l through the integrating circuit 25 with a limiter circuit. The limiter circuit added to this integrating circuit has the function of not outputting more than a certain voltage to the adding circuit 2l even if the output voltage of the differential amplifier l9 is integrated and becomes larger. For example, this limit value is set to ±50 mA in terms of base current IB. Here, the voltage of the Is2 setter 22 is the base current]
When converted to 9 and set to 100mA, in this case, adder circuit 2! The output voltage is lOQsA+ 50mA=
The voltage is equivalent to 150mA. This voltage is the switching circuit 2
3, the constant current circuit 24 performs voltage/current conversion, and supplies 1112 (in this case, !50 mA) to the transistor Q1. Therefore, in the end, the base current 1B of the transistor Qr becomes II+-1-IB2 (for example, 10.15 A). In this state, the transistor Ql is turned on and the circuit breaker is idle.

次に負荷短絡等によって主回路電流が急激に増加し、あ
らかじめ設定されている過電流設定器2oの値より大き
くなった場合について説明する。この時ON/OFF制
御回路6゜中の電圧比較器30はオン信号を出力するこ
とになる。したがって7ットゲート素子38の出力はオ
フし、アンド回路39の出力もオフとなる。よって定格
時ベースドライブ回路l2はオフされる。すなわちr 
B1= oとなる。
Next, a case will be described in which the main circuit current suddenly increases due to a load short circuit or the like and becomes larger than the preset value of the overcurrent setting device 2o. At this time, the voltage comparator 30 in the ON/OFF control circuit 6 will output an ON signal. Therefore, the output of the 7t gate element 38 is turned off, and the output of the AND circuit 39 is also turned off. Therefore, the base drive circuit 12 is turned off at the rated time. That is, r
B1=o.

ところがこの時、限流時間算出回路35は急激に増加し
た主回路電流に対してその内蔵の双曲線関数に従って限
流時間を例えばlomsec等と算出する。
However, at this time, the current-limiting time calculation circuit 35 calculates the current-limiting time, for example, romsec, according to its built-in hyperbolic function for the main circuit current that has suddenly increased.

すなわちこのlO■Secに対するパルス数信号mを比
較器36の十入力端に与える。一方前述の電圧比較器3
0のオン出力はアンド凹路33に入力されており、この
ため発振器32からクロックパルスがアンド回路33の
出力に現れる。このクロックパルスはカウンタ回路34
に入力されてパルス数がカウントされる。よってこのパ
ルス数信号nが比較器36の一人力端に与えられる。す
なわちこの比較器36は前述の十入力端に入力された1
0■seeに算定された限流時間に対して一人力端に入
力された実際の過電流状態の時間を比較しており、ma
nの間はアンド回路37にオン信号を出力する。つまり
過電流の状態になっても限流時間中は限流時のベースド
ライブ回路の切換回路23をオンさせたままにさせる。
That is, the pulse number signal m for this lO■Sec is applied to the ten input terminal of the comparator 36. On the other hand, the voltage comparator 3 mentioned above
The ON output of 0 is input to the AND concave path 33, so that a clock pulse from the oscillator 32 appears at the output of the AND circuit 33. This clock pulse is sent to the counter circuit 34.
The number of pulses is counted. Therefore, this pulse number signal n is applied to the single output terminal of the comparator 36. In other words, this comparator 36
The actual overcurrent state time input to the single power terminal is compared with the current limit time calculated in 0■see, and ma
During n, an ON signal is output to the AND circuit 37. In other words, even if an overcurrent occurs, the switching circuit 23 of the base drive circuit during current limiting is kept on during the current limiting time.

したがって以上の結果ベース電流■8はlH+Im2(
例えば10. 15A)からIB2(例えば150mA
)に移行する。
Therefore, the above result base current ■8 is lH+Im2(
For example, 10. 15A) to IB2 (e.g. 150mA)
).

これによりトランジスタQ1に流れる電流1cは抑えら
れるが、この電流ICを検出する電流七ンサ9の出力電
圧と限流値設定器31の電圧が差動増幅回路19で比較
される。(9の出力電圧) > (31の設定電圧)の
時は、19の出力電圧をマイナスにして、リミッタ回路
付積分回路25に入力することにより、25からの1v
の値はマイナスになり、加算口路21の出力も小さくな
る。この結果、定電流回路24からのベース電流112
は小さくなり、トランジスタQ1に流れる電流も小さく
なる。又(9の出力電圧)<(31の設定電圧)の時は
、!9の出力電圧をプラスにして、リミッタ回路付積分
回路25に入力することにより、25のIvの鮪が大き
くなり、加算回路2lの出力も大きくなる。この結果定
電流回路24からのベース電流112は大きくなり、ト
ランジスタQ1に流れる電流も大きくなる。このような
動作を繰返し、限流時ベースドライブ回路4lは(9の
出力電圧) = (31の設定電圧)、すなわちトラン
ジスタQ1に流れる電流=限流値(定格電流の2〜3倍
程度の値)になるように112を制御する。
This suppresses the current 1c flowing through the transistor Q1, but the differential amplifier circuit 19 compares the output voltage of the current sensor 9 that detects this current IC with the voltage of the current limit value setter 31. When (output voltage of 9) > (set voltage of 31), by making the output voltage of 19 negative and inputting it to the integrating circuit with limiter circuit 25, the 1V from 25 is
The value becomes negative, and the output of the addition port 21 also becomes small. As a result, the base current 112 from the constant current circuit 24
becomes small, and the current flowing through transistor Q1 also becomes small. Also, when (output voltage of 9) < (set voltage of 31), ! By making the output voltage of No. 9 positive and inputting it to the integrating circuit with limiter circuit 25, the tuna of Iv No. 25 becomes large, and the output of the adder circuit 2l also becomes large. As a result, the base current 112 from the constant current circuit 24 increases, and the current flowing through the transistor Q1 also increases. By repeating this operation, the base drive circuit 4l at current limit becomes (output voltage of 9) = (set voltage of 31), that is, current flowing through transistor Q1 = current limit value (value about 2 to 3 times the rated current). ).

又過電流の状態の時間が限流時間を超えたときはON/
OFF制御回路6゛中の比較器36の入力の状態がma
nとなり、アンド回路37にオフ信号を出力することに
なる。したがって切換回路23もオフされることになる
。よってトランジスタQlに対する+12も0となりト
ランジスタQ1はオフし、主回路は開となる。
Also, when the overcurrent state time exceeds the current limit time, the ON/
The state of the input of the comparator 36 in the OFF control circuit 6 is ma
n, and an off signal is output to the AND circuit 37. Therefore, the switching circuit 23 is also turned off. Therefore, +12 for transistor Ql also becomes 0, transistor Q1 is turned off, and the main circuit is opened.

る。Ru.

なお本実施例では、通常時も限流時ベースドライブ回路
41を動作させている。これは、通常時→限流時の切換
にあたり、限流時ベースドライブ回路4lの立上りが遅
れ、トランジスタQtのベース電流Isを瞬間0にする
ことを防止し、安定した限流動作を行うためのものであ
る。
In this embodiment, the current-limiting base drive circuit 41 is operated even during normal times. This is to prevent the base current Is of the transistor Qt from instantaneously becoming 0 due to a delay in the rise of the base drive circuit 4l during current limiting when switching from normal to current limiting, and to perform stable current limiting operation. It is something.

なお、以上の実施例では主回路の素子、Qz等がトラン
ジスタの場合について説明したが、トランジスタ以外の
素子例えば、サイリスク等を使用した回路においても同
様の効果を奏する。
In the above embodiments, the main circuit elements such as Qz are transistors, but the same effect can be obtained in a circuit using elements other than transistors, such as silice.

又主回路のトランジスタQ1が1個だけでなく2個以上
組合わされている場合も同様の効果を奏する。
Further, the same effect can be obtained when not only one transistor Q1 but two or more transistors Q1 of the main circuit are combined.

[発明の効果] 以上のように本発明によれば半導体遮断装置の主回路に
過電流が流れたときは、定格時ベースドライブ回路がオ
フにされる。又、過電流時に、限流時間の間だけ、その
過電流を限流値に制御しながら流すための、限流時ベー
スドライブ回路を有する。そのため限流時に上位の遮断
器を動作させてしまうほど大きな電流を流すおそれのな
い、信頼性の高い半導体遮断装置が得られる。
[Effects of the Invention] As described above, according to the present invention, when an overcurrent flows in the main circuit of the semiconductor interrupting device, the rated base drive circuit is turned off. Further, it has a current limiting base drive circuit that allows the overcurrent to flow while controlling it to the current limiting value only during the current limiting time at the time of overcurrent. Therefore, it is possible to obtain a highly reliable semiconductor circuit breaker device that does not have the risk of flowing a current so large as to operate a higher order circuit breaker during current limiting.

【図面の簡単な説明】[Brief explanation of drawings]

第1図はこの発明の回路図、第2図は第1図の回路中に
おける主要な電流の時間変化を示した図、第3図は従来
の半導体遮断装置の回路図、第4図は遮断器回路系統図
、第5図はトランジスタ01のVCE−IC特性図であ
る。 図中9は電流センサ、12は定格時ベースドライブ回路
、41は限流時ベースドライブ回路、35は限流時間算
出回路、6゜はON/OFF制御回路である。
Fig. 1 is a circuit diagram of the present invention, Fig. 2 is a diagram showing changes in main currents over time in the circuit of Fig. 1, Fig. 3 is a circuit diagram of a conventional semiconductor cut-off device, and Fig. 4 is a cut-off diagram. FIG. 5 is a VCE-IC characteristic diagram of transistor 01. In the figure, 9 is a current sensor, 12 is a rated base drive circuit, 41 is a current limiting base drive circuit, 35 is a current limiting time calculation circuit, and 6° is an ON/OFF control circuit.

Claims (1)

【特許請求の範囲】[Claims] (1)主回路電流測定手段、 前記主回路電流測定手段によって測定された主回路電流
値に応じてその主回路電流を主回路に流し得る時間(限
流時間と呼ぶ)を算出する限流時間算出回路、 前記主回路電流測定手段の信号によって主回路電流を限
流制御する半導体素子駆動用微小電流発生回路、 主回路に所定の電流を流す定格時の半導体素子駆動用回
路、 主回路に定格を超える電流(過電流)が流れた時、前記
定格時の半導体素子駆動用回路をオフし、該過電流が前
記限流時間以上流れた時、前記半導体素子駆動用微小電
流発生回路を続けてオフする制御回路、 を具備する半導体遮断装置。
(1) Main circuit current measuring means, current limiting time for calculating the time during which the main circuit current can flow through the main circuit (referred to as current limiting time) according to the main circuit current value measured by the main circuit current measuring means. a calculation circuit, a micro current generation circuit for driving a semiconductor element that controls current limiting of the main circuit current according to the signal of the main circuit current measuring means, a circuit for driving the semiconductor element at a rated time that causes a predetermined current to flow through the main circuit; When a current exceeding the current limit (overcurrent) flows, the circuit for driving the semiconductor element at the rated state is turned off, and when the overcurrent flows for more than the current limit time, the circuit for driving the semiconductor element is continuously turned off. A semiconductor cut-off device comprising a control circuit that turns off.
JP1111102A 1989-04-28 1989-04-28 Semiconductor breaker device Pending JPH02290126A (en)

Priority Applications (1)

Application Number Priority Date Filing Date Title
JP1111102A JPH02290126A (en) 1989-04-28 1989-04-28 Semiconductor breaker device

Applications Claiming Priority (1)

Application Number Priority Date Filing Date Title
JP1111102A JPH02290126A (en) 1989-04-28 1989-04-28 Semiconductor breaker device

Publications (1)

Publication Number Publication Date
JPH02290126A true JPH02290126A (en) 1990-11-30

Family

ID=14552447

Family Applications (1)

Application Number Title Priority Date Filing Date
JP1111102A Pending JPH02290126A (en) 1989-04-28 1989-04-28 Semiconductor breaker device

Country Status (1)

Country Link
JP (1) JPH02290126A (en)

Cited By (1)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
CN106130522A (en) * 2016-07-14 2016-11-16 南京航空航天大学 A kind of SiC MOSFET gradual change level driving circuit being applicable to DC solid-state power controller and method

Cited By (2)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
CN106130522A (en) * 2016-07-14 2016-11-16 南京航空航天大学 A kind of SiC MOSFET gradual change level driving circuit being applicable to DC solid-state power controller and method
CN106130522B (en) * 2016-07-14 2018-12-07 南京航空航天大学 A kind of SiC MOSFET gradual change level driving circuit and method suitable for DC solid-state power controller

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