JPH02288461A - Line image sensor - Google Patents

Abstract

PURPOSE:To relieve the load of a device handling a picture or the system constitution by providing a scanning shift register and a delay shift register shifting and outputting picture information string from the scanning shift register by one picture element each in one and same semiconductor substrate. CONSTITUTION:A scanning shift register 41 and delay shift registers 42, 43 shifting and outputting a picture element information string outputted serially from the scanning shift register 41 serially by one picture element each while keeping the relation of position correspondence between lines with respect to the picture element information string in the scanning shift register 41 are integrated in one and same semiconductor substrate 10. Thus, plural picture information sets close to each other and plural picture information sets close to each other especially between lines are obtained simultaneously and a picture processing such as contour correction is simplified. Thus, the load of structure of the device handing a picture or the system such as a facsimile equipment is relieved.

Description

DETAILED DESCRIPTION OF THE INVENTION Field of the Invention The present invention relates to a line image sensor used, for example, in a scanner of a facsimile machine.

2. Description of the Related Art As shown in FIG. 11, a conventional line image sensor of this type includes a light-receiving element array 2 formed by arranging a large number of optical sensor elements such as photodiodes, and this light-receiving element array 2.
A scanning shift register 41 performs line scanning by serially shifting the pixel information string (PI to Pn) transferred pixel by pixel through the transfer gate 3 in parallel from the transfer gate 3 to the semiconductor substrate 10. The serial shift output of the scanning shift register 41 was taken out to the outside as the output 5out of the line image sensor 1 (for example, as described in "Nikkei Electronics, September 19, 1988," published by Nikkei BP). Day number no.

456 J, see page 258 (New Product Newsletter)).

Problems to be Solved by the Invention However, with this configuration, there is a problem that the configuration of an external device or system that uses the output of the line image sensor becomes complicated and large-scale.

The above problem arises for the following reasons.

That is, in facsimile machines and the like, image information read by a line image sensor is often subjected to processing such as contour correction and feature extraction in order to improve image quality. In order to effectively perform this contour correction, etc., information on a plurality of pixels that are close to each other, particularly information on a plurality of pixels that are close to each other from a two-dimensional direction across lines, is simultaneously required. However, the conventional line image sensor described above outputs one line of pixel information string only one pixel at a time in the order in which the pixels are arranged. For this reason, devices or systems that perform the above processing require a large-capacity buffer memory and peripheral circuits to control this memory in order to simultaneously obtain information on neighboring pixels from a two-dimensional direction, making the configuration difficult. It becomes complicated and large-scale.

The present invention has been made in view of the above-mentioned problems, and is a line image system that can reduce the configuration burden of a device or system that handles images such as a facsimile machine.
The purpose is to provide sensors.

Means for Solving the Problems In order to solve the above-mentioned problems, the present invention has a light-receiving element array that photoelectrically converts a line image pixel by pixel, and a pixel information array transferred in parallel from this light-receiving element array, one pixel at a time. By shifting and outputting the pixel information serially, the pixel information string outputted serially from the scanning shift register is connected to the pixel information string in the scanning shift register. This configuration has a structure in which delay shift registers that serially shift and output pixel by pixel while maintaining positional correspondence between them are integrated and formed within the same semiconductor substrate.

Effects of the present invention With the above-described configuration, information on a plurality of pixels in the vicinity of each other, especially information on a plurality of pixels in the vicinity across lines, can be obtained simultaneously, so that image processing such as contour correction can be easily performed. This makes it possible to reduce the burden on the configuration of a device or system that handles images, such as a facsimile machine.

Embodiment FIG. 1 shows a schematic configuration of a line image sensor according to an embodiment of the present invention, in which 1 indicates line image sensors integrated within the same semiconductor substrate 10.
2 is a light-receiving element array in which a large number of photosensor elements such as photodiodes are arranged in a line; 3 is a transfer gate; 41 is a pixel information array (PI) transferred in parallel from the light-receiving element array 2;
A scanning shift register 42 that performs line scanning by serially shifting and outputting pixels (~Pn) by one pixel;
and 43 serially outputs the pixel information string (PI to Pn) from the scanning shift register 41 one pixel at a time while maintaining the positional relationship between lines with the pixel information string in the scanning shift register 41. Delay shift register for shifting and outputting, 4' l-1 each shift register 4
Multiple pixel information outputs (g, h, a) adjacent to each other in the line direction (main scanning direction) for every 1 to 43
(f, x, b) (e, +L c) shift register section with parallel output taps, 5
is a plurality of pixel information outputs (g, h, a) (f, X, b) output for each register 41 to 42.
(e, a, c>) is a contour correction circuit that performs contour enhancement processing.

Here, as the shift registers 41 to 43, CO
An analog shift register is formed using D (charge coupled device), BBD (packet brigade device), and the like. Each of the shift registers 41 to 43 has shift stages (Sl-Sn) corresponding to the number of elements in the light receiving element array 2.
The analog pixel information photoelectrically converted by each light receiving element is serially shifted in the line direction while maintaining the positional correspondence between lines.

The contour correction circuit 5 outputs the pixel information (g.

predetermined coefficients (-γ, -α, -γ, -β, -1.-
β, −γ, −α.

-r) for weighting, and the outputs of this multiplier circuit array 51 (-γg, -αh, -γa.

-βf, -x, -βb, -γe, -αd, re), and performs contour correction processing using the contour enhancement processing formula %(e+g).

The operation of the line image sensor configured as described above will be explained below.

Figure 2 shows the line image sensor 1 shown in Figure 1.
, a scanning register 41, a delay register 42,
43 and the shift contents of the parallel output tapped register 4' at a certain point in time.

In the figure, the pixel information strings (PI to Pn) transferred in parallel from the light-receiving element string are serially shifted in the line direction by the scanning shift register 41, and are sequentially shifted one by one from the end.
It is output pixel by pixel. The above scanning shift register 41
The pixel information shifted within and sequentially output is serially shifted into the parallel output tapped register 4', and while being serially shifted in this register 4', is output in parallel from the input/output side of each shift stage. be done. As a result, three pixel information outputs (g.

h and a) are simultaneously taken out and output to the outside.

At the same time, the pixel information output from the scanning shift register 41 is serially shifted into the first delay shift register 42.
The inner pixels are serially shifted in synchronization with the shift operation of the scanning shift register 41 and output one pixel at a time from the end. This first delay shift register 4
As in the previous case, the pixel information shifted within 2 degrees and output is serially shifted into the parallel output tapped register 4', and while being serially shifted by this register 4 degrees,
They are output in parallel from the input and output sides of each shift stage. As a result, three pixel information outputs (b, x, f) adjacent to each other in the line read last time are simultaneously extracted and output to the outside.

Further, the pixel information sequentially output from the first delay shift register 42 is transferred to the second delay shift register 4.
3, are serially shifted in this delay shift register 43 in synchronization with the shift operation of the scanning shift register 41, and are output one pixel at a time from the end. The pixel information shifted in this second delay shift register 42 and output is also serially shifted into the parallel output tapped register 4', and is serially shifted by this register 4'. However, the signals are output in parallel from the input and output sides of each shift stage. As a result, three pixel information outputs ((!+d+8)) adjacent to each other in the line read two times before are simultaneously extracted and output to the outside.

In the above manner, as shown in FIG. 3, pixel information at positions adjacent to the line image sensor 1 in the two-dimensional direction of the main scanning direction (line direction) and sub-scanning direction (direction spanning between lines) is output. (g.

h, a, f, XI b, e, ct, c) are taken out and output at the same time.

This makes it possible to easily perform image processing such as contour correction, thereby reducing the burden on the configuration of a device or system that handles images, such as a facsimile machine.

FIG. 4 shows a line image according to the second embodiment of the present invention.
The schematic configuration of the sensor is shown.

To explain the main differences from the embodiment described above, in the line image sensor 1 shown in the figure, the multiplication circuit array 51 and addition circuit 52 forming the contour correction circuit 5 are different from the light receiving element array 2, the scanning The delay shift register 41 and the delay shift register 41 and 42 are integrated in the same semiconductor substrate 10. The correction output Xout from the contour correction circuit 5 is taken out to the outside of the semiconductor substrate 10 through a terminal 11.

This eliminates the need to increase the number of external terminals of the line image sensor 1, and since the contour-corrected output The configuration burden can be further reduced.

FIG. 5 shows a line image according to a third embodiment of the present invention.
The schematic configuration of the sensor is shown.

In the line image sensor 1 shown in the figure, pixel information outputs (h.

A parallel output tapped register 4' is arranged so that L Xt b, d) can be taken out at the same time.

The correction circuit 5 that performs contour enhancement processing from this pixel information output (hl fl XI bl d) is connected to the resistor R1゜R2
, R3, R4, and an addition circuit 52 including a buffer resistor Ri and an operational amplifier 53, Xout=x-α(d+h)-β(bl
The edge enhancement correction process is performed using the formula f).

FIG. 6 shows a line image according to a fourth embodiment of the present invention.
The schematic configuration of the sensor is shown.

In addition to the scanning shift register 41, the line image sensor 1 shown in the figure has four delay shift registers 42, 43, 44, 45 and four stages of parallel output tapped registers 4' on the same semiconductor substrate. As shown in FIG. 7, a total of five pixel information outputs (A-Y) adjacent to each other by five pixels in the two-dimensional direction are simultaneously taken out.

When a lot of neighboring image information is extracted simultaneously in this way,
Image processing other than contour enhancement, such as processing for extracting image features, can also be performed efficiently.

FIG. 8 shows a line image according to a fifth embodiment of the present invention.
The schematic configuration of the sensor is shown.

The line image sensor 1 shown in FIG. The output of the delay shift register 42 is also shifted by the parallel output tapped shift register 4' and then shifted into the second delay shift register 43.

By sequentially shifting the pixel information string for multiple lines in this manner, multiple pixel information adjacent in the two-dimensional direction (L hl a, L x, b) can be output.

e, d, and c) can be taken out at the same time.

FIG. 9 shows a line image according to the sixth embodiment of the present invention.
The schematic configuration of the sensor is shown.

In the line image sensor 1 shown in the figure, a gate 6 is interposed in the serial shift output of the scanning register 41. Then, the gate 6 receives an external control signal (
(not shown), the pixel information strings (p1 to Pn) transferred in parallel to the scanning shift register 41 are serially shifted and output, and together with this, the pixel information strings in each delay register 42 and 43 are opened. (P1=Pn) is also serially shifted and output.

By providing the gate 6, the parallel transfer operation of the pixel information string from the light receiving element array 2 to the scanning register 4I can be performed independently from other operations. That is, the parallel transfer interval of the image information sequence from the light receiving element array 2 to the scanning shift register 41 and the output interval of the line image sensor can be set separately from each other.

When an accumulation-type photosensor element such as a COD is used in the light-receiving element array 2, the photoelectric conversion output, the sensitivity and accumulation time of the light-receiving element, that is, the accumulated charge are transferred to the scanning shift register 4.
1 depending on the time interval transferred. The reason for providing the gate 6 is that scanning and transfer are performed at regular intervals to keep the photoelectric conversion output constant, and the gate 6 is used only during necessary periods.
This is to enable extraction and passage. Such a function is useful for G3 facsimiles that perform intermittent sub-scanning.

Although the embodiments have been described above, the present invention can be modified in various ways other than the above embodiments.

For example, if the pixel information output is binary output of black pixels and white pixels, the shift registers 41 to 45 and 4
′ can each be configured with a digital shift register.

In addition, in the embodiment, COD is used and data is transferred to the scanning shift register in parallel using a transfer gate, but non-storage type photosensors such as CDS image sensors can be used in series without performing such an operation. A pixel information sequence can be obtained. In addition,
The present invention can also be applied to cases where a shift register is used only to control switches for scanning, such as in an MO8 optical sensor, and a serial pixel information string is obtained through a separate system.

Furthermore, in place of the contour correction circuit 5, (A
) (B) (C) As shown in (D), image processing circuits that extract image features such as points and lines from information on multiple pixels adjacent in two dimensions are integrated on the same semiconductor substrate. It may be a configuration.

Effects of the Invention As is clear from the above explanation, the present invention has a light-receiving element array that photoelectrically converts a line image pixel by pixel, and a pixel information array transferred from this light-receiving element array that is shifted by one pixel and output. By doing this, together with the scanning shift register that performs line scanning, the pixel information string serially output from this scanning shift register is transferred into one while maintaining the positional relationship between the lines with the pixel information string in the scanning shift register. By integrating delay shift registers that serially shift and output pixel by pixel parts on the same semiconductor substrate, information on multiple pixels in the vicinity of each other, especially information on multiple pixels in the vicinity across lines, can be obtained simultaneously. Therefore, it is possible to easily perform image processing such as contour correction, thereby reducing the burden on the configuration of a device or system that handles images, such as a facsimile machine.

[Brief explanation of the drawing]

FIG. 1 is a schematic configuration diagram of a line image sensor according to an embodiment of the present invention, FIG. 2 is a diagram showing a part of the same device extracted for explaining the operation, and FIG. 4 is a schematic configuration diagram of a line image sensor according to a second embodiment of the present invention, and FIG. 5 is a diagram showing a line image sensor according to a third embodiment of the present invention. FIG. 6 is a schematic diagram of the line image sensor according to the fourth embodiment of the present invention, FIG. 7 is a diagram showing the positional relationship of neighboring pixel information obtained simultaneously by the same device, and FIG. 9 is a schematic configuration diagram of a line image sensor according to a fifth embodiment of the present invention.
This figure is a schematic configuration diagram of a line image sensor according to a sixth embodiment of the present invention, and FIG. 10 is a diagram showing an example of image processing other than contour correction. 11th birthday
C) U. DESCRIPTION OF SYMBOLS 1... Line image sensor, lO... Semiconductor substrate, 11... Output terminal, 2... Light receiving element array, ejection
・Transfer gate, 41...Scanning shift register, 42
．． 43.44°45...Delay shift register, 4°
. . . Register with parallel output taps, 5 . . . Contour correction circuit as an image processing circuit, 6 . . . Gate. Name of agent: Patent attorney Shigetaka Awano and one other person 1f Figure ゛Fin image te = pump l 〉7) Shiji × Ri 41' /Q rod sea ⑵ 1 fu] Kamikoen 1 (

Claims (1)

[Claims] 1. Scanning in which line scanning is performed by a light-receiving element array that photoelectrically converts a line image pixel by pixel, and a pixel information array transferred from this light-receiving element array, shifted by one pixel and output. and a pixel information string serially output from the scanning shift register, and serially shifting the pixel information string one pixel at a time while maintaining the positional relationship between lines with the pixel information string in the scanning shift register. A line image sensor equipped with an output delay shift register on the same semiconductor substrate. 2. A light-receiving element array that photoelectrically converts a line image pixel by pixel, a scanning shift register that performs line scanning by shifting the pixel information array transferred from the light-receiving element array one pixel at a time and outputting it; A delay shift register that serially shifts the pixel information string serially output from the scanning shift register one pixel at a time while maintaining line-to-line positional correspondence with the pixel information string in the scanning shift register. and a circuit for performing image processing based on a plurality of pieces of pixel information obtained simultaneously from the scanning shift register and the delay shift register, which are integrated on the same semiconductor substrate.