JPH02287438A - Nonlinear resistance element - Google Patents

Nonlinear resistance element

Info

Publication number
JPH02287438A
JPH02287438A JP1109331A JP10933189A JPH02287438A JP H02287438 A JPH02287438 A JP H02287438A JP 1109331 A JP1109331 A JP 1109331A JP 10933189 A JP10933189 A JP 10933189A JP H02287438 A JPH02287438 A JP H02287438A
Authority
JP
Japan
Prior art keywords
electrode layer
layer
semiconductor layer
resistance element
nonlinear resistance
Prior art date
Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
Pending
Application number
JP1109331A
Other languages
Japanese (ja)
Inventor
Koichi Kodera
宏一 小寺
Yoshiyuki Tsuda
善行 津田
Yuji Mukai
裕二 向井
Hideaki Yasui
秀明 安井
Current Assignee (The listed assignees may be inaccurate. Google has not performed a legal analysis and makes no representation or warranty as to the accuracy of the list.)
Panasonic Holdings Corp
Original Assignee
Matsushita Electric Industrial Co Ltd
Priority date (The priority date is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the date listed.)
Filing date
Publication date
Application filed by Matsushita Electric Industrial Co Ltd filed Critical Matsushita Electric Industrial Co Ltd
Priority to JP1109331A priority Critical patent/JPH02287438A/en
Publication of JPH02287438A publication Critical patent/JPH02287438A/en
Pending legal-status Critical Current

Links

Abstract

PURPOSE:To obtain the nonlinear resistance element which has the simple ele ment structure for which the extreme fineness is not required and is large in a thin-film margin by interposing a semiconductor layer essentially consisting of In and Sb between a 1st electrode layer and a 2nd electrode layer. CONSTITUTION:The 1st electrode layer 2 consisting of Cr is formed by a sputtering method on a glass substrate 1 and the semiconductor layer 6 consisting of the In and Sb is laminated thereon. Further, an interlayer insulating layer 8 consisting of SiO2 having a contact hole is formed and the 2nd electrode layer 4 consisting of Cr is provided. The 2nd electrode layer 4 is connected to a transparent picture element electrode layer 5 consisting of ITO. A compd. InSb, is therefore, easily formed in the semiconductor layer 6 consisting of the In and Sb and is dispersed at a high density in the form of fine crystals in the layer. A barrier is formed by the influence of the trapping of these crystal grain boundaries and nonlinearity is exhibited in V-I characteristics. The element which is simple in the element structure and is large in the film thickness margin is obtd. in this way.

Description

【発明の詳細な説明】 産業上の利用分野 本発明は表示デバイス用の非線形抵抗素子に関する。[Detailed description of the invention] Industrial applications The present invention relates to a nonlinear resistance element for display devices.

従来の技術 液晶、エレクトロルミネセンス等の表示デバイスにおい
て、高精細度な画面を得るためには、走査線数を増やし
た高密度なマ) IJクス構成が必要である。このよう
なマトリクスを有効的に駆動させるため、各表示素子に
スイッチング素子を取り付けたアクティブマトリクス駆
動方式が注目されている。このアクティブマトリクス駆
動に使用されるスイッチング素子として、通常、薄膜ト
ランジスタ(TPT)を代表とした3端子型素子と、M
etal−Insulator−Metal (M I
 M )や薄膜ダイオードを代表とした2端子型素子が
一般的である。2端子型素子は3端子型素子に比べて構
造が簡単で、製造歩留まりが高いため、大画面用として
注目されており、特にMIMは適切なしきい値電圧を持
つ非線形抵抗素子の一例である。
In order to obtain a high-definition screen in conventional display devices such as liquid crystals and electroluminescent devices, a high-density matrix structure with an increased number of scanning lines is required. In order to effectively drive such a matrix, an active matrix drive system in which a switching element is attached to each display element is attracting attention. The switching elements used for this active matrix drive are usually three-terminal elements such as thin film transistors (TPT), and M
etal-Insulator-Metal (MI
Two-terminal devices such as M ) and thin film diodes are common. Two-terminal elements have a simpler structure and higher manufacturing yield than three-terminal elements, so they are attracting attention as a device for large screens. In particular, MIM is an example of a nonlinear resistance element with an appropriate threshold voltage.

第5図に従来のMIM素子の断面構成の一例を示す。ガ
ラス基板la上にTaより成る第一電極層2aを形成し
、続いてTag Osより成る絶縁体層3aをその上に
形成する。さらに、Alより成る第二電極層4aを形成
し、ITOより成る透明画素電極層5aに接続させる。
FIG. 5 shows an example of a cross-sectional configuration of a conventional MIM element. A first electrode layer 2a made of Ta is formed on a glass substrate la, and then an insulator layer 3a made of Tag Os is formed thereon. Furthermore, a second electrode layer 4a made of Al is formed and connected to the transparent pixel electrode layer 5a made of ITO.

このような構成によリ、8V程度のしきい値電圧を示し
、スイッチング素子として機能する。
With such a configuration, it exhibits a threshold voltage of about 8V and functions as a switching element.

発明が解決しようとする課題 しかしながら、この素子には2つの大きな課題がある。Problems that the invention aims to solve However, this device has two major problems.

まず第一に、素子面積を極めて小さくしなくてはならな
いことである。絶縁体層3aを構成するTa205 の
誘電率は非常に大きく、その結果として素子としての電
気容量Cn+は大きくなる。液晶デイスプレィの場合、
液晶層の電気容量をCooとすると、Cn17CI0を
1/10以下にすることが必須条件であり、素子構造を
微細にしなくてはならない。
First of all, the device area must be extremely small. The dielectric constant of Ta205 constituting the insulator layer 3a is very high, and as a result, the electric capacitance Cn+ of the element becomes large. In the case of a liquid crystal display,
If the capacitance of the liquid crystal layer is Coo, it is essential to reduce Cn17CI0 to 1/10 or less, and the element structure must be made fine.

このことは素子歩留まりを低下させる原因になる。This causes a decrease in device yield.

第二に、絶縁体層3aの膜厚が微妙にV−1特性のしき
い値電圧に影響を及ぼす点であり、±3%という厳しい
膜厚管理を行う必要がある。
Second, the thickness of the insulator layer 3a has a slight effect on the threshold voltage of the V-1 characteristic, and it is necessary to strictly control the thickness of ±3%.

本発明は上述のような従来の課題に鑑み成されたもので
あり、微細性の要求されない簡単な素子構造で、かつ膜
厚マージンの大きい非線形抵抗素子を提供するものであ
る。
The present invention has been made in view of the above-mentioned conventional problems, and provides a nonlinear resistance element that has a simple element structure that does not require fineness and has a large film thickness margin.

課題を解決するための手段 本発明は、第一電極層と第二電極層の間に、InとSb
を主成分とする半導体層を介在させて非線形抵抗素子を
構成することを特徴としている。
Means for Solving the Problems The present invention provides In and Sb between the first electrode layer and the second electrode layer.
It is characterized in that a nonlinear resistance element is constructed by interposing a semiconductor layer containing as a main component.

作   用 InとSbより成る半導体層では、容易に化合物1nS
bが作られ、これが微細結晶の形で層中に高密度に分散
される。これらの結晶粒界のトラップの影響で障壁が形
成され、V−I特性において非線形性を示すようになる
Function: In a semiconductor layer composed of In and Sb, the compound 1nS is easily formed.
b is produced, which is densely dispersed in the layer in the form of fine crystals. Barriers are formed under the influence of these grain boundary traps, and the VI characteristics exhibit nonlinearity.

この半導体層の誘電率はTa206の誘電率に比べて1
720以下であることより、素子の電気容量C1,は小
さくなり、素子面積を極めて小さくする必然性はない。
The dielectric constant of this semiconductor layer is 1 compared to that of Ta206.
Since it is 720 or less, the electric capacitance C1 of the element becomes small, and there is no necessity to make the element area extremely small.

したがって、微細性の要求されない簡単な素子構造にす
ることができる。
Therefore, a simple device structure that does not require fineness can be achieved.

また、半導体層における障壁の高さは、MIM素子とは
異なり、その膜厚の影響を受けにくく、±lθ%の膜厚
精度を確保すれば、実用上さしつかえない。
Further, unlike an MIM element, the height of a barrier in a semiconductor layer is not easily affected by its film thickness, and as long as a film thickness accuracy of ±lθ% is ensured, there is no problem in practical use.

なお、InSbに対して過剰にInあるいはSbが含ま
れた場合、これらは微細結晶を包み込む形になると考え
られるが、ある程度の量までは障壁の高さを変化させる
までには至らない。しかし、微細結晶1nSbに対して
過剰Inあるいは過剰Sbの割合が高くなると、微細結
晶1nSbの分布密度が低くなり、非線形性の低下が見
られるようになる。
Note that if In or Sb is included in excess of InSb, it is thought that these will envelop the fine crystals, but up to a certain amount they will not change the height of the barrier. However, when the ratio of excess In or excess Sb to 1nSb microcrystals becomes high, the distribution density of 1nSb microcrystals becomes low, and a decrease in nonlinearity is observed.

したがって、半導体層の組成としては、In5aSbs
s(原子%)を中心として、ln3@Sbv自からIn
vsSbs*までの範囲であることが望ましい。
Therefore, the composition of the semiconductor layer is In5aSbs
Centering on s (atomic %), from ln3@Sbv itself to In
The range is preferably up to vsSbs*.

実施例 以下、本発明の実施例について図面をもとに説明する。Example Embodiments of the present invention will be described below with reference to the drawings.

(第1の実施例) 第1図は、本発明の第1の実施例における非線形抵抗素
子の断面構成図を示している。
(First Example) FIG. 1 shows a cross-sectional configuration diagram of a nonlinear resistance element in a first example of the present invention.

図中、ガラス基板1上にスパッタ法によりCrより成る
第一電極層2を厚さ1100nで形成し、その上にIn
とSbより成る半導体層6をスパッタ法で厚さ300n
mに積層する。ここでは、半導体層6の組成をSbs*
T8ss  (原子%)としている。さらにコンタクト
ホール7を有する5102より成る層間絶縁層8を厚さ
200nmで形成し、Crより成る第二電極層4を厚さ
+00nmで設ける。この第二電極層4はITOより成
る透明画素電極層5に接続される。
In the figure, a first electrode layer 2 made of Cr is formed with a thickness of 1100 nm on a glass substrate 1 by sputtering, and an In
A semiconductor layer 6 made of
laminate to m. Here, the composition of the semiconductor layer 6 is Sbs*
T8ss (atomic %). Further, an interlayer insulating layer 8 made of 5102 and having a contact hole 7 is formed to a thickness of 200 nm, and a second electrode layer 4 made of Cr is provided to a thickness of +00 nm. This second electrode layer 4 is connected to a transparent pixel electrode layer 5 made of ITO.

このようにして構成される素子の電圧−電流特性(V−
I特性)を第2図に示す。5V程度のしきい値電圧をも
ち、スイッチング素子として十分な非線形特性を有して
いる。
The voltage-current characteristics (V-
I characteristics) are shown in Figure 2. It has a threshold voltage of about 5V and has sufficient nonlinear characteristics as a switching element.

(第2の実施例) 第3図に、本発明の第2の実施例における非線形抵抗素
子の断面構成図を示す。
(Second Embodiment) FIG. 3 shows a cross-sectional configuration diagram of a nonlinear resistance element in a second embodiment of the present invention.

ガラス基板1上に、スパッタ法によりCr層を形成し、
これをパターニングにより、間隙部9を有して第一電極
層2と第二電極層4に分割する。
A Cr layer is formed on the glass substrate 1 by sputtering,
This is divided into a first electrode layer 2 and a second electrode layer 4 with a gap 9 by patterning.

第一電極層2と間隙部9と第二電極層4を覆う形でIn
とSbより成る半導体層6を形成する。第二電極層4に
は透明画素電極層5を接続させ、透明画素電極層5への
電荷の移動を可能にする。このような構成においても第
2図に示すような非線形特性を示し、有効である。
In a form that covers the first electrode layer 2, the gap 9 and the second electrode layer 4.
A semiconductor layer 6 made of and Sb is formed. A transparent pixel electrode layer 5 is connected to the second electrode layer 4 to enable charge to move to the transparent pixel electrode layer 5. Even such a configuration exhibits nonlinear characteristics as shown in FIG. 2 and is effective.

なお、第4図に示す様に、半導体層θ上に、接触界面に
おいてオーミック接触性を有する導電体層重0を積層す
れば、間隙部9の長さ等の影響を直接受けなくなり、制
御性の向上が期待でき、より好ましい。
As shown in FIG. 4, if a conductive layer 0 having ohmic contact properties is laminated on the semiconductor layer θ at the contact interface, it will not be directly affected by the length of the gap 9, etc., and the controllability will be improved. is expected to improve, and is more preferable.

第1、第2の実施例において第一電極層2と第二電極層
4を同一材質で構成しているが、これは第一電極層2と
半導体層6との界面、および半導体層6と第二電極層4
との界面において形成される障壁の高さを同一にし、V
−I特性の対称性を確保する上で重要な要素である。
In the first and second embodiments, the first electrode layer 2 and the second electrode layer 4 are made of the same material. Second electrode layer 4
The height of the barrier formed at the interface with V
- This is an important element in ensuring the symmetry of the I characteristic.

なお、上記実施例では第一電極層2と第二電極層4をC
rで構成しているが、本発明はこれに限定されるもので
はない。ITOのような透明導電体を適用してもよい。
In the above embodiment, the first electrode layer 2 and the second electrode layer 4 are made of C.
r, but the present invention is not limited thereto. A transparent conductor such as ITO may also be applied.

また、AI/Crのような2層構造にしてもよいが、半
導体層6に接する材質は同一のものが好ましい。
Further, a two-layer structure such as AI/Cr may be used, but it is preferable that the materials in contact with the semiconductor layer 6 are the same.

さらに上記実施例では、第一 第二電極層2.4および
半導体層6をスパッタ法で形成したが、本発明はこれに
限るものでなく、真空蒸着法を用いてもイオンブレーテ
ィング法を用いても良い。
Further, in the above embodiment, the first and second electrode layers 2.4 and the semiconductor layer 6 were formed by sputtering, but the present invention is not limited to this, and the ion blating method may also be used. It's okay.

発明の効果 本発明によれば、非線形抵抗素子を第一電極層と第二電
極層の間に、InとSbを主成分とする半導体層を介在
させて構成するものであり、簡単な素子構造で、かつ膜
厚マージンの大きい素子を提供することができ、その工
業的価値は非常に高い。
Effects of the Invention According to the present invention, a nonlinear resistance element is constructed by interposing a semiconductor layer mainly composed of In and Sb between a first electrode layer and a second electrode layer, and the element structure is simple. It is possible to provide an element with a large film thickness margin, and its industrial value is extremely high.

【図面の簡単な説明】[Brief explanation of the drawing]

第1図は本発明の第1の実施例における非線形抵抗素子
の断面構成図、第2図は同非線形抵抗素子の特性図、第
3図は本発明の第2の実施例における非線形抵抗素子の
断面構成図、第4図は第2の実施例の変形例を示す断面
構成図、第5図は従来の非線形抵抗素子の断面構成図で
ある。 190.ガラス基板、2.、、第一電極層、4.、、第
二電極層、600.半導体層。 代理人の氏名 弁理士 粟野重孝 はか1名第2図 1図
Fig. 1 is a cross-sectional configuration diagram of a nonlinear resistance element in a first embodiment of the present invention, Fig. 2 is a characteristic diagram of the nonlinear resistance element, and Fig. 3 is a diagram of a nonlinear resistance element in a second embodiment of the invention. FIG. 4 is a cross-sectional diagram showing a modification of the second embodiment, and FIG. 5 is a cross-sectional diagram of a conventional nonlinear resistance element. 190. glass substrate, 2. ,,first electrode layer,4. , second electrode layer, 600. semiconductor layer. Name of agent: Patent attorney Shigetaka Awano (1 person) Figure 2 Figure 1

Claims (3)

【特許請求の範囲】[Claims] (1)第一電極層と第二電極層の間に、InとSbを主
成分とする半導体層を介在させて構成したことを特徴と
する非線形抵抗素子。
(1) A nonlinear resistance element characterized in that a semiconductor layer containing In and Sb as main components is interposed between a first electrode layer and a second electrode layer.
(2)InとSbを主成分とする半導体層において、S
bの含有比率は30原子%から70原子%の範囲内にあ
ることを特徴とする請求項1記載の非線形抵抗素子。
(2) In a semiconductor layer containing In and Sb as main components, S
2. The nonlinear resistance element according to claim 1, wherein the content ratio of b is within the range of 30 at% to 70 at%.
(3)第一電極層と第二電極層は同一材質から構成され
ることを特徴とする請求項1記載の非線形抵抗素子。
(3) The nonlinear resistance element according to claim 1, wherein the first electrode layer and the second electrode layer are made of the same material.
JP1109331A 1989-04-28 1989-04-28 Nonlinear resistance element Pending JPH02287438A (en)

Priority Applications (1)

Application Number Priority Date Filing Date Title
JP1109331A JPH02287438A (en) 1989-04-28 1989-04-28 Nonlinear resistance element

Applications Claiming Priority (1)

Application Number Priority Date Filing Date Title
JP1109331A JPH02287438A (en) 1989-04-28 1989-04-28 Nonlinear resistance element

Publications (1)

Publication Number Publication Date
JPH02287438A true JPH02287438A (en) 1990-11-27

Family

ID=14507515

Family Applications (1)

Application Number Title Priority Date Filing Date
JP1109331A Pending JPH02287438A (en) 1989-04-28 1989-04-28 Nonlinear resistance element

Country Status (1)

Country Link
JP (1) JPH02287438A (en)

Cited By (2)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
JP2014143440A (en) * 2003-10-27 2014-08-07 E Ink Corp Electro-optic display
US9632389B2 (en) 2002-04-24 2017-04-25 E Ink Corporation Backplane for electro-optic display

Cited By (2)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
US9632389B2 (en) 2002-04-24 2017-04-25 E Ink Corporation Backplane for electro-optic display
JP2014143440A (en) * 2003-10-27 2014-08-07 E Ink Corp Electro-optic display

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