JPH02285878A - Still picture filing device - Google Patents

Abstract

PURPOSE:To remarkably smoothly perform the fetch of a still picture, etc., by displaying an input video signal on one of divided display planes. CONSTITUTION:A video signal from an input/output circuit is displayed on a part where crosshatching is applied at part of the display plane of a color display, and the still picture from a connection circuit, etc., is displayed on another hatching part. When a prescribed instruction is issued by a mouse, etc., at the time of obtaining a desired image, control data to stop the supply of a signal to the video bus of the input/output circuit is formed, and next, the signal in an interface circuit is read out, and the control data to write the signal on a memory device via the connection circuit is formed. Thereby, the fetch of the still picture can be performed.

Description

DETAILED DESCRIPTION OF THE INVENTION [Field of Industrial Application] The present invention relates to a still image file device used, for example, for transmitting subtitles at a television broadcasting station.

[Summary of the invention]

The present invention relates to a still image file device that captures still images by providing first and second image memories, dividing the display screen of a high-resolution color display, and displaying an input video signal on one of them. This allows tasks such as this to be carried out smoothly.

[Conventional technology]

For example, it is being considered that a still image file device having a digital memory is used to transmit subtitles and the like at a television broadcasting station.

[Problem to be solved by the invention]

However, in conventional devices of this type, many steps are required to capture, edit, save, and send out still images, and the tasks require skill, which places a heavy burden on the user.

In view of these points, this application provides an apparatus that can perform desired operations through simple procedures.

A second image memory (16S) corresponding to a video signal is provided, an image by the still image file means is written to the first image memory, and the video signal input to the second image memory is The still image file device sequentially writes images in the second image memory, combines the image in the second image memory with the image in the first image memory (control circuit (162)), and outputs the result to the color display.

[Means to solve the problem]

In the present invention, the first means is a video signal input circuit (
14a) to (14f), built-in first memory (IA
).

Still image file means (1) comprising a separable second memory (103), output circuits (14a) to (14f) for the video signals, and a CPU (17) for controlling these.
), a workstation (2) with a CPU (201) and a high-resolution color display (202)
In the still image file device, the still image file means includes a first image memory (16M) corresponding to all high-resolution pixels of the color display; By displaying the input video signal on one of the surfaces, it is possible to capture still images extremely smoothly.

〔Example〕

FIG. 1 shows the overall configuration of the device. In this figure (1
) is a still image file means, and this means (1) includes an input section (101) and an output section (102) for arbitrary video signals.
), and a drive unit (103) for, for example, a magneto-optical (MO) disk as a separable memory.

The CPU (201) of the workstation (2) is connected to the still image file means (1), and for example, RGB video signals from the workstation (2) are sent to the still image file means (1). The video signal from this means (1) is supplied to the workstation (
2) is supplied to a high resolution color display (202). The CPU (201) also has a keyboard (
203).

The mouse (204) is connected and the so-called 3, 5
'A floppy disk drive section (205) is provided, and an M for backing up the database is provided.
An O disk drive unit (206) and the like are connected.

Further, a controller (3) having some functions of the CPU (201) of the workstation (2) is connected to the still image file means (1), and a controller (3) having a part of the functions of the CPU (201) of the workstation (2) is connected, as well as a controller (3) for external storage, such as an auto-change internal MOL or A write-once (WO) disk drive device (4) is connected.

Furthermore, the video signal data of the still image file means (1) is supplied to the matrix switch (501) for configuring the network (5), and the output of the CPU (201) of the workstation (2) is supplied to the network (5).
5) is supplied to the line (502).

In this apparatus, the still image file means (1) is further constructed as shown in FIG. In the figure, (II) is a video bus, and this video bus (11) is, for example, D
-1 standard component digital video data can be transferred in real time.

Further, (12) is a first control bus, and real-time control data etc. added to the video signal are transferred to this bus (12). Further, (13) is a second control bus, to which control data and the like of ordinary devices are transferred.

A plurality of input/output circuits (14a) (1) each output a video signal to the video bus (11) among these.
4b) ... (14f) are connected, as well as the interface circuit fW (15) with the matrix switch (501) of the network (5), and the video signal interface circuit (16) with the workstation (2). ) are connected.

Further, (17) is a CPU that controls the inside of the still image file means (1), and this CPU (17) has a data line and a controller ( The data line from 3) is connected. The data line of this CPU (17) is connected to the control bus (12), and the
Control data from U (17) is supplied to the control bus (13).

Further, (18) is a data bus connection circuit, and to this connection circuit (18), for example, an SCS R bus (19) is connected, and to this bus (19), the above-mentioned drive device! (10
3) is connected, and a memory device W (such as a hard disk drive device or RAM as built-in memory) is connected.
IA) is connected. Note that an external drive device (4) and the like are further connected to this SC3I bus (19). This connection circuit (18) is connected to the control bus (12) and (1
3), and through this connection circuit (18), the sc
An sr bus (19) and a video bus (11) are connected.

In addition, the control bus (12) is connected to the bus interface circuit (12).
B). This interface circuit (IB)
By supplying a synchronizing signal from a reference signal source (IC) to, for example, the video bus (11) and the control bus (12) are connected during one predetermined horizontal period within the vertical blanking period.

Note that (ID) is a connection circuit for expansion.

Furthermore, in this still image file means (1),
The above-mentioned interface circuit (16) is configured as shown in FIG. In other words, this interface circuit (
16) includes a first image memory (16M) corresponding to all high-resolution pixels of the color display (202) and a second image memory (16M) corresponding to one frame of the video signal.
65) are provided, and these memories (16?I) (
16s) is supplied with data from the video bus (11). In addition, data on the video bus (11) is supplied to an extraction circuit (161) for a predetermined allocated horizontal period within the vertical blanking period, which will be described later, and control data superimposed on the horizontal period extracted here is supplied to the control circuit. (162). The signal from this control circuit (162) is then supplied to the address control circuits (163M) (163S),
Writing and successive output of data in the memories (16M) and (165) are controlled respectively.

As a result, the memory (16M) has, for example, a connection circuit (1
A display image such as a still image captured in advance is formed using the signal from 8). On the other hand, the memory (16S) converts the video signal supplied to any of the input/output circuits (14a) to (14f) into a predetermined A/D and converts it into a video bus (16S).
1), and this video signal is sequentially written. The signals written in these memories (16M) (165) are read out by signals from a control circuit (162), and the read signals are switched and combined by a switch (164). This combined signal is supplied to the mixer (166) through the D/A converter (165), where it is combined with the signal from the CPU (201) from the terminal (167) and output to the color display (202). is output to the terminal (168).

For this reason, on the display surface of the color display (202), for example, as shown in FIG.
A video signal from the connection circuit (18) is displayed, and still images from the connection circuit (18) and the like are displayed in other hatched areas.

In this still image file means (1) and the entire apparatus, still images are captured in the following manner.

That is, a video signal supplied to any of the input/output circuits (14a) to (14f) is subjected to a predetermined A/D conversion and supplied to the video bus (11), and the signal of this video bus (11) is sent to the interface circuit (14f). 16) image memory (1
6S) through a high-resolution color display (202
) is displayed on a part of the screen. At this time, a still image for editing, which will be described later, from the image memory (16M) is displayed on other parts of the display screen.

In this state, when a desired image is selected, a predetermined instruction is given using the mouse (204), etc., and this instruction is sent to the CPU (17) of the still image file means (1) through the CPU (201).
supplied to In this CPU (17), the input/output circuits (14a) to (14f) and the deo bus (11)
Control data are formed to stop the supply of signals to the interface circuit (16) and then to read the signals in the interface circuit (16) onto the video bus (11) and write this signal to the memory device W (IA) through the connection circuit (18). control data is formed. Note that these control data are stored in the CPU (17
) is supplied to the connection circuit (18) through the control bus (13), and input/output circuits (14a) to (14f)
For the interface circuits (15) and (16), the control data output to the control bus (12) is sent to the video bus (11) via the bus interface circuit (IB).
The signal is supplied to each circuit, superimposed on the video signal, and supplied to each circuit. In this case, each input/output circuit (14a) to (14f)
A predetermined horizontal period within the vertical blanking period is assigned to each of the interface circuits (15) and (16), and a specific horizontal period is assigned to each of the interface circuits (15) and (16) by a synchronization signal from a reference signal source (IC) in the bus interface circuit (IB). By outputting control data at the timing of
Control data is supplied to each circuit.

In this way, still images are captured. After the capture, the input/output circuits (14a) to (14f) are stopped and the video signal is displayed on the color display (202), or the still image written in the memory device (18) is displayed. You can do it like this.

In addition, the still images captured in this case form an index image in which pixels are extracted at a predetermined ratio together with a full image made up of all pixels in one frame, and these still images are used in the search. A disc libter containing an arbitrary classification code etc. is added and formed. These two still images and disc libter are then written into the memory device (IA) in a predetermined format. As for formants, the disc libter, full picture, and index picture are each written in independent areas, and the addresses of the corresponding full picture and index picture are provided in the disc libta. Further, the formation of the above-described index image may be performed by connecting arbitrary hardware to the video bus (11), or may be processed by software using the CPU (17) and the connection circuit (18). Furthermore, the still images captured in the memory device (LA) can be transferred to and stored in an MO disk drive device (103), etc., and this MO disk can also be taken out and used in another similar device.

Further, the still image captured in this manner is edited as follows.

That is, FIG. 5 is a functional block diagram. For example, when an MO disk on which a plurality of still images are written as described above is supplied to the drive device (103), a search is first performed from the disk libter on the disk. A database based on the classification codes to be used is created on the workstation (2).
21] will be done. Images based on this database are displayed on the color display (202), and can be searched using the keyboard (203) or mouse (204).
2] is performed, and the still image file means (1) sequentially outputs the corresponding still image disk librators from the drive device (103) [11] according to the searched classification code and the like.

This disc libter is analyzed [12], the addresses of the index picture and full picture are stored [13], and the drive device (103) is stored according to the analyzed address.
Index pictures are successively output from [14], and the read index pictures are transferred to the memory device (IA).

The index picture transferred to this memory device (IA) is further transferred to the interface circuit (16).

Here, the interface circuit (16) includes a CPU (20
For example, a background image as shown in Fig. 6 is supplied from 1), and each shaded area ■ in the upper half of this background image is
~ For each address of memory (16M) corresponding to @,
The above-mentioned index images are sequentially written and displayed by address control [15]. By writing all searched index pictures to the -H memory device (1^), for example, when there are 13 or more index pictures, access to another page of the display can be performed at high speed.

On the other hand, the lower half of the background image is also marked with a diagonal line.
phase] is provided. Then, use the mouse (204
) etc. to move an arbitrary cursor (not shown) within the desired still image range and then perform any key operation, etc., the still image corresponding to that range is determined on the workstation (2). [23), and according to the determination, the addresses of the desired full still image and index picture are extracted from the addresses stored [13] above, and are thereby successively outputted [16] from the drive device (103). The full image and index image are written to the memory device (IA), and the index image is written to the address of the memory (16M) corresponding to range 0 and displayed.

By repeating this operation, the range @ ~ [
The index images of the desired still images are displayed one after another in [Phase].
The index picture and full picture are stored in the memory device (I) in that order.
A).

Editing is performed in this way, and the still image packets arranged in the desired transmission order are stored in the memory device (IA).
will be completed in This packet also contains a drive device (10
3) and save it on the MO disk.

Further, when transmitting a still image packet edited as described above, the following procedure is performed.

That is, in the above-mentioned device, for example, the input/output circuit (14
a) is used for transmission, and a monitor receiver (not shown) is connected to the input/output circuit (14b). Furthermore, the above-mentioned edited still image packet is stored in the memory device (18) before being sent out. First, when a transmission instruction is issued from the workstation (2), the first still image of the packet is transferred to the input/output circuit (14a) and transmitted, and the second still image is transmitted to the input/output circuit (14a).
4b) and displayed on the monitor receiver. Next, when the workstation (2) issues a transmission instruction again in this state, the second still image of the packet will be sent to the input/output circuit (
At the same time, the third still image is transferred to the input/output circuit (14b) and displayed on the monitor receiver.

The still images of the packets edited in this way are sent out in order. In this case, the still image to be sent next is displayed on the monitor receiver, and if you see this display and the next still image is not needed, you can change the next still image based on instructions from the workstation (2). Processing such as deletion can also be performed.

In this manner, according to the above-described apparatus, since the input video signal is displayed on one of the divided display surfaces, it is possible to capture still images extremely smoothly.

In the above-described apparatus, a still image may include a full image and an index image, as well as a key image (one pixel, one focus) for performing so-called key composition.

(201) is the CPU, (501) is the switch, (502
) is a network line.

〔Effect of the invention〕

According to this invention, since the input video signal is displayed on one of the divided display surfaces, it is now possible to capture still images extremely smoothly.

[Brief explanation of drawings]

Fig. 1 is an overall block diagram of the present invention, Fig. 2 is a block diagram of a still image file means, Fig. 3 is a block diagram of an interface circuit, Fig. 4 is a diagram for explaining the same, and Fig. 5 is a functional diagram. The block diagram in FIG. 6 is a diagram for explaining the same.

Claims (1)

[Scope of Claims] Still image file means having a video signal input circuit, a built-in first memory, a separable second memory, an output circuit for the video signal, and a CPU that controls these; and a workstation having a high-resolution color display, the still image file means having a first image memory corresponding to all pixels of the high resolution of the color display and a second image memory corresponding to the video signal. an image memory, wherein the first image memory writes the image from the still image file means, the second image memory sequentially writes the input video signal, and the second image memory A still image file device configured to combine an image in an image memory with an image in the first image memory and output the composite to the color display.