JPH02285562A - Pulse peak detector - Google Patents

Abstract

PURPOSE:To obtain the binarizing signal having a small error by ANDing between a gate pulse and a pulse, which is generated in a zero cross point in the twice differentiating waveform of a reproduced signal waveform, by a gate means. CONSTITUTION:A level clamp area is provided in a recording medium and comparatively long '0' data and '1' data are written at the time of recording. At the time of reproducing, level difference between the '0' data and '1' data in this level clamp area is detected as a first level by a detecting means 10. This detected level is a level corresponding to a real writing condition. In a level generating means 11, a second level is generated by multiplying this first level and a fixed gain. This second level is a slice level and made variable corresponding to the real writing condition. Thus, a peak pulse is generated only in a peak point in the waveform of a reproduced signal and binarization can be executed by the optimum slice level corresponding to the level difference between the '0' data and '1' data. Then, the error is decreased.

Description

DETAILED DESCRIPTION OF THE INVENTION Field of the Invention The present invention relates to a pulse peak detector in a magnetic hard disk drive, a magneto-optical disk drive, etc. in which information can be written.

2. Description of the Related Art In general, this type of apparatus employs a demodulation method using differentiation for signal reproduction. For example, r I- in the material about M52836FP manufactured by Mitsubishi Electric Corporation.
(D Pulse peak detector that realizes waveform equalization with a simple configuration and supports high-density recording), as well as the materials MR published by Fujitsu Limited.
84-3, pages 19 to 26, ``Study J on Signal Processing of Film Magnetic Heads''.

That is, in hard disk I-(D), a method of demodulating using differentiation is common (in HD, the reproduced signal by the magnetic head is converted into a single differential signal of the reproduced signal by the optical pickup of the magneto-optical disk device). Since it corresponds to 1 in HD
The slice level for gate pulse output is determined by calculating the amplitude margin taking into account the effects of jitter due to noise, etc., and setting the slice level to a fixed value of 1. It is set within the range of the upper and lower slice levels.

FIG. 5 shows a schematic block diagram of a binarization circuit for I (D). First, an input signal with a voltage, which is a once differentiated signal (see FIG. 6 (a)), is sliced at a certain level by a window comparator 1. A gate pulse is generated (see Fig. 6(c)).Meanwhile, the input signal is differentiated again by the differential amplifier 2 to become a twice differentiated signal (see Fig. 6(b)), and then the cello-cross comparator 3, the zero-crossing point is detected (see Figure 6(d)).Here, the noise removal circuit 4 detects the zero-crossing point of the twice differentiated waveform of the input signal only when the gate pulse is in the on state (H level). This allows the +(→L level, ■, →I( level) of the pulses generated at , and outputs a binary signal from which noise has been removed.

Problems to be Solved by the Invention In this way, when generating a gate pulse from an input signal having a once differentiated waveform, a window comparator 1 with a fixed slice level is used. As a result, depending on the writing situation, for example, "O" data and "1
``''When the signal level difference from the data is large, both the peak height of the minimum amplitude of the first differential signal and the amplitude of the first differential signal at the cello cross point of the second differential signal become high, and the slice level inevitably increases. If it is not set high, there is a possibility that the gate pulse will be emitted at an unnecessary point.

On the other hand, when the level difference between the "o" data and the "bi" data is small, unless the slice level is lowered, there is a possibility that the gate pulse will not be output where necessary. In either case, there is a high possibility that erroneous binarization will occur.

Means for Solving the Problem A level clamp area is formed in a part of the data rewritable recording medium to write long "O" data and "l" data during recording, and a level clamp area is formed on a part of the data rewritable recording medium to write long "O" data and "l" data during recording, and a level clamp area is formed in a part of the data rewritable recording medium. II Or+ data written in the clamp area and ″
1'''' data as a first level; level generating means for multiplying the first level by a fixed gain to generate a second level; a pulse generating means for generating a gate pulse by slicing the twice-differential waveform at the second level; and a gate for performing an AND of the gate pulse and a pulse generated at a zero-crossing point of the twice-differential waveform of the reproduced signal waveform. Composed of means and more.

The peak pulse of the gate pulse and the pulse generated at the zero-crossing point of the twice differentiated waveform of the reproduced signal waveform in the action gate means are obtained as a binary signal. Here,
When generating a gate pulse in the pulse generating means,
Although a certain slice level is used, it is not a fixed slice level but a variable slice level depending on the actual data writing situation. That is, a level clamp area is provided on the recording medium, and long "o" data and "1" data are written during recording, and during playback, II O I of this level clamp area is written.
The detection means detects the level difference between the + data and the II I I+ data as a first level. This is the level that corresponds to the actual writing situation. Then, in the level generation means, a second level is generated by multiplying this first level and a fixed gain. This second level is the slice level, and is variable depending on the actual writing situation.

Therefore, a peak pulse is generated only at the peak point of the reproduced signal waveform, and the difference between the data and II] 11
It becomes possible to perform binarization using an optimal slice level according to the level difference with the data, and errors are reduced.

Embodiment An embodiment of the present invention will be explained based on FIGS. 1 to 4. The same parts as those shown in FIG. 5 are indicated using the same reference numerals.

In this embodiment, the data rewritable recording medium has a format as shown in FIG. Here, it is a sample hold type, and each sector consisting of a header part and a data segment part contains data D.
Along with B, the sample servo SB area is secured, but a level clamp area is also secured by positioning the header part [(Yuko).This level clamp area is used to store the original data when writing data to each sector. This is for writing long ``0'' data and 1'' data.

In such a format configuration, at the time of reproduction, the "O" data and "I" data of this level clamp area in the sector where data is to be reproduced are also sampled at the same level. FIG. 3 shows the reproduction signal waveform for such a level clamp area and data area in a certain arbitrary sector, and sampling pulses TI and T2 for sampling II OI+ data and "1" data in the level clamp area. shows. Then, the level difference between "o" data and "1" data in the level clamp area is determined as the first level MO3T.
shall be.

Regarding the detection of this first level MO51, II OI
A method that takes the difference between sampling data near the center of each writing area between + data and II I I + data, a method that samples several points in each area, adds up the average value, and takes the difference, etc. is possible.

The structure and operation of obtaining a binary signal from the reproduced waveform of the signal written in the data area 11 under such a characteristic format structure will be explained with reference to FIGS. 1 and 4. First, the reproduced signal waveform of the data written on the data area is, for example, as shown in FIG. It becomes a divided waveform signal. Furthermore, it is differentiated again by the differential amplifier 2, resulting in a two-machine waveform signal as shown in FIG. 4(d). That is, the reproduction signal is inverted by the two-time differentiation, and the low frequency component is removed. By inputting the waveform signals for the two machines to the zero-cross comparator 3, a pulse signal corresponding to the zero-cross point as shown in FIG. 4(e) is obtained.

On the other hand, prior to such processing, in the sector concerned,
Sampling pulse T1 from timing control circuit 6
For example, ``0'' in the level clamp area at the timing of
``The data level (H level) is sampled and held by the sample and hold circuit (S/H) 7. This output is input to the comparator 8 together with the direct input signal, and the comparison result is input from the timing control circuit 6. The sample and hold circuit (S/TO()9) samples and holds the data at the timing of the sampling pulse T2. That is, the level of the other "1" data is set based on the level (H level) of the "o" data in the level clamp area. (I,
A comparator 8 calculates the difference between the signal level and the signal level), and the sample and hold circuit 9 holds the difference. These S/117.9 and the comparator 8 constitute a detection means for detecting a level difference as a first level.

Therefore, the detected first level is variable and varies depending on the actual writing situation for each sector.

Thus, the first level detected by the detection means 10 is converted into a second level for slice level switching by a voltage/resistance value converter 11 using an FET element or the like as a level generation means. This second level is calculated by multiplying the detected first level by a fixed gain. The second level from the voltage/resistance value converter 11 or the first differential waveform of the reproduced signal waveform is output as a slice level switching signal to the window comparator 12 as a pulse generating means for generating a gate pulse.

More specifically, the voltage/resistance value converter 11 is a variable resistor that switches the voltage, and if the first level (level difference) is large, it increases the slice level, and conversely, if the first level is small, it increases the slice level. The slice level of the window comparator 12 is varied in the lowering direction. ±αM OST (α is a fixed gain) shown in FIG. 4(b) corresponds to the second level. Using such a slice level, a gate pulse as shown in FIG. 4(C) is obtained from the window comparator 12.

Then, this gate pulse and zero cross comparator 3
AND with the pulse obtained by (see Fig. 4(e))
By calculating the logical product using the noise removal circuit 4 serving as a gate means, a binary signal as shown in FIG. 4(f) is obtained. That is, a peak pulse is generated only at the peak point of the reproduced signal waveform, resulting in a binary signal with fewer errors.

Here is some additional information about the slice level.

Generally, the slice level in the window comparator is determined by the second limit value determined by the peak height of the minimum amplitude of the once differentiated waveform, and the lower limit value determined by the peak height of the minimum amplitude of the twice differentiated waveform.
Limited by the amplitude of the differential waveform. For example, the center peak height of the 3-bit waveform with the minimum bit interval of the once differentiated waveform is Fl, the standard deviation of the jitter in the amplitude direction of the once differentiated waveform is σ1. The maximum amplitude value of the once differentiated waveform is Fm, and the maximum amplitude value of the once differentiated waveform is Fm. When the amplitude of the reproduced signal waveform at the zero-crossing point of the differential waveform is Fl, the slice level's - limit value Ll+, lower limit value,
.

]′-1l-(Fp 6 aL)/FmLL=
It is calculated as (F, -6aL)/Fm. Conventionally, the optimal value is set between these degrees, but if it is set to - degrees, the slice level is constant for any write state signal, so erroneous 2
There is a high possibility that it will become a valued signal. However, according to this embodiment, the write state in each sector from which data is read is grasped by the MOS value, and the slice level of the window comparator 12 is varied according to the value, so that erroneous errors may occur. The possibility of a binary signal is reduced.

Effects of the Invention As described above, the present invention secures a level clamp area which is formed in a part of a data-rewritable recording medium and is used to write long II OI+ data and II II I+ data during recording. During playback, the detection means sets the level difference between the P O'' data and the V data written in this level clamp area as the first level, and the level generation means multiplies this first level by a fixed gain to generate the second level. The gate pulse is generated by slicing the first differential waveform of the reproduced signal waveform of the recording medium at this second level by the pulse generating means, and the gate pulse is generated by the gate pulse and the twice differential waveform of the reproduced signal waveform by the gate means. Since it is ANDed with the pulse generated at the zero-crossing point, binarization is performed using the optimal slice level according to the actual data writing situation, and a peak pulse is generated only at the peak point of the reproduced signal waveform. Therefore, it is possible to obtain a binary signal with fewer errors.

[Brief explanation of drawings]

Fig. 1 is a block diagram showing an embodiment of the present invention, Fig. 2 is an explanatory diagram showing the format of the recording medium, Fig. 3 is a timing chart showing the sampling operation for the level clamp area, and Fig. 4 is the same as Fig. 1. Operation waveform diagram of section 5
The figure is a block diagram showing a conventional example, and FIG. 6 is an operation waveform diagram of each part thereof. 4... Gate means, 10. Detection means, 11. Level generation means, 12. Pulse generation means Applicant Rico Co., Ltd.

Claims (1)

[Claims] A level clamp area is formed on a part of the data-rewritable recording medium and is used to write long "0" data and "1" data during recording, and a detection means for detecting a level difference between "0" data and "1" data as a first level; a level generation means for multiplying the first level by a fixed gain to generate a second level; pulse generating means for generating a gate pulse by slicing the first differential waveform of the reproduced signal waveform at the second level; and a pulse generated at a zero cross point of the second differential waveform of the reproduced signal waveform and the gate pulse; A pulse peak detector comprising gate means for calculating logical product.