JPH02285067A - Device for forming thin film in vacuum - Google Patents

Device for forming thin film in vacuum

Info

Publication number
JPH02285067A
JPH02285067A JP10874589A JP10874589A JPH02285067A JP H02285067 A JPH02285067 A JP H02285067A JP 10874589 A JP10874589 A JP 10874589A JP 10874589 A JP10874589 A JP 10874589A JP H02285067 A JPH02285067 A JP H02285067A
Authority
JP
Japan
Prior art keywords
thin film
semiconductor wafer
target
vacuum
plate
Prior art date
Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
Pending
Application number
JP10874589A
Other languages
Japanese (ja)
Inventor
Tatsuzo Kawaguchi
川口 達三
Kazuhiko Mihashi
三橋 和彦
Hideaki Harakawa
秀明 原川
Current Assignee (The listed assignees may be inaccurate. Google has not performed a legal analysis and makes no representation or warranty as to the accuracy of the list.)
Toshiba Corp
Original Assignee
Toshiba Corp
Priority date (The priority date is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the date listed.)
Filing date
Publication date
Application filed by Toshiba Corp filed Critical Toshiba Corp
Priority to JP10874589A priority Critical patent/JPH02285067A/en
Publication of JPH02285067A publication Critical patent/JPH02285067A/en
Pending legal-status Critical Current

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  • Physical Vapour Deposition (AREA)

Abstract

PURPOSE:To enhance quality of the vapor-deposited film on a semiconductor wafer and also to enhance yield of film formation by providing a sticking-preventive plate for preventing the vapor-deposited material from being stuck on the inner wall of a vacuum device at the time of vacuum-depositing a metallic thin film for wiring on the surface of the semiconductor wafer. CONSTITUTION:A semiconductor wafer 2 is fitted to a vacuum device 1 and also a target 5 described hereunder is arranged to the central part of a cover 6 so as to be opposed to the wafer 2. This target 5 is made of metal such as Mo, W, Ti and Ta or of silicide, etc., of these metals which are utilized as material for the wiring of the semiconductor wafer. Ar ions are allowed to collide against the target 5 and a thin film made of the particles of the target is formed on the surface of the wafer 2. In this case, a center cover 4 described hereunder is provided around the semiconductor wafer 2 and utilized as a sticking-preventive plate for vapor-deposited particles. The center cover 4 has <=5X10<-6>/ deg.C as the difference of linear thermal expansion coefficient between the material of the thin film and is roughened at >=10mum surface roughness. Further a shielding plate 7 is provided around the target 5 arranged to the central part of the cover 6. Thereby the thin film for the wiring of the semiconductor wafer is prevented from being contaminated by peeling of the vapor-deposited material stuck thereto. The yield for forming the thin film on the wafer is enhanced.

Description

【発明の詳細な説明】 〔発明の目的〕 (産業上の利用分野) 本発明は五空薄膜形成装置に関し、特に半導体ウェー八
等の絶縁物の表面に薄膜を形成する装置に関するもので
ある。
DETAILED DESCRIPTION OF THE INVENTION [Object of the Invention] (Industrial Application Field) The present invention relates to an apparatus for forming a five-dimensional thin film, and particularly to an apparatus for forming a thin film on the surface of an insulating material such as a semiconductor wafer.

(従来の技術) 半導体ウェーハの表面に配線用の薄膜を形成する装置と
して、真空薄膜形成装置が一般に用いられている。この
装置には、ヒータで薄膜材料を真空雰囲気中で加熱して
蒸発させぢ真空蒸着装置や、電子ビームを薄膜材料に照
射して加熱し蒸発させる電子ビーム蒸着装置、あるいは
荷電粒子を薄膜材料に照射してその衝撃で粒子を飛散さ
せるスパッタリング装置等がある。そしていずれの装置
も、装置の内壁全域に薄膜材料が付着するのを防ぐ防着
板を有している。
(Prior Art) A vacuum thin film forming apparatus is generally used as an apparatus for forming a thin film for wiring on the surface of a semiconductor wafer. This equipment includes a vacuum evaporation equipment that uses a heater to heat the thin film material in a vacuum atmosphere and evaporates it, an electron beam evaporation equipment that irradiates the thin film material with an electron beam to heat and evaporate it, or an electron beam evaporation equipment that uses charged particles to evaporate the thin film material. There are sputtering devices and the like that use irradiation and scatter particles with the impact. Both devices have an adhesion prevention plate that prevents the thin film material from adhering to the entire inner wall of the device.

この防着板の表面には薄膜材料が付着し堆積するが、こ
の堆積した薄膜材料が剥がれると、微細な塵埃となって
装置内部を浮遊する。
A thin film material adheres and accumulates on the surface of this adhesion prevention plate, but when this deposited thin film material is peeled off, it becomes fine dust and floats inside the device.

これまでは、配線材料としてアルミニウム(AI)が多
く用いられていた。このアルミニウムは材料自体に粘り
があるため、防着板の表面に堆積した膜は剥がれにくく
、塵埃の発生数は比較的少なかった。またこの膜が剥が
れて塵埃が発生し、半導体ウェーハの表面に形成された
薄膜中に混入あるいは薄膜上に付着したとしても、従来
の半導体デバイスでは集積密度が低く比較的大きなデザ
インルールを採用していたため、配線不良となって短絡
が生じるようなことはなかった。
Until now, aluminum (AI) has often been used as a wiring material. Since this aluminum material itself is sticky, the film deposited on the surface of the adhesion prevention plate was difficult to peel off, and the amount of dust generated was relatively small. Furthermore, even if this film peels off and dust is generated and gets mixed into or adheres to the thin film formed on the surface of the semiconductor wafer, conventional semiconductor devices have low integration density and use relatively large design rules. Therefore, there were no short circuits caused by poor wiring.

(発明が解決しようとする課題) しかし最近では配線の微細化が要求され、配線材料とし
てモリブデン(MO)、タングステン(W)、チタン(
Ti)、タンタル(Ta)等の高融点金属やこれらのシ
リサイド、窒化チタン(T i N) 、タングステン
チタン(TiW)等のチタン化合物が用いられるように
なってきた。そしてこれらの材料を薄膜材料として用い
ると、防着板に堆積した後に剥離しやす(、大量の塵埃
が発生していた。これは、これらの薄膜材料と防着板の
材料との間に、線熱膨脹率の差が大きいことが原因であ
ることが、種々の検討により明らかとなった。従来は防
着板の材質として、一般にステンL/ スfR(S U
 S −304)が用いられており、この線熱膨脹率は
17.3X10’/’Cである。
(Problem to be solved by the invention) However, recently there has been a demand for finer wiring, and wiring materials such as molybdenum (MO), tungsten (W), and titanium (
High melting point metals such as Ti) and tantalum (Ta), their silicides, and titanium compounds such as titanium nitride (T i N) and tungsten titanium (TiW) have come to be used. When these materials are used as thin film materials, they tend to peel off after being deposited on the adhesion prevention plate (and a large amount of dust is generated). Various studies have revealed that this is due to the large difference in coefficient of linear thermal expansion. Conventionally, stainless steel L/S fR (S U
S-304) is used, and its coefficient of linear thermal expansion is 17.3X10'/'C.

これに対し、モリブデン及びタングステン等の高融点金
属シリサイド薄膜が防着板の表面に付着するときの非晶
質状態の線熱膨脹率は共に約3×10’/’Cであり、
14.3X10−6/’Cという大きな差がある。
On the other hand, when a high melting point metal silicide thin film such as molybdenum and tungsten is attached to the surface of the adhesion prevention plate, the coefficient of linear thermal expansion in the amorphous state is approximately 3 × 10'/'C,
There is a large difference of 14.3X10-6/'C.

半導体ウェーハの表面に上記高融点金属シリサイド薄膜
を蒸着あるいはスパッタリングで行っている最中は、こ
の表面温度は約90℃に達し、防着板の表面温度も徐々
に上昇していく。そして処理枚数が約10枚以上になる
と、この防着板の表面温度はほぼ90℃で一定になる。
While the high melting point metal silicide thin film is being vapor-deposited or sputtered on the surface of the semiconductor wafer, the surface temperature reaches approximately 90° C., and the surface temperature of the deposition-preventing plate also gradually rises. When the number of sheets to be processed reaches about 10 or more, the surface temperature of the adhesion prevention plate becomes constant at approximately 90°C.

この一定温度に達するまでの間は防着板の表面温度が上
昇し、膨脹する割合が大きく異なることによって薄膜が
剥離し、塵埃が発生していた。このような塵埃が装置内
部を浮遊した後、半導体ウェーハ表面の薄膜の内部に混
入又は表面に付着すると、配線形成後、短絡が生じて製
造歩留りが低下することとなる。
Until this constant temperature is reached, the surface temperature of the adhesion prevention plate increases, and the rate of expansion varies greatly, causing the thin film to peel off and generate dust. If such dust floats inside the device and then gets mixed into the thin film on the surface of the semiconductor wafer or adheres to the surface, a short circuit will occur after wiring is formed, resulting in a decrease in manufacturing yield.

このため、防着板の表面温度がほぼ一定となるまで(約
10枚相当)、ダミースパッタリングを行なったのち、
製品用半導体ウェーハにスパッターする方式を採用して
いるため、スループットの低下とダミースパッタによる
ターゲット使用効率低下が生じ、無駄な経費が生じてい
た。またこれらの高融点金属シリサイド等の材料は、そ
れ自体ストレスが高く脆いため剥離しやすい性質を持っ
ており、処理枚数が約10枚を越えた後も塵埃が相当数
発生して、製造歩留りが低下するという問題もあった。
For this reason, after performing dummy sputtering until the surface temperature of the anti-adhesion plate becomes almost constant (equivalent to about 10 plates),
Because the system uses a method of sputtering product semiconductor wafers, there is a reduction in throughput and target usage efficiency due to dummy sputtering, resulting in wasted costs. In addition, these materials such as high melting point metal silicides are highly stressed and brittle, making them easy to peel off, and even after processing more than 10 sheets, a considerable amount of dust is generated, reducing manufacturing yield. There was also the problem of a decline.

本発明は上記事情に鑑み、薄膜材料が防着板に堆積した
後に剥離するのを防止することによって、経費の削減及
び製造歩留りの向上を達成し得る真空薄膜形成装置を提
供することを目的とする。
In view of the above circumstances, an object of the present invention is to provide a vacuum thin film forming apparatus that can reduce costs and improve manufacturing yield by preventing thin film materials from peeling off after being deposited on an adhesion prevention plate. do.

〔発明の構成〕[Structure of the invention]

(課題を解決するための手段) 本発明は、試料の表面に薄膜を形成する際に薄膜材料が
装置内部に付着するのを防止する防着板を有した真空薄
膜形成装置において、この防着板は前記薄膜材料の線熱
膨脹率との差が5.5X10’/’C以内の線熱膨脹率
の材料から成ることを特徴としている。
(Means for Solving the Problems) The present invention provides a vacuum thin film forming apparatus having an adhesion prevention plate that prevents thin film material from adhering to the inside of the apparatus when forming a thin film on the surface of a sample. The plate is characterized in that it is made of a material whose coefficient of linear thermal expansion is within 5.5×10'/'C different from the coefficient of linear thermal expansion of the thin film material.

ここで防着板は、表面粗さが10μm以上であるとよい
Here, the adhesion prevention plate preferably has a surface roughness of 10 μm or more.

(作 用) 試料の表面に薄膜の形成を行うと防着板の表面にも薄膜
材料が堆積するが、防着板の表面温度が変化しても防着
板の材料と薄膜材料との間における線熱膨張率の差が5
.5X10’/”C以下であるため、防む板の膨脹ある
いは収縮する割合と薄膜材料のこの割合との間には僅少
な差しかなく、薄膜材料が剥離せず塵埃の発生が抑制さ
れる。
(Function) When a thin film is formed on the surface of the sample, the thin film material is also deposited on the surface of the adhesion prevention plate, but even if the surface temperature of the adhesion prevention plate changes, the gap between the material of the adhesion prevention plate and the thin film material The difference in linear thermal expansion coefficient at is 5
.. Since it is 5×10′/”C or less, there is only a slight difference between the rate of expansion or contraction of the protective plate and this rate of the thin film material, and the thin film material does not peel off and the generation of dust is suppressed.

(実施例) 本発明の一実施例について、図面を参照して説明する。(Example) An embodiment of the present invention will be described with reference to the drawings.

これはスパッタリングを行う真空薄膜装置であり、第1
図に示された装置本体1と第2図に示されたM6とで装
置の一部の真空チャンバを構成をする。この真空チャン
バ内において、装置本体1の中央部に半導体ウェーハ2
が設置され、この半導体ウェーハ2は電気的にアース接
地されている。一方のM6の中央部分には半導体ウェー
ハ2と対向するようにターゲツト材としてのモザイクタ
ーゲット5が設けられている。これはモリブデンシリサ
イド(Mo S l 2 )を薄膜材料とした場合のも
ので、モリブデン材とシリコン材とが交互に配列されて
おり、このターゲットは負の直流電圧が印加される(D
Cマグネトロンスパッタリング方式採用)。アルゴンイ
オン(Ar)のような重い荷電粒子をモザイクターゲッ
ト5に照射し、その衝撃でターゲツト材から飛び出した
モリブデン及びシリコンの粒子を、半導体ウェー112
の表面上に付着させることによって薄膜の形成を行う。
This is a vacuum thin film device that performs sputtering.
The apparatus main body 1 shown in the figure and the M6 shown in FIG. 2 constitute a part of the vacuum chamber of the apparatus. In this vacuum chamber, a semiconductor wafer 2 is placed in the center of the apparatus main body 1.
is installed, and this semiconductor wafer 2 is electrically grounded. A mosaic target 5 as a target material is provided in the center of one M6 so as to face the semiconductor wafer 2. This is a case where molybdenum silicide (Mo S l 2 ) is used as a thin film material, and molybdenum materials and silicon materials are arranged alternately, and a negative DC voltage is applied to this target (D
C magnetron sputtering method). The mosaic target 5 is irradiated with heavy charged particles such as argon ions (Ar), and molybdenum and silicon particles ejected from the target material due to the impact are transferred to the semiconductor wafer 112.
The formation of a thin film is carried out by depositing it on the surface of a.

装置本体1における半導体ウェーハ2の周囲に、防着板
としてのセンターカバー4が設けられ、さらにその周囲
に仕切板3が設けられている。一方の蓋6において、モ
ザイクターゲット5の周囲に防着板としてのシールド板
7が設けられ、さらにその周囲にはカバー8が設けられ
ている。このシールド板7は、電気的にアース接地され
ているため荷電粒子が直接アースシールド板7をスパッ
タすることなく、モザイク・ターゲットのみがスパッタ
リングされるよう設計されている。
A center cover 4 as an adhesion prevention plate is provided around the semiconductor wafer 2 in the apparatus main body 1, and a partition plate 3 is further provided around the center cover 4. In one lid 6, a shield plate 7 as an adhesion prevention plate is provided around the mosaic target 5, and a cover 8 is further provided around the shield plate 7. Since this shield plate 7 is electrically grounded, it is designed so that only the mosaic target is sputtered without the charged particles directly sputtering on the earth shield plate 7.

このセンターカバー4.仕切板3.シールド板7及びカ
バー8はいずれも純度99.996から99.999%
のモリブデン材料から成る。モリブデンの線熱膨脹率は
5 X 10−6/”Cであり、薄膜材料としてのモリ
ブデンシリサイド薄膜が非晶質状態のときの線熱膨張率
的3 x 10’/’Cと比較し、差はわずか2 X 
10−13/”Cである。
This center cover 4. Partition plate 3. Both the shield plate 7 and the cover 8 have a purity of 99.996 to 99.999%.
Made of molybdenum material. The linear thermal expansion coefficient of molybdenum is 5 x 10-6/'C, and compared to the linear thermal expansion coefficient of 3 x 10'/'C when the molybdenum silicide thin film as a thin film material is in an amorphous state, the difference is Only 2 X
10-13/''C.

さらにそれぞれの防着板へのモリブデンシリサイド薄膜
の付着強度を増すため、表面仕上げとしてカーボン系(
炭化ケイ素)研掃材(# 36)を用いてブラストが行
われ、表面粗さが35〜45μmとなっている。
Furthermore, in order to increase the adhesion strength of the molybdenum silicide thin film to each anti-adhesion plate, the surface finish is carbon-based (
Blasting was performed using a silicon carbide abrasive (#36), and the surface roughness was 35 to 45 μm.

このような装置を用いて半導体ウェーハの表面に薄膜形
成を行った後に、装置内部に発生した塵埃の数を測定し
たところ、従来と比較して著しく減少していることが検
証された。第3図にこの測定結果を示す。これは、半導
体ウェー八に薄膜形成をする毎に測定した塵埃の数を示
したもので、処理枚数に対する塵埃の数の関係を表して
いる。
After forming a thin film on the surface of a semiconductor wafer using such an apparatus, the number of dust generated inside the apparatus was measured, and it was verified that the amount of dust generated inside the apparatus was significantly reduced compared to conventional methods. Figure 3 shows the results of this measurement. This shows the number of dust particles measured each time a thin film is formed on a semiconductor wafer, and represents the relationship between the number of dust particles and the number of wafers processed.

前述したように従来の場合は、スパッタリングを行った
半導体ウェーへの処理枚数が10枚を越えるまでの間は
防着板の温度が一定せず膨脹していく。このときに、防
着板と薄膜材料との間で膨脹する割合の差が大きいため
、薄膜が剥離して大量の塵埃が発生し、最初に処理を行
った10枚の半導体ウェーハは、廃棄するか、もしくは
10枚相当分のダミースパッタをする必要があった。。
As described above, in the conventional case, the temperature of the adhesion prevention plate is not constant and expands until the number of sputtered semiconductor wafers exceeds 10. At this time, due to the large difference in expansion rate between the anti-adhesion plate and the thin film material, the thin film peels off and a large amount of dust is generated, causing the first 10 semiconductor wafers to be discarded. Otherwise, it was necessary to perform dummy sputtering for the equivalent of 10 sheets. .

さらに処理枚数が11枚目以上に達し、防着板の温度が
約90℃で一定になった後も、塵埃の数は平均して約3
00個/1.77X10’  (ad)と比較的多く、
配線不良を招くことがあった。
Furthermore, even after the number of sheets processed reaches the 11th sheet or more and the temperature of the anti-adhesion plate becomes constant at about 90℃, the number of dust particles remains on average about 3.
00 pieces/1.77X10' (ad), which is relatively large.
This could lead to poor wiring.

これに対して本実施例の場合は、1枚目の半導体ウェー
八に薄膜を形成する時点から一定して約80/1.77
X10’  (ad)と大幅に減少し、廃棄処分やダミ
ースパッターによる無駄な経費やスルーブツト低下を抑
えるとともに、製造歩留りを大幅に向上させることが可
能となった。
On the other hand, in the case of this embodiment, the ratio is constant at about 80/1.77 from the time when the thin film is formed on the first semiconductor wafer.
X10' (ad), which makes it possible to suppress wasted costs and throughput reduction due to disposal and dummy sputtering, and to significantly improve manufacturing yield.

次に、防着板に用いられた材料の線膨張率と薄膜材料の
線膨張率の差と、塵埃の数との関係を調べた結果を第4
図に示す。これは、薄膜材料(モリブデンシリサイド薄
膜)と線熱膨脹率の差がそれぞれ異なる材質から成る防
着板を用いて、10枚の半導体ウェー八にスパッタリン
グを行い、発生した塵埃の数を測定して平均をとったも
のである。ここで縦方向の各々の線は、測定値の範囲を
示している。
Next, we investigated the relationship between the difference in linear expansion coefficient of the material used for the anti-adhesion plate and that of the thin film material, and the number of dust particles.
As shown in the figure. This is done by sputtering 10 semiconductor wafers using thin film materials (molybdenum silicide thin films) and adhesion prevention plates made of materials with different coefficients of linear thermal expansion, and measuring the number of dust generated to calculate the average. This is the one taken. Here, each vertical line indicates a range of measured values.

この図から明らかなように、薄膜材料と線熱膨脹率の差
が5.5×10’/”C以下の場合には、塵埃の発生数
が大幅に減少している。特に、上述した従来の装置で用
いていた14.3×10’/℃の差があるステンレス鋼
(SUS−304)の場合と比較すると、塵埃の数は約
1/10となっている。
As is clear from this figure, when the difference between the thin film material and the coefficient of linear thermal expansion is 5.5 x 10'/''C or less, the number of dust generated is significantly reduced. Compared to the stainless steel (SUS-304) used in the apparatus, which had a difference of 14.3 x 10'/°C, the number of dust particles was about 1/10.

このように本実施例は、薄膜材料との間で線膨張率の差
が小さい材料から成る防着板を有しており、さらに防着
板の表面が35〜45μmの粗さに仕上げられているた
め、薄膜材料が剥離しにくく塵埃の発生が低く抑えられ
る。従って塵埃が配線膜へ混入せず、製造歩留りが向上
する。
In this way, this embodiment has an anti-adhesion plate made of a material with a small difference in coefficient of linear expansion from the thin film material, and the surface of the anti-adhesion plate is finished to a roughness of 35 to 45 μm. Because of this, the thin film material is difficult to peel off and the generation of dust is kept low. Therefore, dust is not mixed into the wiring film, and manufacturing yield is improved.

上述した実施例は一例であって、本発明を限定するもの
ではない。例えば本実施例では薄膜材料としてモリブデ
ンシリサイド薄膜を用いているが、防着板の表面に付着
する際の非晶質状態における線熱膨脹率がいずれも約3
 X’I O’/”Cであるタングステン、タンタル等
の高融点金属シリサイドや、窒化チタン、タングステン
チタン等のチタン化合物を用いて薄膜形成を行った場合
にも、同様の効果が得られた。
The embodiments described above are merely examples and do not limit the present invention. For example, in this example, a molybdenum silicide thin film is used as the thin film material, but the coefficient of linear thermal expansion in the amorphous state when attached to the surface of the anti-adhesion plate is approximately 3.
A similar effect was obtained when a thin film was formed using a high melting point metal silicide such as tungsten or tantalum, which is X'IO'/''C, or a titanium compound such as titanium nitride or tungsten titanium.

また防着板に用いる材料としてモリブデン以外に、薄膜
材料の線熱膨張率の差が5.5X10’/℃以下である
タングステン(線熱膨張率465XIO/”C)やチタ
ン(8,5X 10−6/”C)などの高融点金属等を
用いることができる。この場合に、防着板の表面粗さ(
最大粗さ)を10μm以上とすることで薄膜材料の付着
力を強化することができるが、必ずしもこの粗さ以上で
ある必要はない。
In addition to molybdenum, materials used for the anti-adhesion plate include tungsten (linear thermal expansion coefficient 465XIO/''C) and titanium (8.5X 10- A high melting point metal such as 6/''C) can be used. In this case, the surface roughness of the anti-adhesion plate (
Although the adhesion of the thin film material can be strengthened by setting the maximum roughness (maximum roughness) to 10 μm or more, the roughness does not necessarily have to be this roughness or more.

また防着板は、装置内部への薄膜の付着を防止し得るも
のであればよく、第1図及び第2図に示されたものと形
状が異なっていてもよい。
Further, the adhesion prevention plate may be of any type as long as it can prevent the thin film from adhering to the inside of the device, and may have a shape different from that shown in FIGS. 1 and 2.

〔発明の効果〕〔Effect of the invention〕

以上説明したように本発明の真空薄膜装置の防着板は、
薄膜材料と線熱膨張率の差が 5.5X10−6/’C以下の材料からなる防着板を有
しているため、防着板の表面に堆積した薄膜材料が剥離
して塵埃となるのが抑制されて半導体つ工−ハ表面の薄
膜に混入せず、製造歩留りを向上させることができる。
As explained above, the adhesion prevention plate of the vacuum thin film device of the present invention is
Since it has an anti-adhesion plate made of a material with a linear thermal expansion coefficient difference of 5.5X10-6/'C or less from the thin film material, the thin film material deposited on the surface of the anti-adhesion plate peels off and becomes dust. It is possible to suppress this and prevent it from being mixed into the thin film on the surface of the semiconductor chip, thereby improving the manufacturing yield.

また、防着板の表面粗さを10μm以上とすることによ
り、防着板への薄膜材料の付着力が強化されて、塵埃の
発生をより効果的に抑制することができる。
Further, by setting the surface roughness of the deposition prevention plate to 10 μm or more, the adhesion of the thin film material to the deposition prevention plate is strengthened, and the generation of dust can be more effectively suppressed.

【図面の簡単な説明】[Brief explanation of drawings]

第1図は本発明の真空薄膜形成装置の装置本体を示す斜
視図、第2図は同真空薄膜形成装置の蓋を示す斜視図、
第3図は本実施例と従来の場合とにおける半導体ウェー
ハの処理枚数と塵埃の数との関係を示した説明図、第4
図は薄膜材料の線熱膨脹率と防着板の線熱膨脹率との差
と塵埃との関係を示した説明図である。 1・・・装置本体、2・・・半導体ウェーハ、3,4゜
7.8・・・防着板、5・・・モザイクターゲット、6
・・・蓋。
FIG. 1 is a perspective view showing the main body of the vacuum thin film forming apparatus of the present invention, FIG. 2 is a perspective view showing the lid of the same vacuum thin film forming apparatus,
FIG. 3 is an explanatory diagram showing the relationship between the number of processed semiconductor wafers and the number of dust in this embodiment and the conventional case.
The figure is an explanatory diagram showing the relationship between dust and the difference between the coefficient of linear thermal expansion of the thin film material and the coefficient of linear thermal expansion of the adhesion prevention plate. DESCRIPTION OF SYMBOLS 1... Apparatus body, 2... Semiconductor wafer, 3,4°7.8... Deposition prevention plate, 5... Mosaic target, 6
···lid.

Claims (1)

【特許請求の範囲】 1、試料の表面に薄膜を形成する際に、薄膜材料が装置
内部に付着するのを防止する防着板を有した真空薄膜形
成装置において、この防着板は、前記薄膜材料の線熱膨
脹率との差が 5.5×10^−^6/℃以下の線熱膨脹率を有する材
料から成ることを特徴とする真空薄膜形成装置。 2、前記防着板は、表面粗さが10μm以上であること
を特徴とする請求項1記載の真空薄膜形成装置。
[Claims] 1. In a vacuum thin film forming apparatus having an adhesion prevention plate for preventing thin film material from adhering to the inside of the apparatus when forming a thin film on the surface of a sample, the adhesion prevention plate 1. A vacuum thin film forming apparatus comprising a material having a coefficient of linear thermal expansion that differs from the coefficient of linear thermal expansion of the thin film material by 5.5×10^-^6/°C or less. 2. The vacuum thin film forming apparatus according to claim 1, wherein the adhesion prevention plate has a surface roughness of 10 μm or more.
JP10874589A 1989-04-27 1989-04-27 Device for forming thin film in vacuum Pending JPH02285067A (en)

Priority Applications (1)

Application Number Priority Date Filing Date Title
JP10874589A JPH02285067A (en) 1989-04-27 1989-04-27 Device for forming thin film in vacuum

Applications Claiming Priority (1)

Application Number Priority Date Filing Date Title
JP10874589A JPH02285067A (en) 1989-04-27 1989-04-27 Device for forming thin film in vacuum

Publications (1)

Publication Number Publication Date
JPH02285067A true JPH02285067A (en) 1990-11-22

Family

ID=14492437

Family Applications (1)

Application Number Title Priority Date Filing Date
JP10874589A Pending JPH02285067A (en) 1989-04-27 1989-04-27 Device for forming thin film in vacuum

Country Status (1)

Country Link
JP (1) JPH02285067A (en)

Cited By (8)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
JPH05106020A (en) * 1990-03-02 1993-04-27 Applied Materials Inc Shield preparation for reducing fine particle in physical vapor deposition room
JPH09195035A (en) * 1996-01-10 1997-07-29 Teijin Ltd Apparatus for producing transparent conductive film
EP0853331A2 (en) * 1997-01-08 1998-07-15 Applied Materials, Inc. Back sputtering shield
US6045665A (en) * 1997-06-02 2000-04-04 Japan Energy Corporation Method of manufacturing member for thin-film formation apparatus and the member for the apparatus
JP2006144129A (en) * 1994-04-29 2006-06-08 Akt Kk Shield configuration for vacuum chamber
KR100681889B1 (en) * 2002-09-11 2007-02-12 니폰 필라고교 가부시키가이샤 Material for gland packing and the gland packing
KR100681887B1 (en) * 2002-09-11 2007-02-12 니폰 필라고교 가부시키가이샤 Material for gland packing and the gland packing
JP2010171343A (en) * 2009-01-26 2010-08-05 Tokyo Electron Ltd Component for heat treatment device, and heat treatment device

Cited By (10)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
JPH05106020A (en) * 1990-03-02 1993-04-27 Applied Materials Inc Shield preparation for reducing fine particle in physical vapor deposition room
JP2006144129A (en) * 1994-04-29 2006-06-08 Akt Kk Shield configuration for vacuum chamber
JPH09195035A (en) * 1996-01-10 1997-07-29 Teijin Ltd Apparatus for producing transparent conductive film
EP0853331A2 (en) * 1997-01-08 1998-07-15 Applied Materials, Inc. Back sputtering shield
EP0853331A3 (en) * 1997-01-08 2000-10-11 Applied Materials, Inc. Back sputtering shield
US6045665A (en) * 1997-06-02 2000-04-04 Japan Energy Corporation Method of manufacturing member for thin-film formation apparatus and the member for the apparatus
US6319419B1 (en) 1997-06-02 2001-11-20 Japan Energy Corporation Method of manufacturing member for thin-film formation apparatus and the member for the apparatus
KR100681889B1 (en) * 2002-09-11 2007-02-12 니폰 필라고교 가부시키가이샤 Material for gland packing and the gland packing
KR100681887B1 (en) * 2002-09-11 2007-02-12 니폰 필라고교 가부시키가이샤 Material for gland packing and the gland packing
JP2010171343A (en) * 2009-01-26 2010-08-05 Tokyo Electron Ltd Component for heat treatment device, and heat treatment device

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