JPH02283136A - Hybrid circuit - Google Patents

Hybrid circuit

Info

Publication number
JPH02283136A
JPH02283136A JP1105217A JP10521789A JPH02283136A JP H02283136 A JPH02283136 A JP H02283136A JP 1105217 A JP1105217 A JP 1105217A JP 10521789 A JP10521789 A JP 10521789A JP H02283136 A JPH02283136 A JP H02283136A
Authority
JP
Japan
Prior art keywords
signal
circuit
transformer
amplifier
transmission
Prior art date
Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
Granted
Application number
JP1105217A
Other languages
Japanese (ja)
Other versions
JPH07120997B2 (en
Inventor
Masatoshi Yago
家合 政俊
Yukikazu Hirose
廣瀬 之和
Current Assignee (The listed assignees may be inaccurate. Google has not performed a legal analysis and makes no representation or warranty as to the accuracy of the list.)
Panasonic Holdings Corp
Original Assignee
Matsushita Electric Industrial Co Ltd
Priority date (The priority date is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the date listed.)
Filing date
Publication date
Application filed by Matsushita Electric Industrial Co Ltd filed Critical Matsushita Electric Industrial Co Ltd
Priority to JP1105217A priority Critical patent/JPH07120997B2/en
Publication of JPH02283136A publication Critical patent/JPH02283136A/en
Publication of JPH07120997B2 publication Critical patent/JPH07120997B2/en
Anticipated expiration legal-status Critical
Expired - Lifetime legal-status Critical Current

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  • Amplifiers (AREA)
  • Bidirectional Digital Transmission (AREA)

Abstract

PURPOSE:To evade a phase difference between a transmission signal inputted to a reception circuit via a noninverting amplifier and an inverted transmission signal via a transmission circuit together with a reception signal by providing a dummy circuit equivalent to a transformer and a transmission line. CONSTITUTION:A noninverting amplifier 7 in a hybrid circuit consists of an operational amplifier 21 and 3 resistors 22, 23, 24, and a dummy circuit 8 consists of a dummy transformer 25 of the same specification to that of a transformer 19 and of a dummy resistor 26 of the same resistance as a load resistor 20. One of transmission signal (a) inputs passes through an inverting amplifier 2, in which the signal is inverted and a phase shift is caused at the transformer 19, and the resulting signal is inputted to a summing amplifier 5. The other of the transmission signals (a) passes through a noninverting ampli fier 7, a phase shift is caused in a dummy transformer 25 and the resulting signal is inputted to one input of the summing amplifier 5. Thus, the summing amplifier 5 sums the inverting signals of the same phase difference with respect to the input of the transmission signal (a) to suppress the bypass of the transmis sion signal (a) to a reception signal output terminal 6.

Description

【発明の詳細な説明】 産業上の利用分野 タトエば、データ伝送システムにおける送信と受信が同
時に可能な信号の送受信端子を有し、内部に送信部回路
と受信部回路を有する変復調端末装置において、送信部
回路からの信号は、上記送受信端子から送信し、受信部
回路の入力端子には入力せず、一方では送受信端子で受
信した信号は、受信部回路の入力端子に入力し、送信部
回路には入力しないという機能が必要になる。このよう
な機能を有する回路をハイブリッド回路といい、本発明
はかかる機能を有するハイブリッド回路に関するもので
ある。
DETAILED DESCRIPTION OF THE INVENTION The industrial field of application is a modulation/demodulation terminal device having a signal transmission/reception terminal capable of simultaneously transmitting and receiving signals in a data transmission system, and having a transmitter circuit and a receiver circuit inside. The signal from the transmitter circuit is transmitted from the above-mentioned transmitter/receiver terminal and is not input to the input terminal of the receiver circuit, while the signal received at the transmitter/receiver terminal is input to the input terminal of the receiver circuit and is not input to the input terminal of the receiver circuit. A function that does not input data is required. A circuit having such a function is called a hybrid circuit, and the present invention relates to a hybrid circuit having such a function.

従来の技術 ハイブリッド回路は、上記のように、データの送信・受
信を行う場合、変復調端末装置からの送出信号と回線か
らの受信信号を合成分離する回路であり、このような従
来のハイブリッド回路を第3図に基づいて説明する。
Conventional technology hybrid circuits, as mentioned above, are circuits that combine and separate the transmission signal from the modulation/demodulation terminal equipment and the reception signal from the line when transmitting and receiving data. This will be explained based on FIG.

送出信号入力端子1から入力された送出信号aは送出用
の反転増幅器2で反転され、送受信端子3を介して伝送
路4へ送出され、また伝送路4から送受信端子3を介し
て入力した受信信号すは受信用の加算増幅器5において
送出信号aと加算されて受信信号出力端子6へ出力され
る。送出信号は加算増幅器5署こおいて互いに反転した
信号が加算されるため、受信信号出力端子6へ現われな
いことになり、伝送路4からの受信信号すだけが受倍信
号出力端子6へ現われ、ハイブリッド回路の機能を実現
している。
The transmission signal a inputted from the transmission signal input terminal 1 is inverted by the transmission inverting amplifier 2 and sent to the transmission line 4 via the transmission/reception terminal 3. The signal A is added to the sending signal a in the receiving summing amplifier 5 and outputted to the received signal output terminal 6. Since the transmitted signals are inverted from each other in five summing amplifiers and are added together, they do not appear at the received signal output terminal 6, and only the received signal from the transmission line 4 appears at the multiplied signal output terminal 6. , realizing the functionality of a hybrid circuit.

第3図のハイブリッド回路の具体的な回路図を第4図に
示す。反転増幅器2を演算増幅器(以下オペアンプと称
す)11と2個の抵抗12 、13で構成し、加算増幅
器5をオペアンプ14と3個の抵抗15゜16 、17
で(Δ成し、反転増幅器2のオペアンブエ1の出力側は
ハイブリッド機能を持たせるための抵抗18および送受
信端子3を介して、伝送路4との信号の受は渡しを行う
トランス19に接続されている。
A specific circuit diagram of the hybrid circuit shown in FIG. 3 is shown in FIG. 4. The inverting amplifier 2 consists of an operational amplifier (hereinafter referred to as an operational amplifier) 11 and two resistors 12 and 13, and the summing amplifier 5 consists of an operational amplifier 14 and three resistors 15°16 and 17.
The output side of the operational amplifier 1 of the inverting amplifier 2 is connected to a transformer 19 for receiving and receiving signals from the transmission line 4 via a resistor 18 and a transmitting/receiving terminal 3 for providing a hybrid function. ing.

Jは伝送路4の負荷抵抗を表わしている。J represents the load resistance of the transmission line 4.

発明が解決しようとする課題 第4図において、トランス19は直流抵抗と自己インダ
クタンスを持った回路であり、送出信号3の伝送N14
への伝達は、トランスI9の送受信端子3側を1次側、
他方を2次側とすればトランス19の1次側コイルに交
流電流を流すことで行われる。
Problems to be Solved by the Invention In FIG. 4, the transformer 19 is a circuit having DC resistance and self-inductance, and the transmission signal N14 of the sending signal 3 is
For transmission, the transmission/reception terminal 3 side of the transformer I9 is connected to the primary side,
If the other side is the secondary side, this is done by passing an alternating current through the primary coil of the transformer 19.

そして送受信端子3の送出信号Cの成分は、コイルの1
次側から見た直流抵抗分子と自己インダクタジスωLi
ζ電流を流すことで発生する。コイルに流す電流iは送
出信号aの入力電圧V、を反転増幅するオペアンプエ1
より抵抗18を通して供給される。
The component of the sending signal C of the transmitting/receiving terminal 3 is 1 of the coil.
DC resistance molecule and self-inductance ωLi seen from the next side
It is generated by passing a ζ current. The current i flowing through the coil is an operational amplifier 1 that inverts and amplifies the input voltage V of the sending signal a.
is supplied through the resistor 18.

ここでトランス19のコイルで発生する11 EEvに
ついて一般的に説明すると、第5図に示すように、流す
電流iに対して発生する電圧は90’進むことになる。
Here, to explain generally about 11 EEv generated in the coil of the transformer 19, as shown in FIG. 5, the voltage generated with respect to the flowing current i advances by 90'.

を流iによりコイルに発生する逆起電力をeとすると、 i = 13i1ωt    IIは定数)  ・=−
(1)となり、5ina+tのωtに対する変化率はc
osωtであるので(2)式は、 e=ωLl cosωt   −・−+31と表わせ、
電流iを流すことで逆起電力eが誘導される。また、コ
イルには直流抵抗分子も含まれるため、電流11こよる
発生電圧Vは第6図に示すベクトルで表わされ、次式で
示すことができる。
Let e be the back electromotive force generated in the coil by current i, then i = 13i1ωt II is a constant) ・=-
(1), and the rate of change of 5ina+t with respect to ωt is c
Since osωt, equation (2) can be expressed as e=ωLl cosωt −・−+31,
A back electromotive force e is induced by flowing a current i. Furthermore, since the coil also includes a DC resistance molecule, the voltage V generated by the current 11 is expressed by the vector shown in FIG. 6, and can be expressed by the following equation.

v=i(r+jωL)  ・・・・・・(4)発生する
電圧Vの大きさは lvl =j、/;可爾了・・・・・・(5)電流iに
対する電圧Vの位相角θは 一1ωL θ=tan  □  ・・・・・・t6Jとなる。した
がって、第4図の送受信端子3の送出信号Cは入力の送
出信号aに対して位相が進入でしまい、オペアンプ14
で形成する加算増幅器5を通して受信信号出力端子6I
こ、送出信号aの一部が出力されてしまうという問題が
あった。
v=i(r+jωL)...(4) The magnitude of the generated voltage V is lvl =j, /; possible...(5) Phase angle θ of voltage V with respect to current i is -1ωL θ=tan □ ... t6J. Therefore, the sending signal C of the transmitting/receiving terminal 3 in FIG.
The received signal output terminal 6I is passed through the summing amplifier 5 formed by
However, there was a problem in that part of the sending signal a was output.

受信信号出力端子6に出力される送出信号aの電圧をV
l、抵抗12の抵抗値をR12、抵抗13のj氏抗値を
R11、抵抗15の抵抗値をR16、抵抗工6の抵抗値
をR1゜、抵抗17の抵抗値をR1?、抵抗18の抵抗
値をR18とすると、電圧V!は次式で表わされる。
The voltage of the sending signal a output to the received signal output terminal 6 is V
l, the resistance value of resistor 12 is R12, the resistance value of resistor 13 is R11, the resistance value of resistor 15 is R16, the resistance value of resistor 6 is R1°, the resistance value of resistor 17 is R1? , the resistance value of the resistor 18 is R18, then the voltage V! is expressed by the following equation.

オペアンプ11で形成する反転増幅の利得を2倍とすれ
ば、(7)式の電圧V、は となる。抵抗18とトランス19のコイルのインピーダ
ンスが同じであれば、 R,、=q刀T   ・山・・ (9)となり、(82
式は、 となる。00式から明らかなようにR17/RI5の項
(こ(r+jωL) JA分が無ければv2−0にはで
きないことになる。
If the gain of the inverting amplification formed by the operational amplifier 11 is doubled, the voltage V in equation (7) becomes. If the impedance of the resistor 18 and the coil of the transformer 19 are the same, then R,, = qT, mountain... (9), and (82
The formula is: As is clear from Equation 00, v2-0 cannot be achieved without the R17/RI5 term ((r+jωL) JA).

本発明は上記問題を解決するものであり、送出信号の受
信回路の出力への回り込みを抑えることができる7ハイ
ブリツド回路を提供することを目的とするものである。
The present invention solves the above-mentioned problem, and aims to provide a 7-hybrid circuit that can suppress the leakage of the transmitted signal to the output of the receiving circuit.

課題を解決するための手段 上記問題を解決するため本発明のハイブリッド回路は、
送出信号を入力して反転し、トランスを介して伝送路へ
送出する送出回路と、前記伝送路から前記トランスを介
して入力した受信信号および正転増幅器を介して入力し
た前記送出信号を互いに加算して出力する受信回路と、
前記正転増幅器の出力側に接続された、前記トランスお
よび伝送路と同等のダミー回路とを備えたものである。
Means for Solving the Problems In order to solve the above problems, the hybrid circuit of the present invention has the following features:
A sending circuit that inputs a sending signal, inverts it, and sends it out to a transmission line via a transformer, and adds together the receiving signal input from the transmission line via the transformer and the sending signal input via a normal amplifier. a receiving circuit that outputs the
The dummy circuit is connected to the output side of the normal rotation amplifier and is equivalent to the transformer and transmission line.

作用 上記構成により、トランスおよび伝送路と同等のダミー
回路を備えたことによって、受信回路へ正転増幅器を介
して入力される送出信号と送出回路を介して受信信号と
ともに入力される反転した送出信号の位相差がなくなり
、送出信号の受信回路の出力への回り込みが抑えられる
Effect With the above configuration, by providing a dummy circuit equivalent to a transformer and a transmission line, a transmission signal is inputted to the reception circuit via a normal amplifier, and an inverted transmission signal is inputted together with the reception signal via the transmission circuit. The phase difference between the signals is eliminated, and the looping of the transmitted signal to the output of the receiving circuit is suppressed.

実施例 以下、本発明の一実施例を図直に基づいて説明する。な
お、従来例の第3図および第4図の構成および部品と同
一な構成および部品には同一の符号を付して説明を省略
する。
EXAMPLE Hereinafter, an example of the present invention will be described based on the drawings. Note that the same structures and parts as those in FIGS. 3 and 4 of the conventional example are denoted by the same reference numerals, and explanations thereof will be omitted.

第1図は本発明の一実施例を示すハイブリッド回路の構
成図である。本発明のハイブリッド回路は、加算増幅器
5へ、正転増幅器7を介して、送出信号aを入力し、正
転増幅器7の出力側にトランス19および伝送@4(負
荷抵抗20)と同等のダミー回路8を接続して構成して
いる。
FIG. 1 is a block diagram of a hybrid circuit showing one embodiment of the present invention. The hybrid circuit of the present invention inputs the sending signal a to the summing amplifier 5 via the non-rotating amplifier 7, and has a transformer 19 and a dummy equivalent to the transmission@4 (load resistor 20) on the output side of the non-rotating amplifier 7. It is constructed by connecting circuits 8.

第1図のハイブリッド回路の具体的な回路図を第2図に
示す。正転増幅器7をオペアンプ21および3個の抵抗
22 、23 、24で構成し、ダミー回路8ヲ!・ラ
ンス19と同一仕様のダミートランス25および負荷抵
抗20と同一の抵抗値のダミー抵抗26にて構成してい
る。
A specific circuit diagram of the hybrid circuit shown in FIG. 1 is shown in FIG. 2. The normal rotation amplifier 7 is composed of an operational amplifier 21 and three resistors 22, 23, and 24, and a dummy circuit 8! - Consists of a dummy transformer 25 having the same specifications as the lance 19 and a dummy resistor 26 having the same resistance value as the load resistor 20.

上記構成によるハイブリッド回路の動作を説明する。The operation of the hybrid circuit with the above configuration will be explained.

送出信号a入力の一方は、反転増幅器2を通り反転し、
トランス19で位相ずれを発生して加算増幅器5に入力
される。送出信号aの他方は正転増幅器7を通してダミ
ートランス25で位相ずれを発生し、加算増幅器5の一
方に入力する。したがって、加算増幅器5では、送出信
号aの入力に対して互いに同一の位相差の反転信号を加
算することlζなり、受信信号出力端子6への送信信号
a(D回り込みを抑えることができる。
One of the input signals a is inverted through an inverting amplifier 2,
A phase shift is generated in the transformer 19 and input to the summing amplifier 5. The other output signal a passes through the non-rotating amplifier 7, generates a phase shift in the dummy transformer 25, and is input to one side of the summing amplifier 5. Therefore, in the summing amplifier 5, the inverted signals having the same phase difference are added to the input of the sending signal a, thereby suppressing the loop-around of the sending signal a(D) to the received signal output terminal 6.

発明の効果 以上のように本発明によれば、トランスおよび伝送路と
同等のダミー回路を備えたことによって、受信回路へ正
転増幅器を介して入力される送出信号と送出回路を介し
て受信信号とともに入力される反転した送出信号の位相
差をなくすことができ、よって送出信号の受信l1il
!回路への回り込みを防止でき、性能の向上したハイブ
リッド回路を提供することができる。
Effects of the Invention As described above, according to the present invention, by providing a dummy circuit equivalent to a transformer and a transmission line, a transmission signal inputted to a reception circuit via a normal amplifier and a reception signal inputted via a transmission circuit are It is possible to eliminate the phase difference of the inverted transmission signal that is input with the
! A hybrid circuit with improved performance can be provided by preventing detours to the circuit.

【図面の簡単な説明】[Brief explanation of drawings]

第1図は本発明の一実施例を示すハイブリッド回路のv
t構成図第2図は第1図のハイブリッド回路の回路図、
第3図は従来のハイブリッド回路の構成図、第4圓は従
来のハイブリッド回路の回珀図、第5図はコイルに流す
電流と発生する電圧との位相関係図、第6図はコイルの
持つ直流抵抗弁と自己インダクタンスと、tX流を充し
て発生するな圧とのベクトル関係図である。 1・・・送出信号入力端子、2・・・反転増幅器(送出
回路)、3・・・送受信端子、4・・・伝送路、5・・
・加算増幅器(受信回路)、6・・・受信信号出力端子
、7・・・正転増幅器、8・・・ダミー四項、19・・
・(信号の受は渡し用)トランス、20・・・負荷抵抗
、25・・・ダミートランス、26・・・ダミー抵抗、
a・・・送出信号、b・・・受信信号。
FIG. 1 shows a hybrid circuit showing an embodiment of the present invention.
t Configuration diagram Fig. 2 is a circuit diagram of the hybrid circuit shown in Fig. 1;
Fig. 3 is a block diagram of a conventional hybrid circuit, Fig. 4 is a circuit diagram of a conventional hybrid circuit, Fig. 5 is a diagram of the phase relationship between the current flowing through the coil and the voltage generated, and Fig. 6 is a diagram of the relationship between the current flowing through the coil and the voltage generated. FIG. 2 is a vector relationship diagram between a DC resistance valve, self-inductance, and pressure generated by filling the tX flow. DESCRIPTION OF SYMBOLS 1... Sending signal input terminal, 2... Inverting amplifier (sending circuit), 3... Transmission/reception terminal, 4... Transmission line, 5...
- Summing amplifier (receiving circuit), 6... Received signal output terminal, 7... Normal rotation amplifier, 8... Dummy four terms, 19...
・(Signal reception is for passing) Transformer, 20... Load resistor, 25... Dummy transformer, 26... Dummy resistor,
a... Sending signal, b... Receiving signal.

Claims (1)

【特許請求の範囲】[Claims] 1、送出信号を入力して反転し、トランスを介して伝送
路へ送出する送出回路と、前記伝送路から前記トランス
を介して入力した受信信号および正転増幅器を介して入
力した前記送出信号を互いに加算して出力する受信回路
と、前記正転増幅器の出力側に接続された、前記トラン
スおよび伝送路と同等のダミー回路とを備えたハイブリ
ッド回路。
1. A sending circuit that inputs a sending signal, inverts it, and sends it to a transmission line via a transformer, and a receiving signal inputted from the transmission line via the transformer and the sending signal inputted via a normal amplifier. A hybrid circuit comprising a receiving circuit that adds the signals to each other and outputs the result, and a dummy circuit that is connected to the output side of the normal rotation amplifier and is equivalent to the transformer and the transmission line.
JP1105217A 1989-04-24 1989-04-24 Hybrid circuit Expired - Lifetime JPH07120997B2 (en)

Priority Applications (1)

Application Number Priority Date Filing Date Title
JP1105217A JPH07120997B2 (en) 1989-04-24 1989-04-24 Hybrid circuit

Applications Claiming Priority (1)

Application Number Priority Date Filing Date Title
JP1105217A JPH07120997B2 (en) 1989-04-24 1989-04-24 Hybrid circuit

Publications (2)

Publication Number Publication Date
JPH02283136A true JPH02283136A (en) 1990-11-20
JPH07120997B2 JPH07120997B2 (en) 1995-12-20

Family

ID=14401503

Family Applications (1)

Application Number Title Priority Date Filing Date
JP1105217A Expired - Lifetime JPH07120997B2 (en) 1989-04-24 1989-04-24 Hybrid circuit

Country Status (1)

Country Link
JP (1) JPH07120997B2 (en)

Cited By (2)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
US5767985A (en) * 1994-06-29 1998-06-16 Fuji Xerox Co., Ltd. System employing facsimile units to transmit E-mail between information processors over public telephone lines
JP2007281570A (en) * 2006-04-03 2007-10-25 Kawasaki Microelectronics Kk Serial communication circuit

Cited By (2)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
US5767985A (en) * 1994-06-29 1998-06-16 Fuji Xerox Co., Ltd. System employing facsimile units to transmit E-mail between information processors over public telephone lines
JP2007281570A (en) * 2006-04-03 2007-10-25 Kawasaki Microelectronics Kk Serial communication circuit

Also Published As

Publication number Publication date
JPH07120997B2 (en) 1995-12-20

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