JPH0228160B2 - - Google Patents

Description

DETAILED DESCRIPTION OF THE INVENTION The present invention relates to a speech recognition device capable of recognizing speech.

FIG. 1 shows a conventional speech recognition device. In the figure, 1 is a microphone into which audio is input;
is a group of bandpass filters that frequency-analyzes the audio signal from the microphone 1 for eight frequencies equally divided into the audio band (100Hz to 4KHz), and eight frequency spectrum values x ₁ (t) that change with time t, A vector parameter 〓(t) whose components are x ₂ (t), . . . , x ₈ (t) is output. 3 is a voice pattern creation circuit, which generates a voice time domain T.
Based on the vector parameter obtained from the band pass filter group 2, 16 samples at 1/16T time interval (n) from the vector parameter (t), [where n is the sample number, n=1, 2, . . . , 16] and vector parameters of these 16 samples 〓
(n) is obtained. 4 is a registration pattern memory, which creates the voice pattern by setting the switch Sw to a and inputting L recognition words to the microphone 1 in the registration mode performed in advance. L voice patterns X(l) obtained from circuit 3, [l=1,
2,...,L] are stored as registered patterns. Reference numeral 5 denotes an input pattern memory, in which the switch Sw is set to b in the recognition mode, and by inputting one of a plurality of recognition words to the microphone 1, the voice pattern creation circuit is activated. 3
An unknown voice pattern X obtained from the above is stored as an input pattern. 6 is a comparison circuit that compares the input pattern X of the input pattern memory 5 and each registered pattern X ^(l) of the registered pattern memory 4, and each vector parameter of the input pattern
(n) = (x ₁ (n), x ₂ (n), ... x ₈ (n)) and each vector parameter of registered pattern X ^(l) = ^(l) (n) = (x ₁ ^(l)
(n), x ₂ ^(l) (n), ...x ₈ ^(l) (n)) d ^(l) (
n)= ₈ 〓 ⁱ⁼¹ ｜x ^(l) _i (n)−x _i (n)｜total sum D(l)={ ₁₆ 〓 ⁿ⁼¹ d ^(l) (n)}
Each recognized word (l=1,
2,...L) is calculated. A distance memory 7 stores distances D(l) for L recognized words obtained from the comparison circuit 6. Reference numeral 8 denotes a recognition word determination circuit, which detects l when D(l) of the distance memory 7 is minimum, and recognizes the input speech at this time as the l-th recognition word.

In the new speech recognition device, the distance between the input pattern X and the registered pattern X ^(l) in its comparison circuit 6,
In other words, in order to find the similarity, as shown in Figure 2,
Linear matching is performed to match both vector parameters 〓(n), 〓 ^(l) (n) of the same sample number of both patterns X, X ^(l) , and these two parameters 〓(n), 〓 ^(l) (n ) is calculated.

However, in general, even if the same speaker utters the same word, the duration of speech differs for each utterance, and furthermore, the duration of each phoneme that makes up the speech expands and contracts at different rates. . Therefore, for the input pattern X and each registered pattern X ^(l) , both vector parameters 〓 ^(l) (n) columns, 〓
(n) The sample numbers of corresponding phonemes between columns would be different, and this would prevent accurate calculation of the distance between input pattern X and registered ^pattern We had not yet achieved a voice recognition rate. In order to eliminate such inconveniences, attempts have been made to adapt to the nonlinear expansion and contraction of each phoneme that makes up speech by incorporating a dynamic programming (hereinafter referred to as DP method) method. In other words, the time series of parameters of the input pattern and the time series of parameters of the registered pattern are made to nonlinearly correspond in any combination, and the distance between the patterns is calculated as the sum when the sum of the errors between the two corresponding feature parameters is minimized. Among the distances calculated for all recognized words, the recognized word that shows the smallest distance is determined to be the input speech at this time.

However, as mentioned above, the amount of calculation for matching processing of speech patterns using the DP method is 100 times the amount of calculation for the above-mentioned linear matching processing, and when a large number of recognition words are provided, At present, it is difficult to perform real-time processing at the calculation speed of a microcomputer, and it is necessary to rely on a large-sized computer.

The present invention was made in view of the current situation, and it is possible to perform recognition calculations by selecting in advance recognition words to be used in speech pattern matching processing using the DP method. The present invention provides a speech recognition device whose purpose is to reduce the amount of noise.

FIG. 3 shows the configuration of the speech recognition device of the present invention.

In the same figure, 1 to 5 indicate the microphone to input pattern memory as in the conventional example shown in FIG. 1, and 6' and 7' indicate the first comparator circuit and the first distance memory. However, these also operate in the same way as the comparison circuit 6 and distance memory 7 of the conventional example. Reference numeral 9 denotes a recognition word candidate selection circuit, which selects an appropriate number of minimum distances D(l) for all recognition words stored in the distance memory 7', and selects these appropriate number of recognition word numbers. The value of l is sent to the gate circuit 10 and stored in the registered pattern memory 4.
From here, an appropriate number of registered patterns X (l) with numbers indicated by the values of ( ^l ) are read out. The recognition word candidate selection circuit 9 selects the distance D(l), for example, from all
It is sufficient to find D ^(l) smaller than the average value of D(l). 1
Reference numeral 1 denotes a second comparison circuit, in which an appropriate number L'(<L) read out from the registered pattern memory 4 by the recognition word candidate selection circuit 9 and the gate circuit 10 is used.
The registered pattern X ^(l) (l' = 1, 2, ..., L') and the input pattern
A comparison is made using the DP method. In the second comparator circuit 10, as shown in FIG.
Even when the registered pattern X ^(l) ′ called ASAGAO is matched with the input pattern X called ASAGAO in which each phoneme is expanded or contracted, these patterns X ^(l ′ ⁾ ,
Non-linear matching is performed by shifting the sample numbers of both vector parameters 〓 ^(l ′ ⁾ (n) and 〓 (n) so that the phonemes of X can correspond, and the sample numbers from the starting point 0 to the ending point E are matched. route F
is obtained, and at the same time, along this path F, the corresponding vector parameters 〓((l)′), 〓(n±m),
[However, the error between n±m=1, 2,..., 16] d(n, n±m)= ₈ 〓 ⁱ⁼¹ ｜x ^(l ′ ⁾ _i (n)−x _i (n+m)｜ Total sum D′ _(l ′ ₎ = _N 〓 ⁿ⁼¹ d(n, n±m), [where N is the number of corresponding sample combinations] is the distance between the l-th registered pattern X ^(l) and the input pattern It is required as. That is, in Fig. 4, if we consider the point P where 〓 ^(l ′ ⁾ 7 and 〓6 correspond, the route immediately before reaching this point P is that 〓 ^(l ′ ⁾ 6 and 〓6 correspond. Point Q, 〓 ^(l ′ ⁾ 6 and 〓5 correspond to point R, 〓 ^(l ′ ⁾ 7 and 〓5.
is limited to the three corresponding points S, and the point that is the minimum among the sum of errors along the path from the starting point 0 to each of these points Q, R, and S, in this case point R
As shown in the figure, the path from point R to point P is determined, and the sum of errors from point 0 to point P is derived in the same way. Such arithmetic processing is progressed in a recursive manner, and the sum of the errors from the starting point 0 to the ending point E, that is, the distance between both patterns X ^(l ′ ⁾ and the distance D′(l′) between Ultimately, this route F will be determined. 12 is a second distance memory, which stores an appropriate number (L'<L) calculated by the second comparison circuit 11;
The distance of the input speech at this time to the recognition word candidates
D′(l′) is stored. 13 is a recognition word determination circuit, which is stored in the second distance memory 12.
By detecting l′ when the distance D′(l′) is the minimum among L′ distances D′(l′), the input speech at this time is the l′th recognized word. It is determined that there is.

In the speech recognition device with this new configuration, in the recognition mode, the first comparison circuit 6' performs linear matching between the plurality of registered patterns stored in the registered pattern memory 4 and the input pattern in the input pattern memory 5. The recognition word candidate selection circuit 7'
An appropriate number of registered patterns that are determined to be relatively similar to the input pattern are selected in advance.

Then, in the second comparison circuit 11, the appropriate number of registered patterns selected by the recognition word candidate selection circuit 9 and the input pattern are compared according to non-linear matching using the DP method. Then, the recognition word determining circuit 13 detects the one most similar to the input pattern among the appropriate number of registered patterns, thereby recognizing the input speech at this time.

As is clear from the above description, the speech recognition device of the present invention linearly correlates the time series of the feature parameters of the input speech pattern and all registered speech patterns, and calculates the sum of errors between the two corresponding parameters. Using the first comparison circuit that can be derived with a relatively small amount of calculations, select an appropriate number of registered voice patterns with a relatively small sum of errors, and compare these appropriate number of registered voice patterns and the input pattern. By associating the time series of both feature parameters in all possible combinations and calculating the sum of errors between the two corresponding parameters, accurate distances between the parameters that are adapted to the time expansion and contraction of the input audio can be derived. Since the registered voice pattern with the minimum error is selected using the second comparison circuit that can
In other words, this second comparison circuit does not compare all registered patterns, but only a limited number of patterns that are highly likely to be recognized words.
While improving the recognition rate, it is possible to suppress an increase in the overall amount of calculation required for recognition processing. Therefore, even if a small computer such as a microcomputer is used, it is possible to realize a high-performance speech recognition device equipped with a large number of recognized words.

[Brief explanation of drawings]

Fig. 1 is a block diagram of a conventional speech recognition device, Fig. 2 is a schematic diagram of matching speech patterns in a comparison circuit of the conventional device, Fig. 3 is a block diagram of a speech recognition device of the present invention, and Fig. 4 is a block diagram of the speech recognition device of the present invention. A schematic diagram of audio pattern matching in the second comparison circuit of the device is shown, respectively. DESCRIPTION OF SYMBOLS 1...Microphone, 2...Band pass filter group, 3...Audio pattern creation circuit, 4...Registered pattern memory, 5...Input pattern memory, 6'...First
comparison circuit, 7'...first distance memory, 9...recognition word candidate selection circuit, 11...second comparison circuit, 12...
Second distance memory, 8, 13... recognition word determination circuit.

Claims (1)

[Claims] 1. A feature extraction circuit that extracts speech feature parameters from input speech in a time series manner, an input pattern memory that stores the time series of these feature parameters as an input speech pattern, and separately from this a feature extraction circuit that extracts speech feature parameters from input speech in a time-series manner. , a reference pattern memory in which the time series of characteristic parameters of each voice is stored as a reference voice pattern, and a comparison between the input voice pattern in the input pattern memory and each reference voice pattern in the reference pattern memory. a first comparison circuit that linearly correlates the time series of the feature parameters and calculates the sum of errors between the two corresponding feature parameters for each reference speech pattern;
Separately, in order to compare the input speech pattern in the input pattern memory with each reference speech pattern in the reference pattern memory, the time series of both feature parameters are made to correspond in all possible combinations, and the difference between the two corresponding feature parameters is compared. a second comparison circuit that calculates the sum total for each reference speech pattern when the total sum of errors is the minimum; and the first comparison circuit compares the input speech pattern with all the reference speech patterns. Then, select an appropriate number of reference voice patterns whose total error obtained from the first comparison circuit is relatively small, and combine these appropriate number of reference voice patterns and the input voice pattern with the second comparison circuit. A speech recognition device characterized in that a comparison circuit performs the comparison again and selects a reference speech pattern that minimizes the sum of errors obtained from the second comparison circuit.