JPH02278884A - Luminous intensity variable testing circuit for light emitting diode - Google Patents
Luminous intensity variable testing circuit for light emitting diodeInfo
- Publication number
- JPH02278884A JPH02278884A JP1102134A JP10213489A JPH02278884A JP H02278884 A JPH02278884 A JP H02278884A JP 1102134 A JP1102134 A JP 1102134A JP 10213489 A JP10213489 A JP 10213489A JP H02278884 A JPH02278884 A JP H02278884A
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- Prior art keywords
- light emitting
- emitting diode
- diode
- led
- circuit
- Prior art date
- Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
- Pending
Links
- 238000012360 testing method Methods 0.000 title claims abstract description 67
- 239000004065 semiconductor Substances 0.000 claims abstract description 20
- 230000007547 defect Effects 0.000 abstract 5
- 230000007274 generation of a signal involved in cell-cell signaling Effects 0.000 description 12
- 238000010586 diagram Methods 0.000 description 8
- 238000012544 monitoring process Methods 0.000 description 2
- 230000005540 biological transmission Effects 0.000 description 1
- 230000000694 effects Effects 0.000 description 1
- 238000005516 engineering process Methods 0.000 description 1
- 238000004519 manufacturing process Methods 0.000 description 1
- 230000002265 prevention Effects 0.000 description 1
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- Testing Of Individual Semiconductor Devices (AREA)
- Testing Or Measuring Of Semiconductors Or The Like (AREA)
Abstract
Description
【発明の詳細な説明】
〔概 要〕
発生する障害表示に発光ダイオードを用いた表示試験回
路に関し、
発光ダイオードの試験を行うときに、発光ダイオードと
発光ダイオード駆動回路の試験を同時に行うことのでき
るようにした発光ダイオード試験回路を提供することを
目的とし、
発光ダイオードと該発光ダイオードを点燈させる駆動用
半導体3端子素子を直列接続し、前記直列接続された回
路の一端を直流電圧にかつ他の一端をアースにそれぞれ
接続した回路において、障害が発生した時、該障害にに
対応した信号を前記駆動用半導体3端子素子のベースに
加え、前記発光ダイオードを点燈状態として発光させる
障害信号出力手段と、一端に直流電圧を加えたスイッチ
をオンオフして試験信号を発生し、該試験信号を前記半
導体3端子素子のベースに加えて前記発光ダイオードを
準点燈状態として発光させる試験信号発生手段と、を設
けて前記駆動用半導体3端子素子を制御し、前記発光ダ
イオードが点燈状態と準点燈状態の再発光状態の表示が
出来るように構成する。[Detailed Description of the Invention] [Summary] Regarding a display test circuit that uses a light emitting diode to indicate a fault that occurs, when testing the light emitting diode, it is possible to simultaneously test the light emitting diode and the light emitting diode drive circuit. In order to provide a light emitting diode test circuit, a light emitting diode and a driving semiconductor three-terminal element for lighting the light emitting diode are connected in series, one end of the series connected circuit is set to a DC voltage, and the other end is set to a DC voltage. When a fault occurs in a circuit whose one end is connected to ground, a signal corresponding to the fault is applied to the base of the driving semiconductor three-terminal element, and a fault signal is output to turn on the light emitting diode and emit light. and test signal generating means for generating a test signal by turning on and off a switch to which a DC voltage is applied to one end, and applying the test signal to the base of the semiconductor three-terminal element to cause the light emitting diode to emit light in a quasi-lit state. and are provided to control the driving semiconductor three-terminal element so that the light emitting diode can display a re-emission state of a lighting state and a semi-lighting state.
本発明は、発生する障害表示に発光ダイオードを用いた
表示試験回路に関する。The present invention relates to a display test circuit that uses light emitting diodes to indicate a fault that has occurred.
データの伝送路の監視を行う監視システムでは、親局、
および子局設備の運用状況や障害状況の把握を常に行っ
ており、そのために発光ダイオードを障害表示用として
広く用いている。この場合発光ダイオードの試験中であ
っても、障害があったときにLEDに表示させて障害を
検出し、システムの高信頼化を図ることが必要である。In a monitoring system that monitors data transmission paths, a master station,
The operation status and failure status of slave station equipment are constantly monitored, and for this purpose, light emitting diodes are widely used to indicate failures. In this case, even during a test of the light emitting diode, it is necessary to detect a fault by displaying it on the LED in order to improve the reliability of the system.
第4図は従来例の回路を示す図である0図中、41は発
光ダイオード(以下LEDと称す)である。FIG. 4 is a diagram showing a conventional circuit. In FIG. 4, 41 is a light emitting diode (hereinafter referred to as LED).
また42はLED駆動回路であり、障害信号の入カバソ
ファ用ゲートG4いLED駆動用のトランジスタTr、
、及び該駆動トランジスタTr、、のベース接続の抵抗
R4□とトランジスタTr、、のコレクタ接続の抵抗R
43よりなっている。ここでのR4zは、トランジスタ
Tr41を駆動するに足りるベース電流が流れるように
十分に小さい抵抗に選び、また抵抗R42はトランジス
タTra+のコレクタに電流が流れたときLED41を
点燈状態にする値に選ぶ。42 is an LED drive circuit, which includes a failure signal input cover sofa gate G4 and a transistor Tr for driving the LED;
, and a resistor R4□ connected to the base of the drive transistor Tr, , and a resistor R connected to the collector of the transistor Tr, .
It consists of 43. Here, R4z is selected to be a sufficiently small resistance so that a base current sufficient to drive the transistor Tr41 flows, and the resistor R42 is selected to a value that turns on the LED 41 when current flows to the collector of the transistor Tra+. .
なお43は試験信号発生回路であり、S41はLED試
験用のスイッチ、R41はLED41の光度調整用の抵
抗、D41は複数のLEDを並列接続したときの逆電流
防止保護用のダイオードである。ここでの抵抗R41は
、試験時のLED41の光度と障害時にLED41が点
燈したときの光度との間に明らかな光度差が認められる
ように選んでおく。Note that 43 is a test signal generation circuit, S41 is a switch for LED testing, R41 is a resistor for adjusting the brightness of LED 41, and D41 is a diode for protection against reverse current when a plurality of LEDs are connected in parallel. The resistor R41 is selected so that there is a clear difference in luminous intensity between the luminous intensity of the LED 41 during the test and the luminous intensity when the LED 41 is turned on at the time of a failure.
試験信号発生回路43は、一端をアースしたスソチS4
1と抵抗R41とダイオードD41のカソードを直列接
続し、また該ダイオード041のアノードにはLED4
1のカソードを接続し、更にLED41のアノードには
正極性の直流電圧(+V)が供給する回路とする。そし
て試験信号発生回路43の出力端(D41のアノードと
LED41のカソードの接続点)において並列に抵抗R
4,を介してトランジスタTr、のコレクタを接続し、
また該トランジスタ’rra+のエミッタをアースに接
続し、さらに該トランジスタTr4.のベースには入力
バッファ用ゲート041と抵抗R4tを介し障害信号が
入力するLED駆動回路42を接続する。なお並列接続
の複数の発光ダイオードを試験する時は、LED41の
試験用のスイッチS41を共用の回路とし、かつ抵抗R
41とダイオードD41およびLED駆動回路42を別
に設け、スイッチSa+の出力端に並列接続した回路構
成にする。The test signal generation circuit 43 is a Susochi S4 with one end grounded.
1, the resistor R41, and the cathode of the diode D41 are connected in series, and the anode of the diode D41 is connected to the LED4.
The cathode of the LED 41 is connected to the cathode of the LED 41, and a positive DC voltage (+V) is supplied to the anode of the LED 41. Then, a resistor R is connected in parallel at the output end of the test signal generation circuit 43 (the connection point between the anode of D41 and the cathode of LED 41).
Connect the collector of the transistor Tr through 4,
Further, the emitter of the transistor 'rra+ is connected to ground, and the transistor Tr4. An LED drive circuit 42 to which a fault signal is input is connected to the base of the LED drive circuit 42 via an input buffer gate 041 and a resistor R4t. Note that when testing multiple light emitting diodes connected in parallel, the test switch S41 of the LED41 is used as a common circuit, and the resistor R
41, a diode D41, and an LED drive circuit 42 are separately provided and connected in parallel to the output terminal of the switch Sa+.
このように接続した回路において、LED試験用スイッ
チ341を閉じると、抵抗R1いダイオードOatを通
ってL E D41にLED試験電流の電流I 41が
流れてLED41を発光させて準点燈状態にする。つぎ
に障害信号が人力して入カバソファ用ゲートG41をオ
ンにしてトランジスタTr41にベース電流を流し、従
って該トランジスタTr41はオンとなりコレクタ電流
t4gを流すようにLED41を発光させてLED41
に141+14gの電流を流す、このときIa+と■4
□の間には、141<14!の関係を保たせるように抵
抗R41を調整する。In the circuit connected in this way, when the LED test switch 341 is closed, the LED test current I41 flows through the diode Oat with the resistor R1 to the LED41, causing the LED41 to emit light and become semi-lit. . Next, the fault signal is input manually to turn on the input cover sofa gate G41 and cause the base current to flow through the transistor Tr41.Therefore, the transistor Tr41 is turned on and causes the LED41 to emit light so that the collector current t4g flows.
A current of 141+14g is applied to , at this time Ia+ and ■4
Between □, 141<14! The resistor R41 is adjusted so as to maintain the following relationship.
このようにLED41の電流を設定することにより、L
ED41の試験時には電流141にてL E D41を
点燈させて“準点燈状態゛を作る。さらに障害信号が加
重される形で印加されるとLED41には141+I4
!の両電流の和の電流が流れるが、両電流には141<
[4□の関係があるためL E 041の試験時の光度
に比較して十分に明るい光度をもって点燈し、゛点燈状
態°を作る。By setting the current of the LED 41 in this way, L
When testing the ED41, the LED41 is turned on with a current of 141 to create a "semi-lit state."Furthermore, when a fault signal is applied in a weighted manner, the LED41 has a current of 141+I4.
! A current equal to the sum of both currents flows, but both currents have 141<
[Because of the relationship 4□, the light is turned on with a sufficiently brighter luminous intensity than the luminous intensity at the time of the test of L E 041, creating a "lighting state".
即ち、L E D41を駆動するLED駆動回路42の
出力端に並列に試験信号発生回路43を設けた回路構成
をとり、LED41の障害発生時の°点燈光度。That is, a circuit configuration is adopted in which a test signal generation circuit 43 is provided in parallel with the output end of an LED drive circuit 42 that drives the LED 41, and the lighting intensity is determined when a failure occurs in the LED 41.
と試験中の°準点燈光度゛との間に明らかな光度差が生
ずるようにLED41の点燈電流を設定する。The lighting current of the LED 41 is set so that a clear difference in luminous intensity occurs between the actual lighting intensity and the standard lighting intensity during the test.
従って上記の回路をもちいて発光ダイオードの試験を行
う場合は、発光ダイオード駆動回路の試験を行っていな
いという問題を生じていた。Therefore, when testing a light emitting diode using the above circuit, a problem arises in that the light emitting diode drive circuit is not tested.
本発明は、発光ダイオードの試験を行うときに、発光ダ
イオードと発光ダイオード駆動回路の試験を同時に行う
ことのできるようにした発光ダイオード試験回路を提供
することを目的とする。SUMMARY OF THE INVENTION An object of the present invention is to provide a light emitting diode test circuit that can simultaneously test a light emitting diode and a light emitting diode drive circuit when testing a light emitting diode.
本発明では第1図に示すように、発光ダイオード1と該
発光ダイオード1を点燈させる駆動用半導体3端子素子
2を直列接続し、前記直列接続された回路の一端を直流
電圧にかつ他の一端をアースにそれぞれ接続した回路に
おいて、障害が発生した時、該障害に対応した信号を前
記駆動用半導体3端子素子2のベースに加えて前記発光
ダイオード1を点燈状態として発光させる障害信号出力
手段3と、一端に直流電圧を加えたスイッチ5をオンオ
フして試験信号を発生し、該試験信号を前記半導体3端
子素子2のベースに加えて前記発光ダイオード1を準点
燈状態として発光させる試験信号発生手段4と、を設け
て前記駆動用半導体3端子素子2を制御し、前記発光ダ
イオードlが点燈状態と準点燈状態の両発光状態の表示
が出来るように構成する。In the present invention, as shown in FIG. 1, a light-emitting diode 1 and a driving semiconductor three-terminal element 2 for lighting the light-emitting diode 1 are connected in series, one end of the series-connected circuit is connected to a DC voltage, and the other end is connected to a DC voltage. When a fault occurs in a circuit whose one end is connected to ground, a signal corresponding to the fault is added to the base of the driving semiconductor three-terminal element 2, and a fault signal is output to turn on the light emitting diode 1 and emit light. A test signal is generated by turning on and off a means 3 and a switch 5 to which a DC voltage is applied to one end, and the test signal is applied to the base of the semiconductor three-terminal element 2 to cause the light emitting diode 1 to emit light in a quasi-on state. A test signal generating means 4 is provided to control the driving semiconductor three-terminal element 2, so that the light emitting diode 1 can display both a light-emitting state and a semi-lighting state.
本発明では第1図に示すよう如く、障害が発生の時には
障害信号出力手段3からの障害信号を駆動用半導体3端
子素子2のベースに加えて制御し、また発光ダイオード
1の試験をする時にはスイッチ5をオンオフして試験信
号を試験信号出力手段4から発生し、該試験信号を前記
駆動用半導体3端子素子2のベースに加えて制御するよ
うにする。In the present invention, as shown in FIG. 1, when a fault occurs, the fault signal from the fault signal output means 3 is added to the base of the driving semiconductor three-terminal element 2 for control, and when testing the light emitting diode 1, A test signal is generated from the test signal output means 4 by turning on and off the switch 5, and the test signal is applied to the base of the driving semiconductor three-terminal element 2 for control.
従って、前記駆動用半導体3端子素子2の制御により、
前記発光ダイオード1を点燈状態と準点燈状態の両発光
状態の表示が可能となる。Therefore, by controlling the driving semiconductor three-terminal element 2,
The light emitting diode 1 can be displayed in both light-emitting states, such as a lit state and a semi-lit state.
第2図は本発明の一実施例の回路を示す図である。図中
、21は発光ダイオード(以下LEDと称する)である
。また22は駆動用半導体3端子素子及び障害信号出力
手段としてのLED駆動回路であり、例えば半導体3端
子素子であるトランジスタTr、、、該トランジスタT
r、、のベース駆動の抵抗R2い トランジスタTr、
、のコレクタ接続の抵抗R2□、障害信号の入カバソフ
ァ用ゲート9□及び逆電流防止用のダイオードD!Iよ
りなっている。ここでの抵抗R1Iおよび抵抗R0は、
第4図の従来例と同様に、抵抗R11については障害信
号が入力した時においてトランジスタ’rrx+を駆動
するに足りるベース電流が流れるように十分に小さい抵
抗に選び、また抵抗R0についてはトランジスタT’r
t+のコレクタに流れる電流がLED21の発光を点燈
状態となるように選ぶ。FIG. 2 is a diagram showing a circuit according to an embodiment of the present invention. In the figure, 21 is a light emitting diode (hereinafter referred to as LED). Reference numeral 22 designates a driving semiconductor three-terminal element and an LED driving circuit as a fault signal output means, such as transistors Tr, which are semiconductor three-terminal elements.
The base driving resistance R2 of the transistor Tr,
, the resistor R2□ connected to the collector of , the gate 9□ for the interference signal input cover sofa, and the diode D! for preventing reverse current. It consists of I. Here, the resistance R1I and the resistance R0 are
Similar to the conventional example shown in FIG. 4, the resistor R11 is selected to be sufficiently small so that a base current sufficient to drive the transistor 'rrx+ flows when a fault signal is input, and the resistor R0 is selected to be a sufficiently small resistance so that a base current sufficient to drive the transistor 'rrx+ flows when a fault signal is input. r
The current flowing through the collector of t+ is selected so that the LED 21 emits light.
また23は、スイッチS2いダイオードD0、抵抗R1
3よりなる試験信号発生回路であり、SZ+はLED試
験用のスイッチ、R13はLED21の光度調整用の抵
抗、D、は複数のLEDの並列試験を行えるようにした
逆電流防止保護用のダイオードである。ここでの抵抗R
0は第4図と同様に、LED21の試験時における光度
と障害信号が入力してLED21が完全な点燈となった
ときの光度に明らかな光度差が認められるような値に選
んでお(。23 is a switch S2, a diode D0, and a resistor R1.
The test signal generation circuit consists of 3, where SZ+ is a switch for LED testing, R13 is a resistor for adjusting the brightness of LED21, and D is a diode for reverse current prevention protection that allows parallel testing of multiple LEDs. be. The resistance R here
Similarly to Fig. 4, 0 is selected at a value such that there is a clear difference in luminous intensity between the luminous intensity during the test of the LED 21 and the luminous intensity when the fault signal is input and the LED 21 is completely lit ( .
そして試験信号発生回路23は、一端を直流電圧に接続
したスイッチSKIとダイオードD0のカソードと抵抗
R0を直列接続した構成とし、かつ抵抗R0の出力端を
LED駆動回路22に接続している。The test signal generation circuit 23 has a configuration in which a switch SKI whose one end is connected to a DC voltage, a cathode of a diode D0, and a resistor R0 are connected in series, and the output end of the resistor R0 is connected to the LED drive circuit 22.
なおLED駆動回路22の一端には、アノードに+E極
性の直流電圧(+V)を印加したLED21のカソード
が接続されている。そして該LED21のカソードは、
抵抗R1zを介しトランジスタT’r!+のコレクタに
接続し、また該トランジスタTr、。Note that one end of the LED drive circuit 22 is connected to the cathode of the LED 21 to which a +E polarity DC voltage (+V) is applied to the anode. And the cathode of the LED 21 is
Transistor T'r! via resistor R1z. +, and also connected to the collector of the transistor Tr.
のエミッタをアースに接続し、更に該トランジスタTr
□のベースには障害信号の入カバソファ用ゲートGz□
ダイオードD!I及び抵抗Rt、を介し障害信号が入力
する回路構成にしている。なおダイオードDzlと抵抗
R1Iの接続点には前記試験信号発生回路23の出力が
接続されてい゛る。なお並列接続の複数のLED21を
試験する時は、試験用のスイッチS!lを共用の回路と
し、抵抗R0とダイオードD!!およびLED駆動回路
22を別に設けてスイッチsg+の出力端に並列接続し
た構成にする。The emitter of the transistor Tr is connected to ground, and the emitter of the transistor Tr is connected to ground.
The base of □ has a gate Gz□ for the cover sofa that receives the fault signal.
Diode D! The circuit configuration is such that a fault signal is input via I and resistor Rt. Note that the output of the test signal generation circuit 23 is connected to the connection point between the diode Dzl and the resistor R1I. When testing multiple LEDs 21 connected in parallel, use the test switch S! l as a shared circuit, resistor R0 and diode D! ! The LED drive circuit 22 is separately provided and connected in parallel to the output terminal of the switch sg+.
このように接続した回路において、LED試験用スイッ
チSZ+を閉じると、直流電圧V!はダイオードD!!
、抵抗R0を通ってLED駆動回路22にLED試験信
号を出力してRllを駆動してトランジスタTr、、に
LED21の“準点燈状態°に対応するLED試験電流
の電流■g+を流してLED21を発光させる。つぎに
障害信号が入力して、入力バッファ用ゲートG□、ダイ
オードDo11抵抗R2,を経由してトランジスタTr
、、にベース電流を流し、かつLED試験用スイッチS
Z+が開かれていると、トランジスタTr、、はオンと
なリコレクタ電流121を流すようにしてLED21を
発光させLED21に電流■ztを流す。そしてこのr
z+とIt□の間において、tz+<i2□の関係が得
られるようにRzz/ Rt+の比を十分に大きな値(
例えば約30〜200倍)に設定する事により、LED
21の試験時には電流■z+にてLED21は点燈させ
て。In the circuit connected in this way, when the LED test switch SZ+ is closed, the DC voltage V! is diode D! !
, outputs the LED test signal to the LED drive circuit 22 through the resistor R0, drives Rll, and causes the current g+ of the LED test current corresponding to the "quasi-on state" of the LED 21 to flow through the transistor Tr, . Then, a fault signal is input, and the transistor Tr passes through the input buffer gate G□, the diode Do11, and the resistor R2.
, , and the LED test switch S
When Z+ is open, the transistors Tr,, are turned on, causing a collector current 121 to flow, causing the LED 21 to emit light, and causing a current zt to flow through the LED 21. And this r
Between z+ and It□, the ratio of Rzz/Rt+ is set to a sufficiently large value (
For example, by setting it to about 30 to 200 times), the LED
When testing No. 21, LED 21 was turned on with a current of ■z+.
準点燈状態゛を作る。更に障害信号が加重される形で印
加されるとLEDJIにはI□+Iztの両電流の和の
電流が流れるが、両電流にはIt+<121の関係があ
るためLED21の試験時の光度に比較して十分に明る
い光度をもつ゛点燈状態゛をつくる。Create a semi-lit state. Furthermore, when a fault signal is applied in a weighted manner, a current equal to the sum of the two currents I□+Izt flows through LEDJI, but since there is a relationship between both currents It+<121, the luminous intensity is compared to the luminous intensity at the time of the test of LED21. to create a ``lit state'' with sufficient brightness.
即ち、LED21を駆動するトランジスタTr、。That is, a transistor Tr that drives the LED 21.
のベースに並列に、試験信号発生回路23からのLED
試験信号と入力バッファ用ゲートGffiいダイオード
I)z+を通った障害信号とがそれぞれ加えられ、両信
号によりトランジスタT’rz+のコレクタに流れる電
流に大小関係を作り、LED2iの障害発生時での゛点
燈光度゛と試験中の゛準点燈光度゛との間に光度差が生
ずるようにLED21の点燈電流の設定している。In parallel to the base of the LED from the test signal generation circuit 23
The test signal and the fault signal that passed through the input buffer gate Gffi diode I)z+ are added, and both signals create a magnitude relationship in the current flowing to the collector of the transistor T'rz+, and when a fault occurs in LED2i, The lighting current of the LED 21 is set so that a difference in luminous intensity is generated between the lighting intensity and the standard lighting intensity during the test.
第3図は、本発明による他の実施例を示す図である0図
中、31はランプであり、また32はランプ駆動回路で
あり、LED駆動用のダーリントン接続のトランジスタ
Tr3.とT’r3x、Trotのベース駆動の抵抗R
1いTr、、のコレクタ接続の抵抗R3□及び障害信号
の入カバソファ用ゲー)Gzい逆電流防止用のダイオー
ドD□よりなっており、ダーリントン接続のトランジス
タTr、1とTrs、tの回路以外は前記第2図のLE
D駆動回路22と同様の動作をする。また試験信号発生
回路33は、スイッチS31、ダイオードD。、抵抗R
3!よりなり、前記第2図の試験信号発生回路23と同
様の動作をする。なおこの回路は前記したダーリントン
接続のトランジスタTr、、とTr3.を用いて、ラン
プ31の大電流駆動の可能にしているものである。FIG. 3 is a diagram showing another embodiment of the present invention. In FIG. 3, 31 is a lamp, 32 is a lamp drive circuit, and Darlington-connected transistors Tr3. and T'r3x, the resistance R of the base drive of Trot
It consists of a resistor R3□ connected to the collector of Tr1, , and a diode D□ for preventing reverse current, which covers the input of fault signals. is LE in Figure 2 above.
It operates in the same way as the D drive circuit 22. Further, the test signal generation circuit 33 includes a switch S31 and a diode D. , resistance R
3! The test signal generation circuit 23 operates in the same manner as the test signal generation circuit 23 shown in FIG. Note that this circuit includes the Darlington-connected transistors Tr, . . . , and Tr3. This makes it possible to drive the lamp 31 with a large current.
以上説明したように本発明によれば、発光ダイオードの
試験を行うときに、発光ダイオードと発光ダイオード駆
動回路の主要回路の試験を同時にできる。As described above, according to the present invention, when testing a light emitting diode, the main circuits of the light emitting diode and the light emitting diode drive circuit can be tested simultaneously.
従ってデータ転送監視表示システムの信頼性の向上に貢
献することが可能となる。Therefore, it is possible to contribute to improving the reliability of the data transfer monitoring and display system.
第1図は本発明の原理構成を示す図、
第2図は本発明の一実施例の回路を示す図、第3図は本
発明の他の実施例の回路を示す図、第4図は従来例の回
路を示す図、
を示す。
図において、
1は発光ダイオード、
2は駆動用半導体3端子素子、
3は障害信号出力手段、
4は試験信号発生手段、
である。
滞恥g11の原理a庚9求tat
f41図
不完θ、jfs−プ錘例4回路を木f■第2図
第
図
第
図Fig. 1 is a diagram showing the principle configuration of the present invention, Fig. 2 is a diagram showing a circuit of one embodiment of the invention, Fig. 3 is a diagram showing a circuit of another embodiment of the invention, and Fig. 4 is a diagram showing a circuit of another embodiment of the invention. The figure which shows the circuit of a conventional example, is shown. In the figure, 1 is a light emitting diode, 2 is a driving semiconductor three-terminal element, 3 is a fault signal output means, and 4 is a test signal generation means. The principle of shame g11 a 9 tat f41 diagram incomplete θ, jfs-p weight example 4 circuits tree f ■ Figure 2 Figure Figure
Claims (1)
させる駆動用半導体3端子素子(2)を直列接続し、前
記直列接続された回路の一端を直流電圧にかつ他の一端
をアースにそれぞれ接続した回路において、 障害が発生した時、該障害に対応した信号を前記駆動用
半導体3端子素子(2)のベースに加え、前記発光ダイ
オード(1)を点燈状態として発光させる障害信号出力
手段(3)と、 一端に直流電圧を加えたスイッチ(5)をオンオフして
試験信号を発生し、該試験信号を前記半導体3端子素子
(2)のベースに加えて前記発光ダイオード(1)を準
点燈状態として発光させる試験信号発生手段(4)と、 を設けて前記駆動用半導体3端子素子(2)を制御し、
前記発光ダイオード(1)が点燈状態と準点燈状態の両
発光状態の表示が出来るようにした事を特徴とした発光
ダイオードの光度可変試験回路。[Claims] A light-emitting diode (1) and a driving semiconductor three-terminal element (2) for lighting the light-emitting diode (1) are connected in series, one end of the series-connected circuit is set to a DC voltage, and the other end is connected to a DC voltage. When a fault occurs in a circuit whose one end is connected to ground, a signal corresponding to the fault is applied to the base of the driving semiconductor three-terminal element (2), and the light emitting diode (1) is turned on. A test signal is generated by turning on and off a fault signal output means (3) that emits light and a switch (5) to which a DC voltage is applied to one end, and the test signal is applied to the base of the semiconductor three-terminal element (2). a test signal generating means (4) for causing the light emitting diode (1) to emit light in a quasi-on state, and controlling the driving semiconductor three-terminal element (2);
A light intensity variable test circuit for a light emitting diode, characterized in that the light emitting diode (1) is capable of displaying both light emitting states of a lit state and a quasi-lit state.
Priority Applications (1)
Application Number | Priority Date | Filing Date | Title |
---|---|---|---|
JP1102134A JPH02278884A (en) | 1989-04-20 | 1989-04-20 | Luminous intensity variable testing circuit for light emitting diode |
Applications Claiming Priority (1)
Application Number | Priority Date | Filing Date | Title |
---|---|---|---|
JP1102134A JPH02278884A (en) | 1989-04-20 | 1989-04-20 | Luminous intensity variable testing circuit for light emitting diode |
Publications (1)
Publication Number | Publication Date |
---|---|
JPH02278884A true JPH02278884A (en) | 1990-11-15 |
Family
ID=14319297
Family Applications (1)
Application Number | Title | Priority Date | Filing Date |
---|---|---|---|
JP1102134A Pending JPH02278884A (en) | 1989-04-20 | 1989-04-20 | Luminous intensity variable testing circuit for light emitting diode |
Country Status (1)
Country | Link |
---|---|
JP (1) | JPH02278884A (en) |
Cited By (1)
Publication number | Priority date | Publication date | Assignee | Title |
---|---|---|---|---|
JPH05121784A (en) * | 1991-10-29 | 1993-05-18 | Fujitsu Ltd | Display provided with lamp test function |
-
1989
- 1989-04-20 JP JP1102134A patent/JPH02278884A/en active Pending
Cited By (1)
Publication number | Priority date | Publication date | Assignee | Title |
---|---|---|---|---|
JPH05121784A (en) * | 1991-10-29 | 1993-05-18 | Fujitsu Ltd | Display provided with lamp test function |
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