JPH0227728U - - Google Patents

Info

Publication number
JPH0227728U
JPH0227728U JP10687988U JP10687988U JPH0227728U JP H0227728 U JPH0227728 U JP H0227728U JP 10687988 U JP10687988 U JP 10687988U JP 10687988 U JP10687988 U JP 10687988U JP H0227728 U JPH0227728 U JP H0227728U
Authority
JP
Japan
Prior art keywords
pellet
solder
lead frame
semiconductor device
roughened
Prior art date
Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
Pending
Application number
JP10687988U
Other languages
English (en)
Japanese (ja)
Priority date (The priority date is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the date listed.)
Filing date
Publication date
Application filed filed Critical
Priority to JP10687988U priority Critical patent/JPH0227728U/ja
Publication of JPH0227728U publication Critical patent/JPH0227728U/ja
Pending legal-status Critical Current

Links

Classifications

    • HELECTRICITY
    • H01ELECTRIC ELEMENTS
    • H01LSEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L24/00Arrangements for connecting or disconnecting semiconductor or solid-state bodies; Methods or apparatus related thereto
    • H01L24/01Means for bonding being attached to, or being formed on, the surface to be connected, e.g. chip-to-package, die-attach, "first-level" interconnects; Manufacturing methods related thereto
    • H01L24/26Layer connectors, e.g. plate connectors, solder or adhesive layers; Manufacturing methods related thereto
    • H01L24/31Structure, shape, material or disposition of the layer connectors after the connecting process
    • H01L24/32Structure, shape, material or disposition of the layer connectors after the connecting process of an individual layer connector
    • HELECTRICITY
    • H01ELECTRIC ELEMENTS
    • H01LSEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L2924/00Indexing scheme for arrangements or methods for connecting or disconnecting semiconductor or solid-state bodies as covered by H01L24/00
    • H01L2924/10Details of semiconductor or other solid state devices to be connected
    • H01L2924/1015Shape
    • H01L2924/10155Shape being other than a cuboid
    • H01L2924/10158Shape being other than a cuboid at the passive surface

Landscapes

  • Engineering & Computer Science (AREA)
  • Computer Hardware Design (AREA)
  • Microelectronics & Electronic Packaging (AREA)
  • Power Engineering (AREA)
  • Die Bonding (AREA)
JP10687988U 1988-08-11 1988-08-11 Pending JPH0227728U (US07923587-20110412-C00001.png)

Priority Applications (1)

Application Number Priority Date Filing Date Title
JP10687988U JPH0227728U (US07923587-20110412-C00001.png) 1988-08-11 1988-08-11

Applications Claiming Priority (1)

Application Number Priority Date Filing Date Title
JP10687988U JPH0227728U (US07923587-20110412-C00001.png) 1988-08-11 1988-08-11

Publications (1)

Publication Number Publication Date
JPH0227728U true JPH0227728U (US07923587-20110412-C00001.png) 1990-02-22

Family

ID=31340787

Family Applications (1)

Application Number Title Priority Date Filing Date
JP10687988U Pending JPH0227728U (US07923587-20110412-C00001.png) 1988-08-11 1988-08-11

Country Status (1)

Country Link
JP (1) JPH0227728U (US07923587-20110412-C00001.png)

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