JPH0227660Y2 - - Google Patents

Description

DETAILED DESCRIPTION OF THE INVENTION The present invention relates to a tape running malfunction prevention circuit in a video tape recorder.

When a video tape recorder moves the tape at a low speed for slow playback, it produces unsightly noise bars on the playback screen. This noise bar occurs when the video head scans across recording tracks of the same azimuth. Therefore, a method has been proposed in which the tape is moved intermittently while slow playback is performed so that the video head does not scan recording tracks of the same azimuth. FIG. 1 is a circuit block diagram showing this conventional example. First, when a slow playback setting output B is issued to perform slow playback, the first AND gate _A1 is opened and the frequency dividing circuit 1 divides the video head rotation detection output A. Note that the frequency division value is appropriately switched according to the slow ratio. The frequency-divided output E is delayed by the first monomulti 2 and then derived by the second monomulti 3 as an activation signal F having a predetermined pulse width. This drive signal F
sets the first flip-flop 4 at its rising edge. On the other hand, the playback control signal generated by the running of the tape is transmitted to the first flip-flop 4.
The output _of
It is derived from the monomulti 6 as a braking signal G with a predetermined pulse width. This braking signal G resets the first flip-flop 4 in the set state at its rising edge. This flip-flop output is derived as a drive signal. Normally, the capstan motor M controls its rotational state by inputting the sum of the output of the AFC circuit 8 and each output of the APC circuit 10 to the motor drive circuit 11. In playback mode,
APC output is cut off using analog switch 12. Further, the AFC output is output only when the drive signal H and the brake signal G are generated, and the amplifier circuit 9 for amplifying the AFC output receives the activation signal F and the brake signal G and generates a saturated output. Furthermore, the motor drive circuit 11 is equipped with a reverse rotation input, and a start signal G is provided.
is input. Therefore, the capstan motor M suddenly starts up in response to the start signal F, and then receives the AFC output in response to the drive signal H and rotates at a constant speed.
When the tape moves a predetermined amount, it is suddenly driven in reverse and stops rotating immediately. If the above-mentioned operation is performed in synchronization with the frequency-divided output E, noise-free slow playback can be performed at a predetermined slow ratio.

Also, when still playback setting output C is issued,
The fifth monomulti 13 is triggered and enters a metastable state. During this metastable period, slow playback is performed, so the tape speed decreases, and as soon as the metastable period ends, the slow playback shifts to still playback mode.

In the conventional example described above, since the capstan motor is activated by frequency-divided output and braked by a reproduction control signal, braking is not performed when slow reproduction or still reproduction mode is set in an unrecorded portion. That is, when the slow reproduction mode is set, the capstan motor M continues to be accelerated every time the activation signal is input, and the tape continues to be transported at high speed when the still reproduction mode is set. In view of the above points, the present invention has been developed to prevent the tape from running out of control by not emitting a start signal unless the control signal is played back, and by cutting off the drive signal after a certain period of time after still playback is set. This paper attempts to propose a malfunction prevention circuit.

Hereinafter, the present invention will be explained according to an embodiment shown in FIG. In this embodiment, the conventional circuit described above is modified and an additional circuit is added. The difference is that the first AND gate _A1 is configured so that the still playback setting output is inputted, and the drive signal is generated during the still playback setting period. Additionally, there are two types of additional circuits: a circuit for controlling the fifth AND gate _A5 that takes out the start signal F, and a circuit for resetting the first flip-flop 4 and running the tape after a predetermined period of time has elapsed after setting the still playback. There is a circuit that stops the Regarding the former, an output is input which prevents the subsequent generation of the activation signal F when the reproduction control signal D is not obtained, that is, when the braking signal G is not generated. Therefore, the first inverter _N1 and the differentiating circuit 20 which receive the activation signal F set the second flip-flop 21 at the falling edge of the activation signal. The reset input for the second flip-flop 21 is generated from the third flip-flop 22. This third flip-flop 22 inputs the braking signal G to the reset input terminal via the second inverter _N2 , uses the reproduction control signal D (more precisely, the second AND gate output) as a clock input, and inputs the brake signal G to the reset input terminal via the second inverter N2. Since the drive signal H is used as data input, it is reset at the falling edge of the brake signal G, and the playback control signal D
It rises in synchronization with. This rise causes the second flip-flop 21 to be reset. Therefore, by inputting the inverted output of the second flip-flop 21, the fifth AND gate _A5 inputs the inverted output of the second flip-flop 21, so that when the control signal D is generated again as a driving signal after the starting signal H falls and the braking signal G falls. It's like opening a gate. On the other hand, the output of the fourth OR gate _O4 is input as another braking input to the fifth AND gate _A5 , and the slow playback setting output, the fifth monomulti output, and the output of the fourth flip-flop 23 are used as OR inputs, respectively. . Note that the fourth flip-flop 23 outputs the divided output E during the generation period of the fifth monomultiple output.
is used as the set input, and the differential output is used as the reset input. Therefore, the fourth OR gate _Q4 is at a high level during the slow playback period and during the period including the fifth mono multi-output generation period and the subsequent activation signal F generation period during still playback. Therefore, as long as the playback control signal is correctly derived, when slow playback is set, the activation signal F will continue to be generated during the set period, and when still playback is set, the activation signal F will continue to be generated during the fifth mono multi-output generation period and the one ( The activation signal continues to be generated during continuous periods including the first (first) activation signal generation period.

On the other hand, the reset input to the first flip-flop 4 that is generated after a predetermined period of time has passed after the still playback setting is
It is input via the fifth OR gate _Q5 . This input originates from the fifth flip-flop 24. This fifth flip-flop 24 uses the still playback setting output C as a data input, and the fourth AND gate
_A4 output is used as clock input. This fourth AND gate _A4 inputs the inverted output of the fourth OR gate _O4 , and becomes high level only when the first activation signal is deactivated after the fifth mono multi-output deactivation, and the second activation signal becomes high level. The signal is the clock input of the fifth flip-flop 24. Therefore, the first flip-flop 4 is reset in synchronization with the rise of the second activation signal. Therefore, during still playback, the drive signal H is deactivated at least until the second derived activation signal is generated among the activation signals that are generated subsequently after the fifth monomulti output is deactivated.

Therefore, in this embodiment, when the tape is transferred intermittently,
If the reproduction control signal is lost at point _P1 shown in FIG. 4, the braking signal G at point _P2 is not generated, and the inverted output of the second flip-flop 21 remains at a low level, so that the signal at point _P3 is lost. Activation signal F' is not generated. Therefore, the drive signal H becomes high level at the starting signal F immediately before the _P1 point, and if there is a reproduction control signal D immediately after the _P3 point, it finally becomes low level at the braking signal G related to that control signal. Therefore, in the above-mentioned high level section, the normal playback mode is set and the tape is never accelerated.

Furthermore, if still reproduction is to be performed at a position where no control signal is reproduced, the following will occur.
That is, when the fifth mono multi-output J reaches a stable state, the fourth OR gate output K becomes low level including the immediately following activation signal, cuts off the second and subsequent activation signals, and then the playback control signal becomes _P4. If the brake signal G is generated at point _P5 , and the drive signal H is also deactivated, however, as shown in the figure, if the reproduction control signal at point _P6 is missing, the second brake signal G is generated at point P5.
The fifth flip-flop output L rises in response to the fifth activation signal F, and this output deactivates the drive signal H, so that the capstan motor stops naturally without running out of control. Therefore, even if you set still playback in an unrecorded area, the tape will stop.

Therefore, according to the present invention, even if slow playback is performed in a no-signal section, the tape will not be accelerated.
Since the tape stops even during still playback, stable tape running is possible, which is highly effective.

[Brief explanation of the drawing]

FIG. 1 is a conventional circuit block diagram, FIG. 2 is an explanatory diagram of waveforms of the same essential part, FIG. 3 is a circuit block diagram of an embodiment of the present invention, and FIG. 4 is an explanatory diagram of waveforms of the essential part. Explanation of main drawing numbers, 1... Frequency divider circuit, 4... 1st
Flip flop, A ₅ ...5th AND gate,
13...Fifth monomulti, 21...Second flip-flop, 22...Third flip-flop, F,
F′...starting signal, G...braking signal, H...drive signal, M...capstan motor.

Claims (1)

[Claims for Utility Model Registration] A circuit that generates an activation signal that is generated in synchronization with an output obtained by frequency-dividing the rotation detection output of a video head and disappears after a predetermined period of time, and a brake with a predetermined pulse width that is synchronized with a playback control signal. a circuit that generates a signal; a circuit that generates a drive signal that is activated in synchronization with the generation of the start signal and deactivated in synchronization with the generation of the braking signal; and a circuit that generates an AFC output that controls the rotational speed of the capstan. At the same time, when the slow playback mode is set and the still playback mode is set, an AFC output is generated during the generation period of the drive signal and the braking signal.
an AFC circuit; an amplifier circuit that amplifies the AFC output and brings the amplification gain to a saturation level during the generation period of the start signal and the braking signal; an amplifier circuit that inputs the amplified output to derive a drive output; a motor drive circuit that inverts and derives the polarity of the drive output when a signal is input;
Capstan motors to which the drive output is input are arranged, and when a still playback mode is set, intermittent slow playback is performed for a certain period of time, and tape running is stopped in synchronization with the braking signal immediately after the certain period of time has elapsed. The intermittent tape transfer circuit of the video tape recorder includes a gate circuit that prevents the activation signal from passing when the playback control signal is missing, and a gate circuit that deactivates the drive signal after the predetermined period when setting the still playback mode. A tape running malfunction prevention circuit consisting of a circuit and a circuit.