JPH0226261U - - Google Patents
Info
- Publication number
- JPH0226261U JPH0226261U JP10386188U JP10386188U JPH0226261U JP H0226261 U JPH0226261 U JP H0226261U JP 10386188 U JP10386188 U JP 10386188U JP 10386188 U JP10386188 U JP 10386188U JP H0226261 U JPH0226261 U JP H0226261U
- Authority
- JP
- Japan
- Prior art keywords
- lead frame
- integrated circuit
- semiconductor device
- thickness
- utility
- Prior art date
- Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
- Pending
Links
- 239000004065 semiconductor Substances 0.000 claims description 4
- 239000002184 metal Substances 0.000 description 2
- 239000012212 insulator Substances 0.000 description 1
- 239000011347 resin Substances 0.000 description 1
- 229920005989 resin Polymers 0.000 description 1
Classifications
-
- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L2224/00—Indexing scheme for arrangements for connecting or disconnecting semiconductor or solid-state bodies and methods related thereto as covered by H01L24/00
- H01L2224/01—Means for bonding being attached to, or being formed on, the surface to be connected, e.g. chip-to-package, die-attach, "first-level" interconnects; Manufacturing methods related thereto
- H01L2224/42—Wire connectors; Manufacturing methods related thereto
- H01L2224/47—Structure, shape, material or disposition of the wire connectors after the connecting process
- H01L2224/48—Structure, shape, material or disposition of the wire connectors after the connecting process of an individual wire connector
- H01L2224/481—Disposition
- H01L2224/48151—Connecting between a semiconductor or solid-state body and an item not being a semiconductor or solid-state body, e.g. chip-to-substrate, chip-to-passive
- H01L2224/48221—Connecting between a semiconductor or solid-state body and an item not being a semiconductor or solid-state body, e.g. chip-to-substrate, chip-to-passive the body and the item being stacked
- H01L2224/48245—Connecting between a semiconductor or solid-state body and an item not being a semiconductor or solid-state body, e.g. chip-to-substrate, chip-to-passive the body and the item being stacked the item being metallic
- H01L2224/48247—Connecting between a semiconductor or solid-state body and an item not being a semiconductor or solid-state body, e.g. chip-to-substrate, chip-to-passive the body and the item being stacked the item being metallic connecting the wire to a bond pad of the item
Landscapes
- Wire Bonding (AREA)
- Lead Frames For Integrated Circuits (AREA)
Priority Applications (1)
Application Number | Priority Date | Filing Date | Title |
---|---|---|---|
JP10386188U JPH0226261U (US20100154141A1-20100624-C00001.png) | 1988-08-05 | 1988-08-05 |
Applications Claiming Priority (1)
Application Number | Priority Date | Filing Date | Title |
---|---|---|---|
JP10386188U JPH0226261U (US20100154141A1-20100624-C00001.png) | 1988-08-05 | 1988-08-05 |
Publications (1)
Publication Number | Publication Date |
---|---|
JPH0226261U true JPH0226261U (US20100154141A1-20100624-C00001.png) | 1990-02-21 |
Family
ID=31335066
Family Applications (1)
Application Number | Title | Priority Date | Filing Date |
---|---|---|---|
JP10386188U Pending JPH0226261U (US20100154141A1-20100624-C00001.png) | 1988-08-05 | 1988-08-05 |
Country Status (1)
Country | Link |
---|---|
JP (1) | JPH0226261U (US20100154141A1-20100624-C00001.png) |
Cited By (2)
Publication number | Priority date | Publication date | Assignee | Title |
---|---|---|---|---|
JPH0817988A (ja) * | 1994-06-28 | 1996-01-19 | Hitachi Ltd | 樹脂封止型半導体装置及びその製造方法 |
JP2010045265A (ja) * | 2008-08-15 | 2010-02-25 | Techwin Opto-Electronics Co Ltd | Ledリードフレームの製造方法 |
-
1988
- 1988-08-05 JP JP10386188U patent/JPH0226261U/ja active Pending
Cited By (3)
Publication number | Priority date | Publication date | Assignee | Title |
---|---|---|---|---|
JPH0817988A (ja) * | 1994-06-28 | 1996-01-19 | Hitachi Ltd | 樹脂封止型半導体装置及びその製造方法 |
JP2010045265A (ja) * | 2008-08-15 | 2010-02-25 | Techwin Opto-Electronics Co Ltd | Ledリードフレームの製造方法 |
JP4531830B2 (ja) * | 2008-08-15 | 2010-08-25 | 特新光電科技股▲分▼有限公司 | Ledリードフレームの製造方法 |