JPH0225204B2 - - Google Patents

Description

DETAILED DESCRIPTION OF THE INVENTION The present invention relates to a debug support device, and more particularly to a debug support device in a processing system having a central controller, a main memory, an input/output controller, and an input/output device.

FIG. 1 is a diagram showing an example of the configuration of a conventional processing system of this kind. In FIG. 1, a central control unit 1 executes desired information processing by executing each command constituting a program stored in a main memory 2 one word at a time. During so-called debugging work to verify the normality of such a program, especially a system program that controls the operation of the processing system, the tester performs various executions such as executing the program to be verified for several words to several tens of words. In order to specify conditions, various commands are input from the typewriter device 6 provided in the processing system via the typewriter control device 5, and from the central control device 1 via the typewriter control device 5, the typewriter The processing status is determined while observing various messages output to the device 6. The tester also monitors the operating status of the internal registers and flip-flops (hereinafter collectively referred to as internal registers) that make up the central controller 1 using the console panel 3 installed near the central controller 1. Execute debugging work while setting the required data in internal registers. FIG. 2 is a diagram showing an example of the configuration of signal lines 3-1 and 1-3 that connect the central control device 1 and the console panel 3, and FIG. It is a figure which shows the example of a structure of the signal lines 6-5 and 5-6 connected. In FIG. 2, the signal line 3-1 transmits the operation of the electric keys provided on the console panel 3 to the central control device 1, and the signal line 1-3 transmits the internal state of the central control device 1 to the console panel 3. be displayed on the lamps installed in the For example, the internal register selection signal R-SEL is connected to the signal line 3-1, and the data to be set S-
By sending DATA and data setting instruction signal STR, desired data can be set in desired internal registers. In addition, the selection signal R-
By sending SEL and the display instruction signal DPL to the signal line 3-1, the data R-DATA set in the desired internal registers is sent back from the signal line 1-3 and displayed on the lamps on the console panel 3. be done. Furthermore, in order to stop the operation of the central control unit 1 when a specific instruction is executed and monitor the operating state, the storage address S-DATA and the address stop signal ASTP in the main memory 2 of the specific instruction are used.
is sent to the signal line. Furthermore, the start signal STA and the stop signal STP control the start and stop of the central controller 1, and the operating state of the central controller 1 is indicated by the operation display signal RUN. Next, in FIG. 3, the signal line 6-5 is connected to the interrupt request signal REQ by the electric key operation of the typewriter device 6, and the input character I--
The CRC and the synchronization signal RSB are transmitted to the typewriter control device 5, and the signal line 5-6 transmits the output character O-CRC and the synchronization signal WSB from the typewriter control device 5 to the typewriter device 6 for printing out. .

As is clear from the above explanation, in a conventional processing system, the tester has to go back and forth between the typewriter device 6 and the console panel 3 many times when debugging a program, which reduces work efficiency. It is easy to panic and make mistakes.

SUMMARY OF THE INVENTION An object of the present invention is to provide a processing system with a means for eliminating the drawbacks of debugging operations performed by conventional processing systems as described above and improving the efficiency of program debugging operations.

This purpose is to provide a processing system that includes a central control device and an input/output device that exchanges information with the central control device via an input/output control device. and is directly connected to the central control device, analyzes identification information input from the input/output device, and when the identification information indicates transfer of information via the input/output control device, Subsequently, the information input from the input/output device is transferred to the central control device via the input/output control device, and if the identification information indicates direct transfer of information, the information input from the input/output device is then transferred to the central control device. This is achieved by providing means for directly transmitting information to the central control unit.

An embodiment of the present invention will be described below with reference to FIGS. 4 and 5. FIG. 4 is a diagram showing an example of the configuration of a processing system equipped with a debug support device according to an embodiment of the present invention, and FIG. 5 is a diagram showing a configuration of a debug support device according to an embodiment of the present invention. be. Note that the same reference numerals indicate the same objects throughout the figures. The difference between FIG. 4 and FIG. 1 is that the console panel 3 (FIG. 1) is not provided, and instead, the typewriter device 6 is connected not only to the typewriter control device 5 but also to the center via the debug support device 13. The point is that it is also connected to the control device 1. In FIG. 4, the debug support device 13 and the central control device 1
The signal lines 3-1' and 1-3' connecting the central control unit 1 and the console panel 3 have the same configuration as the signal lines 3-1 and 1-3 connecting the central control unit 1 and the console panel 3 in FIG. In FIG. It has the same configuration as the signal lines 6-5 and 5-6 that connect the control device 5 and the typewriter device 6.
Next, in FIG. 5, the output character O-CRC and synchronization signal WSB transmitted from the typewriter control device 5 to the debug support device 13 via the signal line 5-6' are transmitted to the typewriter control device interface section 131. , is transmitted to the typewriter device 6 via the typewriter control unit 132 and the signal line 5-6'', and is printed out.Meanwhile, an interrupt request signal is transmitted from the typewriter device 6 via the signal line 6-5''.
Following REQ, the identification character ¥ for input to the typewriter control device 5 is input as a keystroke character I-CRC along with the synchronization signal RSB to the debug support device 13.
, the typewriter control section 132 sends the identification character \ to the character identification section 133. When the character identification unit 133 receives the identification character ¥, the character identification unit 133 converts the keystroke character I-CRC transmitted via the signal line 6-5'' from now on.
typewriter control unit 132, typewriter control device interface unit 131 and signal line 6-
5' to the typewriter control device 5. On the other hand, from the typewriter device 6 to the signal line 6-
5'', following the interrupt request signal REQ, the identification character $ to be input to the central control unit 1 is transmitted to the debug support device 13 as a keystroke character along with the synchronization signal RSB, the typewriter control unit 132
sends the identification character $ to the character identification section 133. When the character identification unit 133 receives the identification character $, the character identification unit 133 identifies the keystroke character I-, which is subsequently transmitted via the signal line 6-5''.
The CRC is transmitted to the console controller 134 via the typewriter controller 132. The console control unit 134 accumulates and analyzes the received string of keystroke characters I-CRC, converts it into the same signal configuration as that transmitted from the console board 3 to the central control unit 1 in FIG. ' to the central control unit 1. For example, when a keystroke character I-CRC sequence of STR R2, 4B57/ is transmitted from the typewriter device 6 following the identification character $, the console control unit 134 analyzes the first three characters STR and outputs the data setting instruction signal STR. Set the selection signal R-SEL, which analyzes the following two characters R2 and specifies register R2, to the signal line 3-1',
The following four characters 4B57 should be set in register R2.
The data is set as hexadecimal data S-DATA on the signal line 3-1' and then transmitted to the central control unit 1. Similarly, when the typewriter device 6 transmits the identification character $ followed by the keystroke character I-CRC string DPL R7/, the console control unit 134 analyzes the first three characters DPL and the following two characters R7, The display instruction signal DPL and the selection signal R-SEL specifying the register R7 are set on the signal line 3-1' and transmitted to the central control unit 1. On the other hand, the display instruction signal
Selection signal R specifying DPL and register R7
- When the central control unit 1 that has received SEL transmits the data R-DATA set in the register R7 to the debug support device 13 via the signal line 1-3', the console control unit 134 displays the data in binary. The data R-DATA is converted into output characters O-CRC in hexadecimal and transmitted to the typewriter device 6 via the typewriter control unit 132 and signal lines 5-6'' along with the synchronization signal WSB, and printed. The text is output.Furthermore, the typewriter device 6 outputs the identification character $, followed by the keystroke character I-, DPL MM, 1000, 10/.
When the CRC string is transmitted, the console control unit 13
4 is the first three characters DPL as the display instruction signal DPL,
The following two characters MM are used as the selection signal R-SEL that specifies the main memory 2, and the following four characters 1000 are used as the data S- that specifies the read address of the main memory 2.
Data R- is converted to DATA and transmitted to the central controller 1 via the signal line 3-1', and the central controller 1 reads it from address 1000 of the main memory 1.
When DATA is returned via the signal line 1-3', the console control unit 134 converts 1001, which is obtained by adding 1 to the four characters 1000, into data S-DATA specifying the read address of the main storage device 2, and instructs the display. Signal DPL and main memory 2 selection signal R-SEL
At the same time, data R-DATA is transmitted to the central control unit 1 via the signal line 3-1', and data R-DATA read from the address 1001 of the main memory 1 is received. Thereafter, in the same manner, the console control unit 134 adds 1 to the read address, causes the central control unit 1 to read data from the main memory 2, and starts the keystroke character I-CRC sequence received from the typewriter device 6. After repeating the number of times specified by the two characters 10, the operation will stop.

As is clear from the above description, according to this embodiment, the tester can debug a program by operating only the typewriter device 6. In particular, the data R-DATA stored in 10 consecutive addresses starting from arbitrary address 1000 in the main memory device 2 can be input by simply inputting a set of keystroke characters I-CRC string $DPL MM, 1000, 10 from the typewriter device 6. , can be sequentially printed out by the typewriter device 6.

Note that FIGS. 4 and 5 are only one embodiment of the present invention, and for example, the signal lines 3-1', 1-
3', 6-5', 5-6', 6-5'' and 5-6''
The configuration is not limited to that shown in the drawings, and many other modifications may be considered, but the effects of the present invention will not change in any case. Further, the input/output device for inputting input characters and outputting output characters is not limited to the typewriter device 6, and many other modifications may be considered, such as a display device that uses an electric keyboard and a printing device. However, in either case, the effects of the present invention remain the same. Furthermore, it goes without saying that the configuration of the processing system to which the present invention is applied is not limited to that shown in the drawings.

As described above, according to the present invention, it is possible to debug a program by the processing system using only an input/output device such as a typewriter device,
Furthermore, it becomes possible to execute a series of complex operations using a single set of commands, which improves operability and improves the efficiency of debugging work.

[Brief explanation of drawings]

Fig. 1 is a diagram showing the configuration of a conventional processing system, Fig. 2 is a diagram showing an example of the configuration of signal lines connecting the central control unit and the console panel, and Fig. 3 is a diagram showing the configuration of a typewriter control device and a typewriter device. FIG. 4 is a diagram showing an example of the configuration of a processing system equipped with a debug support device according to an embodiment of the present invention, and FIG. 1 is a diagram showing the configuration of a debug support device. In the figure, 1 is a central control unit, 2 is a main storage device, 3 is a console panel, 4 is a data channel device, 5 is a typewriter control device, 6 is a typewriter device, 7 is a magnetic tape control device, and 8 is a magnetic tape 9 is a disk pack control device, 10 is a disk pack device, 11 is a line printer control device, 12 is a line printer device, 13 is a debug support device, 131 is a typewriter control device interface section, 132 is a typewriter control device Part 1
32, 133 are character identification parts, 134 are console control parts, 3-1, 1-3, 3-1', 1-3', 6
-5, 5-6, 6-5', 5-6', 6-5'' and 5-6'' are signal lines, REQ is interrupt request signal, RSB
and WSB is the synchronization signal, I-CRC is the keystroke character,
O-CRC is output character, R-SEL is selection signal, S
-DATA and R-DATA is data, STR is data setting instruction signal, DPL is display instruction signal,
ASTP is an address stop signal, STA is a start signal, STP is a stop signal, and RUN is an operation display signal.

Claims (1)

[Claims] 1. In a processing system having a central control device and an input/output device that exchanges information with the central control device via an input/output control device, a device inserted between the input/output control device and the input/output device and is connected directly to the central control device, and analyzes identification information input from the input/output device, and if the identification information indicates transfer of information via the input/output control device, then the If information input from an input/output device is transferred to the central control device via the input/output control device, and the identification information indicates direct transfer of information, information subsequently input from the input/output device A debug support device characterized by comprising means for directly transmitting the information to the central control device.