JPH02250474A - Solid-state image pickup element - Google Patents

Abstract

PURPOSE:To realize an ideal two-dimensional spatial filter with a simple manufacture process and a small number of elements without any increase in area by forming a network of distribution constant circuits of distributed impedance that the resistive film or resistive semiconductor layer of the solid-state image pickup element. CONSTITUTION:The network of 1st impedance 202 (shown by R) constituting an image smoothing filter is realized by using the distribution constant impedance that the plane resistance material such as a transparent electrode, protection film, or semiconductor layer on the solid-state image pickup element has. Consequently, the film on the solid-state image pickup element can be used as it is and the number of element does not increase owing to the formation of the image smoothing filter. The network can be realized nearly without altering the manufacture process and the impedance is formed in an optional continuous direction, so the ideal two-dimensional spatial filter can be formed.

Description

DETAILED DESCRIPTION OF THE INVENTION [Field of Industrial Application] The present invention relates to a solid-state image sensor, and particularly to a solid-state image sensor in which a part of an image processing function is integrated on a chip.

More specifically, the present invention relates to the structure of a solid-state image sensor that outputs a signal obtained by applying a spatial filter to an image signal. This also relates to elements in a field called artificial retina in neural networks.

[Prior Art] Conventionally, experiments on integrating a photodiode array that functions as an image sensor and a preprocessing function for image processing on a chip are described in Neural, Networks, Vol. 1 (1).
988), pages 91 to 97 (Neural Ne
works, Vol, 1 (1988) pp91-9
7). This structure is called an artificial retina. This method focuses on the fact that the retina of a living creature's eye (in this case, a cat's eye) has its own image smoothing filter and can output a signal subjected to second-order differentiation. In the retina of the eye, beneath the network of photoreceptor cells is a network of horizontal cells and associated nerve fibers. This was electrically simulated using a circuit network consisting of resistors (specifically, MOS and transistors) and a differential amplifier circuit. As a result, a second-order differential I'', that is, a spatial second-order differential signal of the image signal was obtained.

Figure 3 shows a conceptual diagram of an artificial retina, photodiode 2
The array 01 receives light, and correspondingly, a circuit network 205 of resistors (first impedance) 202 is formed. Here, the resistor 202 is a resistor between the source and drain of a MOS transistor, and each node 206 of one circuit network 205, which is a variable resistor, is connected to each photodiode 2.
There is a one-to-one correspondence with 01. In the prior art described above, each node 206 and the output terminal 207 of each photodiode are connected by a resistor (second impedance) 1O3. resistance 2
03 is extracted by a differential amplifier 204 with high input impedance. In this structure, a resistor network 205 forms an image smoothing filter, and the potential at each node 206 has a rounded outline. give a signal. Moreover, the function of this structure is that the output of the differential amplifier 204
A second-order differential signal, that is, a spatial second-order differential signal of the image signal can be obtained. The reason is that the potential of the output 207 of the photodiode provides an image signal, that is, a signal of the original image. A second-order differential signal is obtained by taking the difference between this and the signal with the rounded contour (potential of node 206). (The reason is from a known example (for example, Fig.

7)).

[Problem to be solved by the invention]

The first problem with the above conventional technology is that the image smoothing filter requires a large number of elements. First, a resistor 202 (specifically, a MOS transistor) is used as an image smoothing filter.
Since a network structure in 6 directions is used, 3 pixels per pixel are used.
MOS transistors are required. Furthermore, means for controlling the gate voltage and gate wiring are required. Second, there is a problem that the characteristics of the image smoothing filter are not ideal.Originally, the ideal image smoothing filter is a two-dimensional filter that is isotropic in all directions.

However, in the prior art described above, the effect of the spatial filter is limited to discrete directions where the resistance pattern exists. Thirdly,
In order to read out the second-order differential signal, an amplifier 204 with a high input impedance is required.

There is a problem that the number of elements is large. As a result, when the image smoothing filter and the second-order differential function are combined, one pixel requires a dozen or more circuit elements to several dozen circuit elements.

Fourth, there is a problem in that it is not easy to obtain a signal with edge enhancement for one image. Another problem is that it is not possible to simultaneously obtain an image signal and a spatially filtered signal.

It can be inferred that the contour-enhanced signal can be obtained by adjusting the second-order differential signal to an appropriate size and adding it to the image signal. However, if this is done using normal circuit technology,
It is necessary to add several dozen or more circuit elements to each pixel, which is difficult to realize in practice. - The right image signal appears at the potential of the output terminal 207 of the photodiode, and the signal subjected to the image smoothing filter appears at the potential of the node 206, but in order to output it, a high impedance amplifier is further connected to 206 and 207. There is a need to. When equipped with these, the number of elements per pixel is several tens to 100.
The diameter is much larger than that of a normal MO8 type solid-state image sensor, which has two elements per pixel.

As detailed above, the above-mentioned conventional technology is a practical technology for realizing a solid-state image sensor that has a function of outputting a signal subjected to edge enhancement and a function of outputting an image signal and a signal subjected to a spatial filter. It's hard to say.

Therefore, a first object of the present invention is to realize an ideal two-dimensional spatial filter using a simple manufacturing process and a small number of elements without increasing the area.

A second object is to realize a solid-state image pickup device having on a chip a means for outputting a signal subjected to contour enhancement, or a means for outputting an image signal and a signal subjected to a spatial filter. Specifically, by achieving this with a small number of elements (4 elements per pixel) and a simple manufacturing process, the aim is to realize a solid-state image sensor that can simultaneously implement these image processing functions on-chip.

[Means to solve the problem]

The above objective is, firstly, to use distributed constant impedance of a planar resistive material such as a transparent electrode, a protective film, or a semiconductor layer on a solid-state image sensor to create a circuit network with a first impedance that constitutes an image smoothing filter. This is achieved by realizing the following.

Second, in addition to the image signal pixel for outputting the original image, a signal pixel that has been subjected to an image smoothing filter is provided, and the output signals of both pixels are sequentially extracted and the difference between the two signals is used to create a secondary image. This is accomplished by generating a differential signal.

[Effect]

First, if the image smoothing filter is constructed using the distributed constant impedance of the planar resistive material on the solid-state image sensor, the film quality on the solid-state image sensor can be used as is, and the number of elements increases as the image smoothing filter is formed. Also, for the same reason, it can be realized with almost no changes to the manufacturing process, simplifying the process. Furthermore, since impedance is formed in any continuous direction, an ideal two-dimensional spatial filter can be formed.

Second, a pixel for one image signal and a pixel for a signal subjected to a one-image smoothing filter are provided adjacent to each other, and these two pixels are made into a pair and treated as a pixel pair. Address sequentially in registers. As a result, both the image signal and the signal subjected to the image smoothing filter can be obtained simultaneously. Furthermore, if one differential amplifier is provided in the output section, a difference signal between both signals, that is, a second-order differential signal can be output. If the second-order differential signal is amplified or attenuated by an amplifier and added to the image signal, a signal with contour enhancement can be obtained. At this time, if the gain of the amplifier is changed to a value of 0 or more, the degree of contour enhancement can be arbitrarily varied. Signal is easily obtained.

Here, these signals are set to 3 depending on the shift register settings.
It can be obtained synchronously or at the same time. It goes without saying that the timing can be changed as appropriate depending on the purpose.

The various circuits for image processing described above require several dozen elements or more, but only one circuit is required in the output section.

Normally, solid-state image sensors are often integrated with a scale of 10,000 to several hundred thousand elements. Therefore, the circuit scale of the above-mentioned output section can be almost ignored when calculated by assigning the number of elements per 1m elements. Further, as shown below, in the present invention, the number of elements required for the image smoothing filter is substantially zero. Therefore, the above-mentioned image processing function can be realized with the number of elements equivalent to about two pixels, that is, about four elements per pixel.

The present invention will be explained in detail below with reference to Examples.

〔Example〕

FIG. 1 is an overall structural diagram of a first embodiment of the present invention.

Two elements, a photodiode 201 and a MOS switch 101, constitute one pixel. Create a matrix by arranging each pixel vertically and horizontally. The horizontal shift register 102 and the vertical shift register 103 sequentially perform addressing to turn on and off the MOS switch 101 at a desired location. The signal is obtained by the amount of analog charge generated at the photodiode output terminal 207. While this element is receiving light, the MOS switch 101 is off, and a charge corresponding to the photovoltaic force of the reverse biased photodiode gradually accumulates at the photodiode output terminal (accumulation mode). The basic operation is to turn on the MOS switch 101 at a cycle of every frame and sequentially take out the accumulated charges (read mode) of 0 or more.

A resistor 202, designated R, is a first impedance.

In reality, it is a surface impedance constructed from a resistive polysilicon film on the image sensor, and is an ideal two-dimensional impedance. Here, for convenience of illustration, it is shown in the form of a lumped constant resistor. (Details will be described later in the cross-sectional view of FIG. 2.) Therefore, in reality, there is no pattern required for the resistor 202 and the wiring connecting it, but each node 206 of the lattice made of R.

Each node of the first impedance. 20 each node
6 is actually a connection point made by providing a through hole at a position above each pixel of the polysilicon thin film. In this embodiment, it coincides with the output terminal 207 of the photodiode. When this element is receiving light in the accumulation mode, the charge is transferred to the resistance R
, a certain amount of charge flows from the output terminal with a large amount of charge to the output terminal with a small amount of charge. As a result, when the output of each pixel is read out, an output with a rounded outline is obtained. That is, an output passed through an image smoothing filter is obtained. At this time, what is the degree of signal distortion, that is, the strength of the filter?

It is determined by the rate at which charges move between pixels during light reception.

This ratio is determined by the capacitance value of the photodiode, the value of the resistor R, the readout cycle, and the like.

The value of the resistance R, that is, the sheet resistance value of the resistive film is determined to be an optimum value as described later by taking these into consideration.

FIG. 2 is a cross-sectional structural diagram of the first embodiment of the present invention. p
A pn junction type photodiode 201 is formed by providing an nz layer on a shaped substrate 221. Adjacent to this, an nz layer and a polysilicon gate 223 are provided, and the MOS switch 10
form 1. An insulating film made of SiOs 222 is provided thereon. A resistive polysilicon 225 film is formed thereon.

225 is a resistor R (first impedance) 202. The polysilicon 225 and the end of the photodiode 201 (output terminal 207) are connected.

This contact/reading point serves as a node 206 of the circuit network and an output terminal 207 of the photodiode.

Next, the resistance R1, that is, the optimum sheet resistance value of the resistive film, especially its upper limit value, will be described.

FIG. 8 shows an equivalent circuit of two pixels and a resistor R connecting them in the first embodiment of the present invention. '## Considering the product mode, the MOS switch 101 is omitted. Let us now consider a case where the photodiode 201 is represented by a current source Ip using a photocurrent and a parasitic capacitance C, and light hits the pixel 1 on the left, but does not hit the pixel 2 on the right at all. At this time, the current source of pixel 1 is Ip, the current value of pixel 2 is O, and charge is accumulated over time in pixel 1 due to current IP. The charge after time t has passed after the start of accumulation is Q (t
)given that.

Q (t) LTIp*t
...(1) The charge Q(τ) after one frame period τ (readout period) is Q(τ) IP-τ ...(2) Here, the range at time t or Here, the photocurrent Ip is assumed to be approximately constant. During this time, a current IR flows through the resistor R, and the total charge ΔQ moves to the right. In order to indicate the upper limit value of the resistance R, consider the condition in which ΔQ is sufficiently smaller than Q.

ΔQ = ε fist Q (τ) = i fist P * τ - (3) where ε is the amount ΔQ/Q (τ) indicating the rate of charge movement and is 1
It represents the degree of image smoothing, here C(1). Under this condition, R is determined.

ΔQ=f IRdt...
(4) IR=v17R=Q (t)/ (to Umbrella R) 畔 (Ip)/(C) (5) (4)
), (5・), ΔQ=CIpshinτ”)/ (2-fist CAR)...(6)
From (3) and (6), R=τ/ (2*ε-C)...(7)
According to (7), a resistance value R corresponding to the frame period τ and the photodiode capacitance C1 and the degree of image smoothing ξ is obtained.1Normally, the frame period is on the order of approximately 1150 seconds. Also, the capacitance value C of one pixel of a solid-state image sensor of about 500 x 500 pixels is approximately 1Of! ' is the order of '. Now, if the degree of smoothing of one image ε is 1%, then from (7),
When operating a single-image smoothing filter that obtains R=10'' (Ω), the degree of image smoothing ε is usually several tens of percent, and is considered to be at least 1%.For this reason, the above-mentioned Under the conditions of the element structure, the sheet resistance of the resistive film forming the image smoothing filter is at most 1014
(Ω/mouth). Of course, it goes without saying that this varies to some extent depending on the capacitance value, but on the other hand, the sheet resistance value due to leakage resistance of the insulating transparent surface protective film of a normal solid-state image sensor is usually 10" (Ω/hole). It is an order.

This is about one order of magnitude larger than the above upper limit, and therefore it is considered that even in a normal solid-state image sensor, image smoothing of about 0.1% is performed.

As mentioned above, the resistive film quality in the present invention does not include the leak resistance of the insulating film, but can be considered to mean a film with a sheet resistance value that is approximately one order of magnitude smaller than this. When the resistor is formed of polysilicon, the above-mentioned sheet resistance value is higher than that of a polysilicon resistor normally used in LSI. Therefore, it is convenient from this point of view to reduce the thickness of polysilicon for the following reasons.

Next, we will discuss the thickness of the resistive film, especially its upper limit.

Figure 9 shows the effects of absorption and reflection of light by the multilayer film on the surface, which are calculated values from a simulation of the wavelength characteristics of the optical tt flow in the first embodiment of the present invention. A (this example) is a characteristic of a three-layer film, which is a realistic structure, in which a 50 nm polysilicon film is sandwiched between thin sio films.

For comparison, 680 nm single MS as B (normal structure)
iO, when the film is used as a protective film, and C (theoretical value)
Comparing the photocurrents of A (this example) and B (normal structure) in the visible wavelength range of 0.4 to 0.65 μm, which represents an ideal case where there is no absorption or reflection by the surface film. A indicates a value that is approximately 172 or more of B. If the practical lower limit of sensitivity is about 172, the lower limit of polysilicon film thickness in the visible region is approximately 50 nm.
It can be considered to be of the order of degree.

Next, we will discuss transmittance in the infrared region. In Figure 9, the photocurrent decreases slightly in the red region with a wavelength of about 0.65 μm, but this is due to the Sio, -polysilicon-5io
The polysilicon layer, which is largely affected by reflection and interference by the three-layer film , does not absorb light in the infrared region and is essentially transparent. Therefore, in the case of a solid-state imaging device in the infrared region, the thickness of polysilicon may be a thickness that is easy to manufacture considering other conditions.

Thicknesses on the order of 1 μm can also be used.

According to this embodiment, it is possible to realize a solid-state imaging device with a very cylindrical structure and a built-in spatial filter.

FIG. 4 is an overall structural diagram of the second embodiment of the present invention, showing the node 206 of the 0 circuit network and the output terminal 20 of the photodiode.
MOS switch 4 as the second impedance between 7
03 is inserted.

The gate of the MOS switch 403 is sequentially turned on and off by the vertical shift register 103 via a control line 411.

With this structure, the following two functions can be realized. 1st
As a function, the 111 image signal and the signal subjected to the image smoothing filter can be arbitrarily selected or outputted in sequence. As a second function, the strength of the image smoothing filter can be made variable.

The first function can be realized as follows. If all MOS switches 403 are turned off, no charge movement occurs, so the original image is output as is.

On the other hand, if all 403 are turned on, a filter can be applied as in the first embodiment. These are used depending on the desired output format. For example, turn off the MOS switch 403 for the first frame, turn on the MOS switch 403 for the second frame,
Repeat this alternately.

As a result, it is possible to realize an image sensor that can alternately output a negative image signal and a filtered signal one frame at a time. By storing the output of this element for one frame and comparing it with the output of the first frame, calculations such as differentiation and contour enhancement can be easily executed. Here, MOS switch 40
The details of the control in step 3 are as follows. 403 on (
As the readout line moves downward one line at a time, the control line 411 is used to turn it on (or off) one line at a time.
As a result, the filtered charge (or the original image) is accumulated in the photodiode after one line is read out and before the next readout.

The second function, the change in the strength of the image smoothing filter, is
This can be obtained by turning on the MOS switch 403 for only part of the time in the accumulation mode. During the accumulation mode of each pixel, control 1!411 is used to turn on the MOS switch 403 for a certain number of lines for a certain period of time. Only while the switch 403 is on, charges are averaged in the upper F and left and right sides within the plurality of lines. That is, image smoothing is performed. As the readout line sequentially moves downward, the plurality of lines mentioned above also move downward one line at a time.
This allows the amount of charge movement, that is, the strength of the filter, to be freely varied by changing the on-time.

A second method of varying the strength of the filter is to change the voltage applied to the gate of the MOS switch 403.

Thereby, the source-drain conductance of the MOS switch 403 can be changed, and the amount of charge movement can be adjusted. The strength of the MOS switch 403 can be freely varied by adjusting either the on time or the gate voltage, or by combining both.

According to this embodiment, it is possible to realize a solid-state imaging device that can arbitrarily output an image signal and a signal subjected to an image smoothing filter whose intensity is freely variable.

FIG. 5 is an overall structural diagram of the third embodiment of the present invention, showing each node 206 of the six circuit networks and the output terminal 2 of the photodiode.
Resistance (second impedance) between 07 and 2
03 to connect each.

FIG. 6 is a cross-sectional structural diagram of a third embodiment of the present invention. A resistor (second impedance) 203 is made by patterning resistor polysilicon 226 different from resistor 225. However, since the formation of the resistor polysilicon is generally included in the manufacturing process of a solid-state image sensor, no addition to the process is necessary. When the value of the resistor 203 is desired to be large, the resistor 203 is formed, for example, as a long pattern in the direction perpendicular to the plane of the paper to form a resistor pattern.

Alternatively, the resistance value can be changed by changing the amount of impurity atoms implanted into polysilicon.

This embodiment also makes it possible to realize a spatial filter similar to that of the first embodiment.

FIG. 7 is a cross-sectional structural diagram of the fourth embodiment of the present invention, showing each node 206 of the circuit network and the output terminal 2 of the photodiode.
A solid-state imaging device similar to that of the second embodiment can be realized by this embodiment in which a second impedance formed by connecting a resistor 203 and a MOS switch 403 in series is connected between 0 and 07. Furthermore, by changing the value of the resistor 203, the strength of the image smoothing filter can be changed.

FIG. 10 is an overall structural diagram of the fifth embodiment of the present invention. One pixel is made up of two elements: a photodiode 201 and a MOS switch 101. Two 0 pixels are lined up to form one pixel pair. -The part between A' and 0 indicates the pixel pair.
One VS element (on the left side in the figure) in the pixel pair is an image signal pixel and has the same configuration as a pixel of a normal solid-state image sensor.

The other pixel (on the right side in the figure) is a signal pixel subjected to an image smoothing filter. The resistor 202 constitutes a circuit network of an image smoothing filter. Only the right pixel connects the output terminal 207 of the photodiode and the node 206 of the circuit network. These pixel pairs are considered as one set, and the pixel pairs are arranged vertically and horizontally in a matrix.

The horizontal shift registers 102 and 112 and the vertical shift register 103 sequentially perform addressing to turn on and off the MOS switch 101 at a desired location. Of the horizontal shift registers, 102 addresses pixels for image signals;
Reference numeral 112 is for addressing a signal pixel subjected to an image smoothing filter.0 When both are sequentially addressed in parallel, signals synchronized with each other can be obtained. The image signal obtained by the horizontal shift register 102 is output using an amplifier 104 and guided to an original image output terminal. The signal obtained by the horizontal shift register 112 and subjected to the one-image smoothing filter is outputted using the amplifier 104 and guided to the image smoothing filter output terminal. The differential amplifier 106 obtains a second-order differential signal, which is the difference between both outputs, and leads this to the differential output terminal.

When the second-order differential signal is amplified or attenuated by the amplifier 104 and added to the image signal, a signal with contour enhancement is obtained. By adjusting the gain of the amplifier 104 to an appropriate value of 0 or more using the gain control terminal 105 for contour enhancement, which leads this signal to the edge enhancement output, the degree of edge enhancement can be freely adjusted.

Next, the method of arranging the pixel pairs will be described.

When arranging pixel pairs, the left and right directions of the pixel pairs are reversed between one row and the next row. In other words, all pixels adjacently surrounding the image signal pixel are signal pixels subjected to a spatial filter.

The same is true vice versa. With this arrangement, pixels having the same function are uniformly arranged. This also has the effect of making the resistance 202 for the image smoothing filter uniform between each pixel.

FIG. 11 is a cross-sectional structural diagram of a fifth embodiment of the present invention.

This is a cross-sectional view taken along line AA' in FIG. The basic structure is the first
This is similar to the embodiment (FIG. 2).

In this embodiment, the left side is an image signal pixel, and the right side is a signal pixel subjected to a spatial filter. Due to the 0 line structure connecting the polysilicon 225 and the end of the photodiode 201 (output terminal 207) on the right pixel, the left pixel receives an image signal (0M image).

The right pixel can output a signal subjected to an image smoothing filter.

As described above, according to this embodiment, image smoothing, quadratic differential 1 edge enhancement, etc. can be realized with a very simple structure. This has the great effect that the above-mentioned image processing function can be integrated on a chip with the number of elements equivalent to about two pixels per pixel, that is, about four elements.

FIG. 12 is an overall structural diagram of a sixth embodiment of the present invention.

Here, when arranging the pixel pairs, the left and right directions of the pixels are the same in each row. In this arrangement, the leftmost column only has pixels for outputting image signals, so all outputs need to be connected to the first horizontal shift register 102, and all the columns to the right need only be connected to the second shift register 112, so Only one output wiring runs in the vertical direction in the figure for each column, which has the effect of halving the number of output wirings in comparison to the two in the fifth embodiment.

Note that in this arrangement, the intervals between pixels having the same purpose are different in the vertical and horizontal directions, but this can be used on the premise that the horizontal and vertical pitches are different. This structure can be used depending on the purpose in consideration of the above effects.

FIG. 13 is an overall structural diagram of a seventh embodiment of the present invention.

In the spatially filtered signal pixel, a second
A MOS switch 503 is inserted as an impedance. The gate of the MOS switch 503 is sequentially turned on and off by the vertical shift register 103 via a control line 511.

With this structure, the following two functions can be realized. 1st
Turns on spatial filtering on the spatially filtered signal output as a function.

Can be turned off. This makes it possible, for example, to check the pairability of two pixels in each pixel pair. As a second function, the strength of the image smoothing filter can be made variable using a method similar to that described in the second embodiment.

The first function can be realized as follows. If all MOS switches 503 are turned off, no charge movement occurs, so one image signal is output as is. On the other hand, if all 503 are turned on, a spatial filter can be applied as in the first embodiment. These are used depending on the desired output format.

FIG. 14 is an overall structural diagram of an eighth embodiment of the present invention.

In the signal pixel subjected to the spatial filter, each node 206 of the circuit network and the output terminal 207 of the photodiode are connected by a resistor (second impedance) 603. Spatial filters can be used.

FIG. 15 is an overall structural diagram of a ninth embodiment of the present invention.

In the spatially filtered signal pixel, a series connection of a MOS switch 503 and a resistor 603 is used as the second impedance. According to this embodiment, a spatial filter similar to that of the fourth embodiment can be used. .

FIG. 16 is an overall structural diagram of a tenth embodiment of the present invention. This is an example of a method for driving a readout line in the horizontal direction. In the overall structure of the seventh embodiment (FIG. 13), the timing adjustment circuit 801 is provided between the control line 511 and the vertical shift register.
The on/off timing of the OS switch 503 is determined by the MO
It can be easily adjusted to have a certain relationship with the S switch 101. Note that this structure is a MOS switch 403
．． 503, such as the structure of the embodiment 2.4.9 (FIG. 4.7.15).

FIG. 17 is an overall structural diagram of an eleventh embodiment of the present invention. This is an embodiment of a vertical readout line driving method, in which the vertical readout lines of a 0 image signal pixel and a spatially filtered signal pixel are both driven by a horizontal shift register 102. This structure requires only one horizontal shift register, and this structure is unique in that it relates to the drive circuit, and can be applied to any pixel structure regardless of the pixel structure.

FIG. 18 is an overall structural diagram of a twelfth embodiment of the present invention. This is an example of a method for driving a readout line in the vertical direction. In the structure of the eleventh embodiment (FIG. 17), a timing adjustment circuit 801 is provided. This makes it possible to easily adjust the relationship between the vertical readout timings of the image signal pixels and the spatially filtered signal pixels. Note that this structure is also unique in that it relates to the drive circuit, and it goes without saying that it can be applied to any pixel structure.

〔Effect of the invention〕

According to the present invention, an ideal two-dimensional image smoothing filter using distributed constant impedance can be realized. Also, the strength of the filter can be changed freely. In addition, there is no need to add a special process to form the filter.
This has an effect that can be achieved with a very simple one-piece manufacturing process and a small number of elements.

Furthermore, since the first impedance is formed overlapping the pixel, there is an effect that the chip area does not increase.

Next, the image signal, the signal subjected to the image smoothing filter, 2
This has the effect of making it possible to realize a solid-state imaging device that outputs all or any combination of the second-order differential signal and the edge-enhanced signal. Specifically, by realizing this with a small number of elements, about 4 elements per pixel, and a simple manufacturing process, it is possible to realize a solid-state image sensor that can simultaneously incorporate these image processing functions on-chip.

It has these extremely large effects.

[Brief explanation of drawings]

Fig. 1 is an overall structural diagram of the first embodiment of the present invention, Fig. 2 is a cross-sectional structural diagram of the first embodiment of the present invention, Fig. 3 is a conceptual diagram of an artificial retina, and Fig. 4 is a diagram of the second embodiment of the present invention. 5th overall structural diagram of the embodiment of
The figure is an overall structural diagram of the third embodiment of the present invention, FIG. 6 is a sectional structural diagram of the third embodiment of the present invention, FIG. 7 is an overall structural diagram of the fourth embodiment of the present invention, and FIG. An equivalent circuit diagram of two pixels and a resistor R connecting them in the first embodiment of the present invention, FIG. 9 is a simulation calculation value of the wavelength characteristic of the photocurrent in the first embodiment of the present invention, and FIG. Overall structural diagram of the fifth embodiment of the invention,
FIG. 11 is a cross-sectional structural diagram of the fifth embodiment of the present invention, FIG. 12 is an overall structural diagram of the sixth embodiment of the present invention, and FIG. 13 is an overall structural diagram of the seventh embodiment of the present invention. 15 is an overall structural diagram of the 8th embodiment of the present invention, FIG. 15 is an overall structural diagram of the 9th embodiment of the present invention, FIG. 16 is an overall structural diagram of the 10th embodiment of the present invention, and FIG. An overall structural diagram of an eleventh embodiment of the invention. FIG. 18 is an overall structural diagram of the twelfth embodiment of the present invention. 101... MOS switch, 102... horizontal shift register, 103 vertical shift register, 104° amplifier, 105... gain control terminal, 108... differential amplifier, 107... adder , 112... second horizontal shift register, 201... photodiode, 202
... Resistor (first impedance), 203... Resistor (second impedance), 204... Differential amplifier, 205... Circuit network, 206... Node of circuit network,
207...Photodiode output terminal, 221...
・Substrate, 222...S i O,, 223...Polysilicon gate, 224...A1.225...Polysilicon, 226...Polysilicon for resistance, 403...
・・MOS switch (second impedance), 411
... Control line, 503 ... MOS switch (second impedance), 511 ... Control line, 603 ... Resistor (second impedance), 801 ... Timing adjustment circuit. 101 MCl5 sui-y+ 702 Ei, condolence shift register to3 History 1 shift I/3; Sc2o17okp71-→: 2o2
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Claims (1)

[Claims] 1. In a structure in which a first impedance circuit network having a plurality of nodes corresponding to a plurality of pixels is provided on a chip of a solid-state image sensor, a resistive film or a resistive semiconductor of the solid-state image sensor A solid-state imaging device characterized in that the circuit network is formed of a distributed constant circuit using distributed impedance of the layers. 2. The solid-state imaging device according to claim 1, wherein the image smoothing filter is configured using a circuit network with the first impedance. 3. Claim 1, characterized in that the resistive film is formed of a transparent film or a semi-transparent film on a solid-state image sensor.
The solid-state image sensor described in . 4. The solid-state image sensing device according to claim 1, wherein the plurality of pixels and the plurality of nodes are each connected via a second impedance. 5. The solid-state imaging device according to claim 1, wherein the second impedance is formed using a switch element. 6. The solid-state imaging device according to claim 1, wherein the second impedance is formed using a resistive element. 7. The solid-state imaging device according to claim 1, wherein the second impedance is formed by connecting a resistor element and a switch element in series. 8. At least one image signal pixel and at least one
A solid-state image sensor that has signal pixels each subjected to spatial filtering on the same chip. 9. The solid-state imaging device according to claim 8, further comprising means for generating a signal with image contour enhancement. 10. The solid-state imaging device according to claim 8, further comprising means for simultaneously outputting an image signal, a signal subjected to edge enhancement, and a signal subjected to an image smoothing filter. 11. Means for generating a second-order differential signal by subtracting the image smoothing filtered signal from the image signal, and means for generating a signal with edge enhancement by adding the second-order differential signal to the image signal. 9. A solid-state image sensor according to claim 8, comprising: 12. Claim 8, characterized by comprising means for changing the degree of emphasis of the contour of the signal subjected to contour emphasis.
The solid-state image sensor described in . 13. One pixel connected to the circuit network constituting the image smoothing filter and one pixel not connected to the same circuit constitute one pixel pair, and the same pixel pair is treated as one unit on the chip. Claim 8, characterized in that
The solid-state image sensor described in . 14. In the arrangement of the above pixel pairs, the pixel signal pixels and the signal pixels subjected to the image smoothing filter are arranged alternately so that the pixels of one shape are always adjacent to and surrounded by the pixels of the other shape. 9. The solid-state image sensor according to claim 8, wherein the solid-state image sensor is arranged in an array. 15. A first node having a plurality of nodes corresponding to a plurality of pixels.
9. The solid-state imaging device according to claim 8, further comprising an image smoothing filter configured with a circuit network having an impedance of. 16. The solid-state imaging device according to claim 8, further comprising an image smoothing filter constituted by a circuit network using a distributed impedance of a resistive film or a resistive semiconductor layer of the solid-state imaging device. 17. The solid-state imaging device according to claim 8, wherein the resistive film is formed of a transparent film or a semi-transparent film on the solid-state imaging device. 18. Claim 1, comprising an image smoothing filter that connects a plurality of nodes of a circuit network with a first impedance and a plurality of corresponding pixels through respective second impedances. The solid-state imaging device according to item 8. 19. The solid-state imaging device according to claim 8, wherein the second impedance is formed using a switch element. 20. The solid-state imaging device according to claim 8, wherein the second impedance is formed using a resistive element. 21. The solid-state imaging device according to claim 8, wherein the second impedance is formed by series connection of a resistance element and a switch element. 22. The device according to claim 8, comprising a timing adjustment circuit that adjusts the timing of reading out image signal pixels and the timing of reading out signal pixels subjected to an image smoothing filter. Solid-state image sensor. 23. Claim No. 2, characterized in that the same horizontal shift register is used to read out the image signal pixels and the signal pixels subjected to the image smoothing filter, which are arranged on the same column. The solid-state imaging device according to item 8.